Update of /cvsroot/linux-mips/linux/include/asm-mips
In directory usw-pr-cvs1:/tmp/cvs-serv1301/include/asm-mips
Modified Files:
au1000_dma.h
Log Message:
Some changes to Au1000 sound driver:
- Added mutex locks around read/write methods, to prevent
simultaneous access on SMP or preemptible kernels.
- Removed the counter/pointer fragment aligning at the end
of read/write methods, for madplay.
- Use coherent DMA.
Index: au1000_dma.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/au1000_dma.h,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- au1000_dma.h 2 Dec 2001 19:05:32 -0000 1.7
+++ au1000_dma.h 25 Mar 2002 22:58:15 -0000 1.8
@@ -100,7 +100,7 @@
};
struct dma_chan {
- int dev_id; // this channel is allocated if >=0, free otherwise
+ int dev_id; // this channel is allocated if >=0, free otherwise
unsigned int io;
int irq;
const char *dev_str;
@@ -174,8 +174,7 @@
outl_sync(virt_to_phys((void *) chan->fifo_addr),
chan->io + DMA_PERIPHERAL_ADDR);
- outl_sync(chan->
- mode | (chan->dev_id << DMA_DID_BIT) | DMA_IE | DMA_GO,
+ outl_sync(chan->mode | (chan->dev_id << DMA_DID_BIT) | DMA_IE | DMA_GO,
chan->io + DMA_MODE_SET);
}
@@ -212,12 +211,21 @@
if (!chan)
return;
/*
- * chan->mode only holds endianess, direction, transfer size, device
- * FIFO width, and cacheability info for the channel. Make sure
- * anything else is masked off.
+ * set_dma_mode is only allowed to change endianess, direction,
+ * transfer size, device FIFO width, and coherency settings.
+ * Make sure anything else is masked off.
*/
mode &= (DMA_BE | DMA_DR | DMA_TS8 | DMA_DW_MASK | DMA_NC);
- chan->mode = mode;
+ chan->mode &= ~(DMA_BE | DMA_DR | DMA_TS8 | DMA_DW_MASK | DMA_NC);
+ chan->mode |= mode;
+}
+
+static __inline__ unsigned int get_dma_mode(unsigned int dmanr)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return 0;
+ return chan->mode;
}
static __inline__ int get_dma_active_buffer(unsigned int dmanr)
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