Update of /cvsroot/linux-mips/linux/arch/mips/jmr3927/rbhma3100
In directory usw-pr-cvs1:/tmp/cvs-serv23204/arch/mips/jmr3927/rbhma3100
Modified Files:
setup.c
Log Message:
Most of it was a collection of fixes and cleanups for mips64 and SMP stuff
Index: setup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/jmr3927/rbhma3100/setup.c,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- setup.c 22 Jan 2002 22:08:13 -0000 1.5
+++ setup.c 26 Feb 2002 17:34:14 -0000 1.6
@@ -55,14 +55,11 @@
#include <asm/gdb-stub.h>
#include <asm/jmr3927/jmr3927.h>
#include <asm/mipsregs.h>
-#include <asm/cpu.h>
/* Tick Timer divider */
#define JMR3927_TIMER_CCD 0 /* 1/2 */
#define JMR3927_TIMER_CLK (JMR3927_IMCLK / (2 << JMR3927_TIMER_CCD))
-extern struct ide_ops std_ide_ops;
-
unsigned char led_state = 0xf;
struct {
@@ -144,7 +141,6 @@
unsigned long jmr3927_do_gettimeoffset(void);
extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
-
static void __init jmr3927_timer_setup(struct irqaction *irq)
{
do_gettimeoffset = jmr3927_do_gettimeoffset;
@@ -159,7 +155,6 @@
}
#define USECS_PER_JIFFY (1000000/HZ)
-
unsigned long jmr3927_do_gettimeoffset(void)
{
unsigned long count;
@@ -191,27 +186,22 @@
extern unsigned long __rd_start, __rd_end, initrd_start, initrd_end;
#endif
+//#undef DO_WRITE_THROUGH
+#define DO_WRITE_THROUGH
#define DO_ENABLE_CACHE
-int mips_config_cwfon;
-int mips_config_wbon;
extern char * __init prom_getcmdline(void);
static void jmr3927_board_init(void);
extern void jmr3927_irq_setup(void);
extern struct resource pci_io_resource;
extern struct resource pci_mem_resource;
-
-void __init bus_error_init(void)
-{
-}
-
void __init jmr3927_setup(void)
{
extern int panic_timeout;
char *argptr;
irq_setup = jmr3927_irq_setup;
- mips_io_port_base = JMR3927_PORT_BASE;
+ mips_io_port_base = JMR3927_PORT_BASE + JMR3927_PCIIO;
board_time_init = jmr3927_time_init;
board_timer_setup = jmr3927_timer_setup;
@@ -240,24 +230,18 @@
/* cache setup */
{
unsigned int conf;
- unsigned int processor_id;
#ifdef DO_ENABLE_CACHE
int mips_ic_disable = 0, mips_dc_disable = 0;
#else
int mips_ic_disable = 1, mips_dc_disable = 1;
#endif
- processor_id = read_32bit_cp0_register(CP0_PRID);
- if ((processor_id & 0xff) <= PRID_REV_TX3927B) {
- /* turn writeback off - see errata */
- mips_config_cwfon = 0;
- mips_config_wbon = 0;
- }
- else {
- mips_config_cwfon = 1;
- mips_config_wbon = 1;
- }
-
- clear_cp0_status(ST0_BEV);
+#ifdef DO_WRITE_THROUGH
+ int mips_config_cwfon = 0;
+ int mips_config_wbon = 0;
+#else
+ int mips_config_cwfon = 1;
+ int mips_config_wbon = 1;
+#endif
conf = read_32bit_cp0_register(CP0_CONF);
conf &= ~(TX39_CONF_ICE | TX39_CONF_DCE | TX39_CONF_WBON | TX39_CONF_CWFON);
@@ -279,6 +263,11 @@
if ((argptr = strstr(argptr, "toeon")) != NULL) {
jmr3927_ccfg_toeon = 1;
}
+ argptr = prom_getcmdline();
+ if ((argptr = strstr(argptr, "ip=")) == NULL) {
+ argptr = prom_getcmdline();
+ strcat(argptr, " ip=bootp");
+ }
#ifdef CONFIG_TXX927_SERIAL_CONSOLE
argptr = prom_getcmdline();
@@ -300,8 +289,9 @@
/* for legacy I/O, PCI I/O PCI Bus address must be 0 */
unsigned long mips_pci_io_pciaddr = 0;
#endif
-
-static void __init jmr3927_board_init()
+extern struct rtc_ops *rtc_ops;
+extern struct rtc_ops jmr3927_rtc_ops;
+static void jmr3927_board_init()
{
char *argptr;
@@ -336,15 +326,17 @@
//not yet kbd_ops = &jmr3927_kbd_ops;
#endif
}
+#ifdef USE_RTC_DS1742
+ if (jmr3927_have_nvram()) {
+ rtc_ops = &jmr3927_rtc_ops;
+ }
+#endif
/* SIO0 DTR on */
jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);
jmr3927_led_set(0);
-#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &std_ide_ops;
-#endif
if (jmr3927_have_isac())
jmr3927_io_led_set(0);
@@ -358,8 +350,7 @@
jmr3927_isac_reg_in(JMR3927_ISAC_REV_ADDR) & JMR3927_REV_MASK,
jmr3927_io_dipsw());
}
-
-static void __init tx3927_setup(void)
+static void tx3927_setup(void)
{
int i;
@@ -381,10 +372,10 @@
/* Disable PCI snoop */
tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_PSNP;
- if (!mips_config_wbon) {
- /* Enable PCI SNOOP - with write through only */
- tx3927_ccfgptr->ccfg |= TX3927_CCFG_PSNP;
- }
+#ifdef DO_WRITE_THROUGH
+ /* Enable PCI SNOOP - with write through only */
+ tx3927_ccfgptr->ccfg |= TX3927_CCFG_PSNP;
+#endif
/* Pin selection */
tx3927_ccfgptr->pcfg &= ~TX3927_PCFG_SELALL;
@@ -439,7 +430,6 @@
printk("TX3927 PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:",
tx3927_pcicptr->did, tx3927_pcicptr->vid,
tx3927_pcicptr->rid);
-
if (!(tx3927_ccfgptr->ccfg & TX3927_CCFG_PCIXARB)) {
printk("External\n");
/* XXX */
@@ -480,6 +470,7 @@
/* Enable Direct mapping Address Space Decoder */
tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_ILMDE | TX3927_PCIC_LBC_ILIDE;
#endif
+
/* Clear All Local Bus Status */
tx3927_pcicptr->lbstat = TX3927_PCIC_LBIM_ALL;
/* Enable All Local Bus Interrupts */
|
