Update of /cvsroot/linux-mips/linux/arch/mips64/mm
In directory usw-pr-cvs1:/tmp/cvs-serv4980/mm
Modified Files:
Makefile
Log Message:
Rearrange TLB exception handlers similarly to 32-bit kernel.
Index: Makefile
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/mm/Makefile,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- Makefile 28 Jan 2002 20:31:57 -0000 1.1
+++ Makefile 26 Feb 2002 16:36:12 -0000 1.2
@@ -2,18 +2,29 @@
# Makefile for the Linux/MIPS-specific parts of the memory manager.
#
+.S.o:
+ $(CC) $(CFLAGS) $(CFLAGS_$@) -c $< -o $*.o
+
O_TARGET := mm.o
export-objs += umap.o
obj-y := extable.o init.o fault.o loadmmu.o
-obj-$(CONFIG_CPU_R4300) += r4xx0.o
-obj-$(CONFIG_CPU_R4X00) += r4xx0.o
-obj-$(CONFIG_CPU_R5000) += r4xx0.o
-obj-$(CONFIG_CPU_NEVADA) += r4xx0.o
-obj-$(CONFIG_CPU_R10000) += andes.o
-obj-$(CONFIG_CPU_SB1) += pg-sb1.o c-sb1.o tlb-sb1.o
+obj-$(CONFIG_CPU_R4300) += r4xx0.o tlbex-r4k.o tlb-glue-r4k.o
+obj-$(CONFIG_CPU_R4X00) += r4xx0.o tlbex-r4k.o tlb-glue-r4k.o
+obj-$(CONFIG_CPU_R5000) += r4xx0.o tlbex-r4k.o tlb-glue-r4k.o
+obj-$(CONFIG_CPU_NEVADA) += r4xx0.o tlbex-r4k.o tlb-glue-r4k.o
+obj-$(CONFIG_CPU_R10000) += andes.o tlbex-r4k.o tlb-glue-r4k.o
+obj-$(CONFIG_CPU_SB1) += pg-sb1.o c-sb1.o tlb-sb1.o tlbex-r4k.o \
+ tlb-glue-r4k.o
+
+#
+# Debug TLB exception handler, currently unused
+#
+#obj-y += tlb-dbg-r4k.o tlb-glue-r4k.o
obj-$(CONFIG_SGI_IP22) += umap.o
+
+CFLAGS_tlb-glue-r4k.o := -P
include $(TOPDIR)/Rules.make
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