Update of /cvsroot/linux-mips/linux/arch/mips64/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv13359
Modified Files:
smp.c
Log Message:
Redo start_secondary a la 32-bit kernel. Make start_secondary a void function. Call smp_processor_id() only once. Initialize c0_context to 0. Seems like it always was just coincidence that any SMP kernel ever worked ...
Index: smp.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/smp.c,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -d -r1.13 -r1.14
--- smp.c 28 Jan 2002 20:31:57 -0000 1.13
+++ smp.c 19 Feb 2002 17:54:59 -0000 1.14
@@ -19,6 +19,7 @@
#include <linux/cache.h>
#include <asm/atomic.h>
+#include <asm/cpu.h>
#include <asm/processor.h>
#include <asm/system.h>
#include <asm/hardirq.h>
@@ -55,20 +56,41 @@
#endif
}
-int __init start_secondary(void)
+/*
+ * Hook for doing final board-specific setup after the generic smp setup
+ * is done
+ */
+asmlinkage void start_secondary(void)
{
- extern atomic_t smp_commenced;
+ unsigned int cpu = smp_processor_id();
- smp_callin();
- while (!atomic_read(&smp_commenced));
+ prom_init_secondary();
+
+ /* Do stuff that trap_init() did for the first processor */
+ clear_cp0_status(ST0_BEV);
+ if (mips_cpu.options & MIPS_CPU_DIVEC) {
+ set_cp0_cause(CAUSEF_IV);
+ }
+ /*
+ * XXX parity protection should be folded in here when it's converted
+ * to an option instead of something based on .cputype
+ */
+ set_context(cpu << 23);
+ pgd_current[cpu] = init_mm.pgd;
+ cpu_data[cpu].udelay_val = loops_per_jiffy;
+ cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
+ prom_smp_finish();
+ printk("Slave cpu booted successfully\n");
+ CPUMASK_SETB(cpu_online_map, cpu);
+ atomic_inc(&cpus_booted);
cpu_idle();
}
void __init smp_commence(void)
{
wmb();
- atomic_set(&smp_commenced,1);
+ atomic_set(&smp_commenced, 1);
}
/*
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