Update of /cvsroot/linux-mips/linux/arch/mips/mm
In directory usw-pr-cvs1:/tmp/cvs-serv6295/arch/mips/mm
Modified Files:
tlbex-r4k.S
Log Message:
More fixes for highmem at physical addresss above 4gb.
Index: tlbex-r4k.S
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/tlbex-r4k.S,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- tlbex-r4k.S 4 Jan 2002 18:04:53 -0000 1.4
+++ tlbex-r4k.S 12 Feb 2002 18:14:19 -0000 1.5
@@ -28,15 +28,21 @@
#ifdef CONFIG_64BIT_PHYS_ADDR
#define PTE_L ld
#define PTE_S sd
+#define PTE_SRL dsrl
+#define P_MTC0 dmtc0
#define PTE_SIZE 8
#define PTEP_INDX_MSK 0xff0
#define PTE_INDX_MSK 0xff8
+#define PTE_INDX_SHIFT 9
#else
#define PTE_L lw
#define PTE_S sw
+#define PTE_SRL srl
+#define P_MTC0 mtc0
#define PTE_SIZE 4
#define PTEP_INDX_MSK 0xff8
#define PTE_INDX_MSK 0xffc
+#define PTE_INDX_SHIFT 10
#endif
__INIT
@@ -82,10 +88,10 @@
addu k1, k1, k0 # add in offset
PTE_L k0, 0(k1) # get even pte
PTE_L k1, PTE_SIZE(k1) # get odd pte
- srl k0, k0, 6 # convert to entrylo0
- mtc0 k0, CP0_ENTRYLO0 # load it
- srl k1, k1, 6 # convert to entrylo1
- mtc0 k1, CP0_ENTRYLO1 # load it
+ PTE_SRL k0, k0, 6 # convert to entrylo0
+ P_MTC0 k0, CP0_ENTRYLO0 # load it
+ PTE_SRL k1, k1, 6 # convert to entrylo1
+ P_MTC0 k1, CP0_ENTRYLO1 # load it
b 1f
tlbwr # write random tlb entry
1:
@@ -110,10 +116,10 @@
addu k1, k1, k0
PTE_L k0, 0(k1)
PTE_L k1, PTE_SIZE(k1)
- srl k0, k0, 6
- mtc0 k0, CP0_ENTRYLO0
- srl k1, k1, 6
- mtc0 k1, CP0_ENTRYLO1
+ PTE_SRL k0, k0, 6
+ P_MTC0 k0, CP0_ENTRYLO0
+ PTE_SRL k1, k1, 6
+ P_MTC0 k1, CP0_ENTRYLO1
nop
tlbwr
nop
@@ -148,10 +154,10 @@
addu k1, k1, k0 # add in offset
PTE_L k0, 0(k1) # get even pte
PTE_L k1, PTE_SIZE(k1) # get odd pte
- srl k0, k0, 6 # convert to entrylo0
- mtc0 k0, CP0_ENTRYLO0 # load it
- srl k1, k1, 6 # convert to entrylo1
- mtc0 k1, CP0_ENTRYLO1 # load it
+ PTE_SRL k0, k0, 6 # convert to entrylo0
+ P_MTC0 k0, CP0_ENTRYLO0 # load it
+ PTE_SRL k1, k1, 6 # convert to entrylo1
+ P_MTC0 k1, CP0_ENTRYLO1 # load it
nop # QED specified nops
nop
tlbwr # write random tlb entry
@@ -178,11 +184,11 @@
PTE_L k1, PTE_SIZE(k1)
nop /* XXX */
tlbp
- srl k0, k0, 6
- mtc0 k0, CP0_ENTRYLO0
- srl k1, k1, 6
+ PTE_SRL k0, k0, 6
+ P_MTC0 k0, CP0_ENTRYLO0
+ PTE_SRL k1, k1, 6
mfc0 k0, CP0_INDEX
- mtc0 k1, CP0_ENTRYLO1
+ P_MTC0 k1, CP0_ENTRYLO1
bltzl k0, 1f
tlbwr
1:
@@ -210,11 +216,11 @@
PTE_L k1, PTE_SIZE(k1)
nop /* XXX */
tlbp
- srl k0, k0, 6
- mtc0 k0, CP0_ENTRYLO0
- srl k1, k1, 6
+ PTE_SRL k0, k0, 6
+ P_MTC0 k0, CP0_ENTRYLO0
+ PTE_SRL k1, k1, 6
mfc0 k0, CP0_INDEX
- mtc0 k1, CP0_ENTRYLO1
+ P_MTC0 k1, CP0_ENTRYLO1
bltzl k0, 1f
tlbwr
1:
@@ -240,12 +246,12 @@
addu k1, k1, k0
PTE_L k0, 0(k1)
PTE_L k1, PTE_SIZE(k1)
- srl k0, k0, 6
- mtc0 zero, CP0_ENTRYLO0
- mtc0 k0, CP0_ENTRYLO0
- srl k1, k1, 6
- mtc0 zero, CP0_ENTRYLO1
- mtc0 k1, CP0_ENTRYLO1
+ PTE_SRL k0, k0, 6
+ P_MTC0 zero, CP0_ENTRYLO0
+ P_MTC0 k0, CP0_ENTRYLO0
+ PTE_SRL k1, k1, 6
+ P_MTC0 zero, CP0_ENTRYLO1
+ P_MTC0 k1, CP0_ENTRYLO1
b 1f
tlbwr
1:
@@ -273,13 +279,13 @@
PTE_L k1, PTE_SIZE(k1)
nop /* XXX */
tlbp
- srl k0, k0, 6
- mtc0 zero, CP0_ENTRYLO0
- mtc0 k0, CP0_ENTRYLO0
- mfc0 k0, CP0_INDEX
- srl k1, k1, 6
- mtc0 zero, CP0_ENTRYLO1
- mtc0 k1, CP0_ENTRYLO1
+ PTE_SRL k0, k0, 6
+ P_MTC0 zero, CP0_ENTRYLO0
+ P_MTC0 k0, CP0_ENTRYLO0
+ mfc0 k0, CP0_INDEX
+ PTE_SRL k1, k1, 6
+ P_MTC0 zero, CP0_ENTRYLO1
+ P_MTC0 k1, CP0_ENTRYLO1
bltzl k0, 1f
tlbwr
1:
@@ -344,7 +350,7 @@
addu ptr, ptr, pte; \
mfc0 pte, CP0_BADVADDR; \
lw ptr, (ptr); \
- srl pte, pte, 10; \
+ srl pte, pte, PTE_INDX_SHIFT; \
and pte, pte, PTE_INDX_MSK; \
addu ptr, ptr, pte; \
PTE_L pte, (ptr);
@@ -358,10 +364,10 @@
xori ptr, ptr, PTE_SIZE; \
PTE_L tmp, PTE_SIZE(ptr); \
PTE_L ptr, 0(ptr); \
- srl tmp, tmp, 6; \
- mtc0 tmp, CP0_ENTRYLO1; \
- srl ptr, ptr, 6; \
- mtc0 ptr, CP0_ENTRYLO0;
+ PTE_SRL tmp, tmp, 6; \
+ P_MTC0 tmp, CP0_ENTRYLO1; \
+ PTE_SRL ptr, ptr, 6; \
+ P_MTC0 ptr, CP0_ENTRYLO0;
#define DO_FAULT(write) \
.set noat; \
@@ -467,6 +473,8 @@
NESTED(handle_tlbs, PT_SIZE, sp)
.set noat
#ifdef TLB_OPTIMIZE
+ .set mips3
+ li k0,0
LOAD_PTE(k0, k1)
R5K_HAZARD
tlbp # find faulting entry
@@ -478,7 +486,7 @@
tlbwi
1:
nop
- .set mips3
+ .set mips3
eret
.set mips0
#endif
@@ -491,6 +499,7 @@
NESTED(handle_mod, PT_SIZE, sp)
.set noat
#ifdef TLB_OPTIMIZE
+ .set mips3
LOAD_PTE(k0, k1)
R5K_HAZARD
tlbp # find faulting entry
@@ -613,7 +622,7 @@
1:
srl k0, k0, 6
2:
- mtc0 k0, CP0_ENTRYLO0 # load it
+ P_MTC0 k0, CP0_ENTRYLO0 # load it
lui k1, %hi(__saved_pte)
lw k1, %lo(__saved_pte)(k1) # recover pte pointer
@@ -630,7 +639,7 @@
1:
srl k0, k0, 6 # convert to entrylo0
2:
- mtc0 k0, CP0_ENTRYLO1 # load it
+ P_MTC0 k0, CP0_ENTRYLO1 # load it
nop
b 1f
tlbwr # write random tlb entry
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