Update of /cvsroot/linux-mips/linux/arch/mips/rc32300/common
In directory usw-pr-cvs1:/tmp/cvs-serv9288/rc32300/common
Modified Files:
dbg_io.c puts.c reset.c
Log Message:
H/W PCI byte-swapping on the RC32334 does not work - disable and
use s/w swapping instead (CONFIG_SWAP_IO_SPACE).
Index: dbg_io.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/rc32300/common/dbg_io.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- dbg_io.c 2002/01/17 21:07:24 1.4
+++ dbg_io.c 2002/01/24 20:13:34 1.5
@@ -58,8 +58,8 @@
/* memory-mapped read/write of the port */
-#define UART16550_READ(y) inb(DEBUG_BASE + y)
-#define UART16550_WRITE(y,z) outb(z, DEBUG_BASE + y)
+#define UART16550_READ(y) rc32300_inb(DEBUG_BASE + y)
+#define UART16550_WRITE(y,z) rc32300_outb(z, DEBUG_BASE + y)
static void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
{
Index: puts.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/rc32300/common/puts.c,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- puts.c 2002/01/17 21:07:24 1.5
+++ puts.c 2002/01/24 20:13:34 1.6
@@ -58,14 +58,14 @@
int i = 0;
do {
- ch = inb(SER_CMD);
+ ch = rc32300_inb(SER_CMD);
slow_down();
i++;
if (i > TIMEOUT) {
break;
}
} while (0 == (ch & TX_BUSY));
- outb(c, SER_DATA);
+ rc32300_outb(c, SER_DATA);
}
void puts(unsigned char *cp)
@@ -75,14 +75,14 @@
while (*cp) {
do {
- ch = inb(SER_CMD);
+ ch = rc32300_inb(SER_CMD);
slow_down();
i++;
if (i > TIMEOUT) {
break;
}
} while (0 == (ch & TX_BUSY));
- outb(*cp++, SER_DATA);
+ rc32300_outb(*cp++, SER_DATA);
}
putch('\r');
putch('\n');
@@ -96,14 +96,14 @@
while (*cp) {
do {
- ch = inb(SER_CMD);
+ ch = rc32300_inb(SER_CMD);
slow_down();
i++;
if (i > TIMEOUT) {
break;
}
} while (0 == (ch & TX_BUSY));
- outb(*cp++, SER_DATA);
+ rc32300_outb(*cp++, SER_DATA);
}
}
Index: reset.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/rc32300/common/reset.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- reset.c 2002/01/19 01:35:17 1.4
+++ reset.c 2002/01/24 20:13:34 1.5
@@ -46,11 +46,11 @@
#ifdef CONFIG_CPU_RC32334
// Trigger the WatchDog Timer (Timer 3) to warm reset
- outl(0, TIMER0_CNTL + 3*TIMER_REG_OFFSET);
- outl(0xd8, CPU_IP_BUSERR_CNTL);
- outl(0, TIMER0_COUNT + 3*TIMER_REG_OFFSET);
- outl(2, TIMER0_COMPARE + 3*TIMER_REG_OFFSET);
- outl(1, TIMER0_CNTL + 3*TIMER_REG_OFFSET);
+ rc32300_outl(0, TIMER0_CNTL + 3*TIMER_REG_OFFSET);
+ rc32300_outl(0xd8, CPU_IP_BUSERR_CNTL);
+ rc32300_outl(0, TIMER0_COUNT + 3*TIMER_REG_OFFSET);
+ rc32300_outl(2, TIMER0_COMPARE + 3*TIMER_REG_OFFSET);
+ rc32300_outl(1, TIMER0_CNTL + 3*TIMER_REG_OFFSET);
#else
__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
#endif
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