Update of /cvsroot/linux-mips/linux/include/asm-mips
In directory usw-pr-cvs1:/tmp/cvs-serv19527/include/asm-mips
Modified Files:
pci.h
Log Message:
Reimplement ioswapping for 32-bit <asm/io.h>. Make support for non-coherent I/O on 32-bit MIPS option (CONFIG_NONCOHERENT_IO. Replace CONFIG_COHERENT_IO by CONFIG_NONCOHERENT_IO. The cobalt hacks can go away now.
Index: pci.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/pci.h,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- pci.h 2001/11/12 18:41:36 1.7
+++ pci.h 2001/11/26 19:02:22 1.8
@@ -92,7 +92,7 @@
if (direction == PCI_DMA_NONE)
BUG();
-#ifndef CONFIG_COHERENT_IO
+#ifdef CONFIG_NONCOHERENT_IO
dma_cache_wback_inv((unsigned long)ptr, size);
#endif
@@ -131,7 +131,7 @@
addr = (unsigned long) page_address(page);
addr += offset;
-#ifndef CONFIG_COHERENT_IO
+#ifdef CONFIG_NONCOHERENT_IO
dma_cache_wback_inv(addr, size);
#endif
@@ -165,14 +165,14 @@
static inline int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
int nents, int direction)
{
-#ifndef CONFIG_COHERENT_IO
+#ifdef CONFIG_NONCOHERENT_IO
int i;
#endif
if (direction == PCI_DMA_NONE)
BUG();
-#ifndef CONFIG_COHERENT_IO
+#ifdef CONFIG_NONCOHERENT_IO
/* Make sure that gcc doesn't leave the empty loop body. */
for (i = 0; i < nents; i++, sg++)
dma_cache_wback_inv((unsigned long)sg->address, sg->length);
@@ -212,7 +212,7 @@
if (direction == PCI_DMA_NONE)
BUG();
-#ifndef CONFIG_COHERENT_IO
+#ifdef CONFIG_NONCOHERENT_IO
dma_cache_wback_inv((unsigned long)bus_to_virt(dma_handle), size);
#endif
}
@@ -228,7 +228,7 @@
struct scatterlist *sg,
int nelems, int direction)
{
-#ifndef CONFIG_COHERENT_IO
+#ifdef CONFIG_NONCOHERENT_IO
int i;
#endif
@@ -236,7 +236,7 @@
BUG();
/* Make sure that gcc doesn't leave the empty loop body. */
-#ifndef CONFIG_COHERENT_IO
+#ifdef CONFIG_NONCOHERENT_IO
for (i = 0; i < nelems; i++, sg++)
dma_cache_wback_inv((unsigned long)sg->address, sg->length);
#endif
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