Update of /cvsroot/linux-mips/linux/arch/mips64/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv17597/kernel
Modified Files:
mips64_ksyms.c setup.c traps.c
Log Message:
Synced mips64 stuff to OSS tree.
Index: mips64_ksyms.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/mips64_ksyms.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- mips64_ksyms.c 2001/10/11 23:00:47 1.3
+++ mips64_ksyms.c 2001/11/26 17:17:26 1.4
@@ -84,7 +84,8 @@
*/
EXPORT_SYMBOL(_flush_page_to_ram);
EXPORT_SYMBOL(_flush_cache_l1);
-#ifndef CONFIG_COHERENT_IO
+
+#ifdef CONFIG_NONCOHERENT_IO
EXPORT_SYMBOL(_dma_cache_wback_inv);
EXPORT_SYMBOL(_dma_cache_inv);
#endif
Index: setup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/setup.c,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- setup.c 2001/11/20 17:41:49 1.6
+++ setup.c 2001/11/26 17:17:26 1.7
@@ -82,7 +82,6 @@
*
* These are initialized so they are in the .data section
*/
-unsigned long mips_cputype = CPU_UNKNOWN;
unsigned long mips_machtype = MACH_UNKNOWN;
unsigned long mips_machgroup = MACH_GROUP_UNKNOWN;
@@ -103,7 +102,7 @@
static inline void check_wait(void)
{
printk("Checking for 'wait' instruction... ");
- switch(mips_cputype) {
+ switch(mips_cpu.cputype) {
case CPU_R4200:
case CPU_R4300:
case CPU_R4600:
Index: traps.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/traps.c,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- traps.c 2001/11/20 17:35:48 1.6
+++ traps.c 2001/11/26 17:17:26 1.7
@@ -447,7 +447,7 @@
{
extern void except_vec4(void);
- switch(mips_cputype) {
+ switch(mips_cpu.cputype) {
case CPU_NEVADA:
memcpy((void *)(KSEG0 + 0x200), except_vec4, 8);
set_cp0_cause(CAUSEF_IV);
@@ -475,7 +475,7 @@
static inline void mips4_setup(void)
{
- switch (mips_cputype) {
+ switch (mips_cpu.cputype) {
case CPU_R5000:
case CPU_R5000A:
case CPU_NEVADA:
@@ -521,7 +521,7 @@
* Only some CPUs have the watch exceptions or a dedicated
* interrupt vector.
*/
- watch_init(mips_cputype);
+ watch_init(mips_cpu.cputype);
setup_dedicated_int();
mips4_setup();
go_64(); /* In memoriam C128 ;-) */
@@ -532,7 +532,7 @@
/*
* Handling the following exceptions depends mostly of the cpu type
*/
- switch(mips_cputype) {
+ switch(mips_cpu.cputype) {
case CPU_R10000:
/*
* The R10000 is in most aspects similar to the R4400. It
@@ -590,7 +590,7 @@
break;
case CPU_R8000:
- panic("unsupported CPU type %s.\n", cpu_names[mips_cputype]);
+ panic("unsupported CPU type %s.\n", cpu_names[mips_cpu.cputype]);
break;
case CPU_UNKNOWN:
|
