Update of /cvsroot/linux-mips/linux/arch/mips/mm
In directory usw-pr-cvs1:/tmp/cvs-serv24374
Modified Files:
loadmmu.c
Log Message:
SB1 uses it's own TLB code for now.
Index: loadmmu.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/loadmmu.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- loadmmu.c 2001/10/24 23:32:54 1.7
+++ loadmmu.c 2001/11/19 17:38:47 1.8
@@ -51,6 +51,7 @@
extern void ld_mmu_mips32(void);
extern void r3k_tlb_init(void);
extern void r4k_tlb_init(void);
+extern void sb1_tlb_init(void);
void __init loadmmu(void)
{
@@ -113,7 +114,7 @@
#ifdef CONFIG_CPU_SB1
case CPU_SB1:
ld_mmu_sb1();
- r4k_tlb_init();
+ sb1_tlb_init();
break;
#endif
default:
|
