Update of /cvsroot/linux-mips/linux/arch/mips/mm
In directory usw-pr-cvs1:/tmp/cvs-serv6111
Modified Files:
tlb-r4k.c
Log Message:
Don't misstreat RM7000 as MIPS32.
Index: tlb-r4k.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/tlb-r4k.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- tlb-r4k.c 2001/11/11 00:10:32 1.3
+++ tlb-r4k.c 2001/11/14 16:15:41 1.4
@@ -335,14 +335,11 @@
static void __init probe_tlb(unsigned long config)
{
- unsigned long config1;
-
-#ifdef CONFIG_CPU_RM7000
- return;
-#endif
+ unsigned int prid, config1;
- if (!(config & (1 << 31)))
- /*
+ prid = read_32bit_cp0_register(CP0_PRID) & 0xff0000;
+ if (prid == PRID_IMP_RM7000 || !(config & (1 << 31)))
+ /*
* Not a MIPS32 complianant CPU. Config 1 register not
* supported, we assume R4k style. Cpu probing already figured
* out the number of tlb entries.
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