Update of /cvsroot/linux-mips/linux/drivers/scsi
In directory usw-pr-cvs1:/tmp/cvs-serv10490/drivers/scsi
Modified Files:
sym53c8xx_defs.h
Log Message:
Sync with OSS 2.4.13.
Index: sym53c8xx_defs.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/scsi/sym53c8xx_defs.h,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- sym53c8xx_defs.h 2001/10/19 21:19:39 1.3
+++ sym53c8xx_defs.h 2001/11/06 02:57:38 1.4
@@ -188,20 +188,6 @@
#endif
/*
- * Should we enable DAC cycles on Sparc64 platform?
- * Until further investigation we do not enable it
- * at the moment.
- * We may want to enable it for __ia64__ (untested)
- */
-#if defined(__ia64__)
-# if !defined(SCSI_NCR_USE_64BIT_DAC)
-# define SCSI_NCR_USE_64BIT_DAC
-# endif
-#else
-# undef SCSI_NCR_USE_64BIT_DAC
-#endif
-
-/*
* Immediate arbitration
*/
#if defined(CONFIG_SCSI_NCR53C8XX_IARB)
@@ -209,13 +195,6 @@
#endif
/*
- * Should we enable DAC cycles on sparc64 platforms?
- * Until further investigation we do not enable it
- * anywhere at the moment.
- */
-#undef SCSI_NCR_USE_64BIT_DAC
-
-/*
* Sync transfer frequency at startup.
* Allow from 5Mhz to 80Mhz default 20 Mhz.
*/
@@ -759,6 +738,7 @@
#define FE_66MHZ (1<<23) /* 66MHz PCI Support */
#define FE_DAC (1<<24) /* Support DAC cycles (64 bit addressing) */
#define FE_ISTAT1 (1<<25) /* Have ISTAT1, MBOX0, MBOX1 registers */
+#define FE_DAC_IN_USE (1<<26) /* Platform does DAC cycles */
#define FE_CACHE_SET (FE_ERL|FE_CLSE|FE_WRIE|FE_ERMP)
#define FE_SCSI_SET (FE_WIDE|FE_ULTRA|FE_ULTRA2|FE_DBLR|FE_QUAD|F_CLK80)
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