Update of /cvsroot/linux-mips/linux/arch/mips/cobalt
In directory usw-pr-cvs1:/tmp/cvs-serv23706
Modified Files:
setup.c
Log Message:
Fixed white spaces.
Index: setup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/cobalt/setup.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- setup.c 2001/10/25 23:58:08 1.7
+++ setup.c 2001/10/26 16:55:56 1.8
@@ -59,32 +59,32 @@
void __init cobalt_irq_setup(void)
{
- /*
- * Clear all of the interrupts while we change the table around a bit.
- */
- change_cp0_status(ST0_IM, 0);
+ /*
+ * Clear all of the interrupts while we change the table around a bit.
+ */
+ change_cp0_status(ST0_IM, 0);
- /* Sets the exception_handler array. */
- set_except_vector(0, cobalt_handle_int);
+ /* Sets the exception_handler array. */
+ set_except_vector(0, cobalt_handle_int);
- request_resource(&ioport_resource, &res_pic1);
- request_resource(&ioport_resource, &res_pic2);
+ request_resource(&ioport_resource, &res_pic1);
+ request_resource(&ioport_resource, &res_pic2);
- change_cp0_status(ST0_IM, 0);
- setup_irq(2, &irq2);
+ change_cp0_status(ST0_IM, 0);
+ setup_irq(2, &irq2);
- cli();
+ cli();
- change_cp0_status(ST0_IM, IE_IRQ4 | IE_IRQ3 | IE_IRQ2 | IE_IRQ1);
+ change_cp0_status(ST0_IM, IE_IRQ4 | IE_IRQ3 | IE_IRQ2 | IE_IRQ1);
- /* Setup VIA irq mask */
- VIA_PORT_WRITE(0x20, 0x10);
- VIA_PORT_WRITE(0x21, 0x00);
- VIA_PORT_WRITE(0x21, 0x00);
+ /* Setup VIA irq mask */
+ VIA_PORT_WRITE(0x20, 0x10);
+ VIA_PORT_WRITE(0x21, 0x00);
+ VIA_PORT_WRITE(0x21, 0x00);
- VIA_PORT_WRITE(0xa0, 0x10);
- VIA_PORT_WRITE(0xa1, 0x00);
- VIA_PORT_WRITE(0xa1, 0x00);
+ VIA_PORT_WRITE(0xa0, 0x10);
+ VIA_PORT_WRITE(0xa1, 0x00);
+ VIA_PORT_WRITE(0xa1, 0x00);
}
#define GALILEO_T0_VAL 0xb4000850
@@ -96,40 +96,40 @@
static void __init cobalt_calibrate_timer(void)
{
- volatile unsigned long *timer_reg = (volatile unsigned long *)GALILEO_T0_VAL;
+ volatile unsigned long *timer_reg = (volatile unsigned long *)GALILEO_T0_VAL;
- /* Default to 150MHZ, since this is what we are shipping. */
- *timer_reg = 500000;
+ /* Default to 150MHZ, since this is what we are shipping. */
+ *timer_reg = 500000;
}
static void __init cobalt_timer_setup(struct irqaction *irq)
{
- /* Load timer value for 150 Hz */
- cobalt_calibrate_timer();
+ /* Load timer value for 150 Hz */
+ cobalt_calibrate_timer();
- setup_irq(0, irq);
+ setup_irq(0, irq);
- change_cp0_status(ST0_IM, IE_IRQ4 | IE_IRQ3 | IE_IRQ2 | IE_IRQ1 | IE_IRQ0);
+ change_cp0_status(ST0_IM, IE_IRQ4 | IE_IRQ3 | IE_IRQ2 | IE_IRQ1 | IE_IRQ0);
- /* Enable timer ints */
- *((volatile unsigned long *) GALILEO_TIMER_CTRL) =
- (unsigned long) (GALILEO_ENTC0 | GALILEO_SELTC0);
- /* Unmask timer int */
- *((volatile unsigned long *) GALILEO_CPU_MASK) = (unsigned long) 0x00000100;
+ /* Enable timer ints */
+ *((volatile unsigned long *) GALILEO_TIMER_CTRL) =
+ (unsigned long) (GALILEO_ENTC0 | GALILEO_SELTC0);
+ /* Unmask timer int */
+ *((volatile unsigned long *) GALILEO_CPU_MASK) = (unsigned long) 0x00000100;
}
static void __init cobalt_time_init(void)
{
- //mips_counter_frequency = 83000000;
+ //mips_counter_frequency = 83000000;
- /* we have ds1396 RTC chip */
- rtc_dallas_init(0x70);
+ /* we have ds1396 RTC chip */
+ rtc_dallas_init(0x70);
- /* optional: we don't have a good way to set RTC time,
- * so we will hack here to set a time. In normal running.
- * it should *not* be called becaues RTC will keep the correct time.
- */
- /* rtc_set_time(mktime(2001, 10, 05, 17, 20, 0)); */
+ /* optional: we don't have a good way to set RTC time,
+ * so we will hack here to set a time. In normal running.
+ * it should *not* be called becaues RTC will keep the correct time.
+ */
+ /* rtc_set_time(mktime(2001, 10, 05, 17, 20, 0)); */
}
int cobalt_serial_present;
@@ -147,39 +147,38 @@
iomem_resource.start = 0;
ioport_resource.end = 0xffffffff;
- _machine_restart = cobalt_machine_restart;
- _machine_halt = cobalt_machine_halt;
- _machine_power_off = cobalt_machine_power_off;
+ _machine_restart = cobalt_machine_restart;
+ _machine_halt = cobalt_machine_halt;
+ _machine_power_off = cobalt_machine_power_off;
board_time_init = cobalt_time_init;
board_timer_setup = cobalt_timer_setup;
rtc_ops = &cobalt_rtc_ops;
#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &cobalt_ide_ops;
+ ide_ops = &cobalt_ide_ops;
#endif
- /*ns16550_setup_console();*/
-
- /* We have to do this early, here, before the value could
- * possibly be overwritten by the bootup sequence.
- */
+ /*ns16550_setup_console();*/
- cobalt_serial_present = *((unsigned long *) 0xa020001c);
- cobalt_serial_type = *((unsigned long *) 0xa0200020);
- cobalt_is_raq = (cobalt_serial_present != 0x0
- && cobalt_serial_type == 0x1);
+ /* We have to do this early, here, before the value could
+ * possibly be overwritten by the bootup sequence.
+ */
+ cobalt_serial_present = *((unsigned long *) 0xa020001c);
+ cobalt_serial_type = *((unsigned long *) 0xa0200020);
+ cobalt_is_raq = (cobalt_serial_present != 0x0
+ && cobalt_serial_type == 0x1);
}
/* prom_init() is called just after the cpu type is determined, from
init_arch(). */
void __init prom_init(int argc, char **arg)
{
- mips_machgroup = MACH_GROUP_COBALT;
+ mips_machgroup = MACH_GROUP_COBALT;
- add_memory_region(0x0, argc & 0x7fffffff, BOOT_MEM_RAM);
+ add_memory_region(0x0, argc & 0x7fffffff, BOOT_MEM_RAM);
}
void __init prom_free_prom_memory(void)
{
- /* Something to do here?? */
+ /* Something to do here?? */
}
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