Update of /cvsroot/linux-mips/linux/arch/mips/mm
In directory usw-pr-cvs1:/tmp/cvs-serv31689/arch/mips/mm
Modified Files:
Makefile
Added Files:
pg-r5900.c
Log Message:
Started reworking R5900 mm stuff to new API. Incomplete for now, more to
follow..
--- NEW FILE: pg-r5900.c ---
/*
* $Id: pg-r5900.c,v 1.1 2001/10/25 08:10:21 lethal Exp $
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* r5900.c: R5900 processor specific MMU/Cache routines.
*
* Copyright (C) 2000 Sony Computer Entertainment Inc.
* Copyright (C) 2001 Paul Mundt (le...@ch...)
*
* This file is based on r4xx0.c:
*
* Copyright (C) 1996 David S. Miller (dm...@en...)
* Copyright (C) 1997, 1998 Ralf Baechle ra...@gn...
*
* To do:
*
* - this code is a overbloated pig
* - many of the bug workarounds are not efficient at all, but at
* least they are functional ...
*/
#include <linux/sched.h>
#include <linux/mm.h>
#include <asm/r5900_cacheops.h>
/*
* Zero an entire page. Basically a simple unrolled loop should do the
* job but we want more performance by saving memory bus bandwidth. We
* have five flavours of the routine available for:
*
* - 16byte cachelines and no second level cache
* - 32byte cachelines second level cache
* - a version which handles the buggy R4600 v1.x
* - a version which handles the buggy R4600 v2.0
* - Finally a last version without fancy cache games for the SC and MC
* versions of R4000 and R4400.
*/
static void r5900_clear_page_d16(void* page)
{
__asm__ __volatile__(
".set\tnoreorder\n\t"
".set\tnoat\n\t"
".set\tmips3\n\t"
"daddiu\t$1,%0,%2\n"
"1:\tsq\t$0,(%0)\n\t"
"sq\t$0,16(%0)\n\t"
"daddiu\t%0,64\n\t"
"sq\t$0,-32(%0)\n\t"
"sq\t$0,-16(%0)\n\t"
"bne\t$1,%0,1b\n\t"
"nop\n\t" /* inhibit short loop */
".set\tmips0\n\t"
".set\tat\n\t"
".set\treorder"
:"=r" (page)
:"0" (page),
"I" (PAGE_SIZE));
}
/*
* This is still inefficient. We only can do better if we know the
* virtual address where the copy will be accessed.
*/
#ifdef CONFIG_CPU_R5900_CONTEXT
static void r5900_copy_page_d16(unsigned long to, unsigned long from)
{
unsigned long dummy1, dummy2;
unsigned long reg1, reg2, reg3, reg4;
__asm__ __volatile__(
".set\tnoreorder\n\t"
".set\tnoat\n\t"
".set\tmips3\n\t"
"daddiu\t$1,%0,%8\n"
"1:\tlq\t%2,(%1)\n\t"
"lq\t%3,16(%1)\n\t"
"sq\t%2,(%0)\n\t"
"sq\t%3,16(%0)\n\t"
"daddiu\t%0,64\n\t"
"daddiu\t%1,64\n\t"
"lq\t%2,-32(%1)\n\t"
"lq\t%3,-16(%1)\n\t"
"sq\t%2,-32(%0)\n\t"
"bne\t$1,%0,1b\n\t"
"sq\t%3,-16(%0)\n\t"
".set\tmips0\n\t"
".set\tat\n\t"
".set\treorder"
:"=r" (dummy1), "=r" (dummy2),
"=&r" (reg1), "=&r" (reg2), "=&r" (reg3), "=&r" (reg4)
:"0" (to), "1" (from),
"I" (PAGE_SIZE));
}
#else
static void r5900_copy_page_d16(void *to, void *from)
{
unsigned long dummy1, dummy2;
unsigned long reg1, reg2, reg3, reg4;
__asm__ __volatile__(
".set\tnoreorder\n\t"
".set\tnoat\n\t"
".set\tmips3\n\t"
"daddiu\t$1,%0,%8\n"
"1:\tlw\t%2,(%1)\n\t"
"lw\t%3,4(%1)\n\t"
"lw\t%4,8(%1)\n\t"
"lw\t%5,12(%1)\n\t"
"sw\t%2,(%0)\n\t"
"sw\t%3,4(%0)\n\t"
"sw\t%4,8(%0)\n\t"
"sw\t%5,12(%0)\n\t"
"lw\t%2,16(%1)\n\t"
"lw\t%3,20(%1)\n\t"
"lw\t%4,24(%1)\n\t"
"lw\t%5,28(%1)\n\t"
"sw\t%2,16(%0)\n\t"
"sw\t%3,20(%0)\n\t"
"sw\t%4,24(%0)\n\t"
"sw\t%5,28(%0)\n\t"
"daddiu\t%0,64\n\t"
"daddiu\t%1,64\n\t"
"lw\t%2,-32(%1)\n\t"
"lw\t%3,-28(%1)\n\t"
"lw\t%4,-24(%1)\n\t"
"lw\t%5,-20(%1)\n\t"
"sw\t%2,-32(%0)\n\t"
"sw\t%3,-28(%0)\n\t"
"sw\t%4,-24(%0)\n\t"
"sw\t%5,-20(%0)\n\t"
"lw\t%2,-16(%1)\n\t"
"lw\t%3,-12(%1)\n\t"
"lw\t%4,-8(%1)\n\t"
"lw\t%5,-4(%1)\n\t"
"sw\t%2,-16(%0)\n\t"
"sw\t%3,-12(%0)\n\t"
"sw\t%4,-8(%0)\n\t"
"bne\t$1,%0,1b\n\t"
"sw\t%5,-4(%0)\n\t"
".set\tmips0\n\t"
".set\tat\n\t"
".set\treorder"
:"=r" (dummy1), "=r" (dummy2),
"=&r" (reg1), "=&r" (reg2), "=&r" (reg3), "=&r" (reg4)
:"0" (to), "1" (from),
"I" (PAGE_SIZE));
}
#endif
void pgd_init(unsigned long page)
{
unsigned long *p = (unsigned long *) page;
int i;
for(i = 0; i < USER_PTRS_PER_PGD; i+=8) {
p[i + 0] = (unsigned long) invalid_pte_table;
p[i + 1] = (unsigned long) invalid_pte_table;
p[i + 2] = (unsigned long) invalid_pte_table;
p[i + 3] = (unsigned long) invalid_pte_table;
p[i + 4] = (unsigned long) invalid_pte_table;
p[i + 5] = (unsigned long) invalid_pte_table;
p[i + 6] = (unsigned long) invalid_pte_table;
p[i + 7] = (unsigned long) invalid_pte_table;
}
}
Index: Makefile
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/Makefile,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- Makefile 2001/10/23 17:20:14 1.6
+++ Makefile 2001/10/25 08:10:21 1.7
@@ -24,6 +24,7 @@
obj-$(CONFIG_CPU_R5000) += pg-r4k.o c-r4k.o tlb-r4k.o tlbex-r4k.o
obj-$(CONFIG_CPU_NEVADA) += pg-r4k.o c-r4k.o tlb-r4k.o tlbex-r4k.o
obj-$(CONFIG_CPU_R5432) += pg-r5432.o c-r5432.o tlb-r4k.o tlbex-r4k.o
+obj-$(CONFIG_CPU_R5900) += pg-r5900.o c-r5900.o tlb-r4k.o tlbex-r4k.o
obj-$(CONFIG_CPU_RM7000) += pg-rm7k.o c-rm7k.o tlb-r4k.o tlbex-r4k.o
obj-$(CONFIG_CPU_R10000) += pg-andes.o c-andes.o tlb-r4k.o tlbex-r4k.o
obj-$(CONFIG_CPU_MIPS32) += pg-mips32.o c-mips32.o tlb-r4k.o tlbex-r4k.o
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