Update of /cvsroot/linux-mips/linux/arch/mips64/mm
In directory usw-pr-cvs1:/tmp/cvs-serv11592/arch/mips64/mm
Modified Files:
andes.c
Log Message:
Further syncing with OSS 2.4.10. Massive restructuring of TLB handling.
Index: andes.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/mm/andes.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- andes.c 2001/10/11 23:05:09 1.4
+++ andes.c 2001/10/22 19:16:45 1.5
@@ -152,7 +152,7 @@
entry = get_wired();
/* Blast 'em all away. */
- while(entry < NTLB_ENTRIES) {
+ while (entry < NTLB_ENTRIES) {
set_index(entry);
tlb_write_indexed();
entry++;
@@ -191,7 +191,7 @@
__save_and_cli(flags);
size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
size = (size + 1) >> 1;
- if(size <= NTLB_ENTRIES_HALF) {
+ if (size <= NTLB_ENTRIES_HALF) {
int oldpid = (get_entryhi() & 0xff);
int newpid = (CPU_CONTEXT(smp_processor_id(), mm) & 0xff);
@@ -242,7 +242,7 @@
set_entrylo0(0);
set_entrylo1(0);
set_entryhi(KSEG0);
- if(idx < 0)
+ if (idx < 0)
goto finish;
tlb_write_indexed();
@@ -270,16 +270,16 @@
if (current->active_mm != vma->vm_mm)
return;
- __save_and_cli(flags);
pid = get_entryhi() & 0xff;
- if((pid != (CPU_CONTEXT(smp_processor_id(), vma->vm_mm) & 0xff)) ||
+ if ((pid != (CPU_CONTEXT(smp_processor_id(), vma->vm_mm) & 0xff)) ||
(CPU_CONTEXT(smp_processor_id(), vma->vm_mm) == 0)) {
printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d "
"tlbpid=%d\n", (int) (CPU_CONTEXT(smp_processor_id(),
vma->vm_mm) & 0xff), pid);
}
+ __save_and_cli(flags);
address &= (PAGE_MASK << 1);
set_entryhi(address | (pid));
pgdp = pgd_offset(vma->vm_mm, address);
@@ -290,7 +290,7 @@
set_entrylo0(pte_val(*ptep++) >> 6);
set_entrylo1(pte_val(*ptep) >> 6);
set_entryhi(address | (pid));
- if(idx < 0) {
+ if (idx < 0) {
tlb_write_random();
} else {
tlb_write_indexed();
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