Update of /cvsroot/linux-mips/linux/drivers/ide
In directory usw-pr-cvs1:/tmp/cvs-serv28026/drivers/ide
Modified Files:
it8172.c
Log Message:
* ev96100 new pci support
* fixed a compile problem
* it8172/ivr Makefile cleanup
* it8172 IDE driver bug fixes
Index: it8172.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/ide/it8172.c,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -C2 -d -r1.1.1.1 -r1.2
*** it8172.c 2001/06/22 02:29:32 1.1.1.1
--- it8172.c 2001/08/28 23:12:15 1.2
***************
*** 51,55 ****
static byte it8172_dma_2_pio (byte xfer_rate);
static int it8172_tune_chipset (ide_drive_t *drive, byte speed);
! static int it8172_config_drive_for_dma (ide_drive_t *drive);
static int it8172_dmaproc(ide_dma_action_t func, ide_drive_t *drive);
#endif
--- 51,55 ----
static byte it8172_dma_2_pio (byte xfer_rate);
static int it8172_tune_chipset (ide_drive_t *drive, byte speed);
! static int it8172_config_chipset_for_dma (ide_drive_t *drive);
static int it8172_dmaproc(ide_dma_action_t func, ide_drive_t *drive);
#endif
***************
*** 61,73 ****
{
unsigned long flags;
! u16 master_data;
! u32 slave_data;
int is_slave = (&HWIF(drive)->drives[1] == drive);
- int master_port = 0x40;
- int slave_port = 0x44;
! pio = ide_get_best_pio_mode(drive, pio, 5, NULL);
! pci_read_config_word(HWIF(drive)->pci_dev, master_port, &master_data);
! pci_read_config_dword(HWIF(drive)->pci_dev, slave_port, &slave_data);
/*
--- 61,71 ----
{
unsigned long flags;
! u16 drive_enables;
! u32 drive_timing;
int is_slave = (&HWIF(drive)->drives[1] == drive);
! pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
! pci_read_config_word(HWIF(drive)->pci_dev, 0x40, &drive_enables);
! pci_read_config_dword(HWIF(drive)->pci_dev, 0x44, &drive_timing);
/*
***************
*** 75,96 ****
* are being left at the default values of 8 PCI clocks (242 nsec
* for a 33 MHz clock). These can be safely shortened at higher
! * PIO modes.
*/
if (is_slave) {
! master_data |= 0x4000;
if (pio > 1)
! /* enable PPE and IE */
! master_data |= 0x0060;
} else {
! master_data &= 0xc060;
if (pio > 1)
! /* enable PPE and IE */
! master_data |= 0x0006;
}
save_flags(flags);
cli();
! pci_write_config_word(HWIF(drive)->pci_dev, master_port, master_data);
restore_flags(flags);
}
--- 73,102 ----
* are being left at the default values of 8 PCI clocks (242 nsec
* for a 33 MHz clock). These can be safely shortened at higher
! * PIO modes. The DIOR/DIOW pulse width and recovery times only
! * apply to PIO modes, not to the DMA modes.
*/
+ /*
+ * Enable port 0x44. The IT8172G spec is confused; it calls
+ * this register the "Slave IDE Timing Register", but in fact,
+ * it controls timing for both master and slave drives.
+ */
+ drive_enables |= 0x4000;
+
if (is_slave) {
! drive_enables &= 0xc006;
if (pio > 1)
! /* enable prefetch and IORDY sample-point */
! drive_enables |= 0x0060;
} else {
! drive_enables &= 0xc060;
if (pio > 1)
! /* enable prefetch and IORDY sample-point */
! drive_enables |= 0x0006;
}
save_flags(flags);
cli();
! pci_write_config_word(HWIF(drive)->pci_dev, 0x40, drive_enables);
restore_flags(flags);
}
***************
*** 161,164 ****
--- 167,171 ----
case XFER_MW_DMA_2:
case XFER_MW_DMA_1:
+ case XFER_MW_DMA_0:
case XFER_SW_DMA_2: break;
default: return -1;
***************
*** 183,187 ****
}
! static int it8172_config_drive_for_dma (ide_drive_t *drive)
{
struct hd_driveid *id = drive->id;
--- 190,194 ----
}
! static int it8172_config_chipset_for_dma (ide_drive_t *drive)
{
struct hd_driveid *id = drive->id;
***************
*** 202,209 ****
} else if (id->dma_mword & 0x0002) {
speed = XFER_MW_DMA_1;
} else if (id->dma_1word & 0x0004) {
speed = XFER_SW_DMA_2;
} else {
! speed = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, 5, NULL);
}
--- 209,218 ----
} else if (id->dma_mword & 0x0002) {
speed = XFER_MW_DMA_1;
+ } else if (id->dma_mword & 0x0001) {
+ speed = XFER_MW_DMA_0;
} else if (id->dma_1word & 0x0004) {
speed = XFER_SW_DMA_2;
} else {
! speed = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, 4, NULL);
}
***************
*** 221,225 ****
switch (func) {
case ide_dma_check:
! return ide_dmaproc((ide_dma_action_t)it8172_config_drive_for_dma(drive),
drive);
default :
--- 230,234 ----
switch (func) {
case ide_dma_check:
! return ide_dmaproc((ide_dma_action_t)it8172_config_chipset_for_dma(drive),
drive);
default :
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