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[Linux-mips-commits]CVS: linux/arch/mips/au1000/common irq.c,1.19,1.20 reset.c,1.6,1.7

From: Pete P. <pp...@us...> - 2002-09-25 07:39:30

Update of /cvsroot/linux-mips/linux/arch/mips/au1000/common
In directory usw-pr-cvs1:/tmp/cvs-serv13662/arch/mips/au1000/common

Modified Files:
	irq.c reset.c 
Log Message:
Au updates and Hydrogen Board support.


Index: irq.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/common/irq.c,v
retrieving revision 1.19
retrieving revision 1.20
diff -u -d -r1.19 -r1.20
--- irq.c	29 May 2002 00:23:16 -0000	1.19
+++ irq.c	25 Sep 2002 07:38:57 -0000	1.20
@@ -53,6 +53,8 @@
 #include <asm/pb1500.h>
 #elif defined(CONFIG_MIPS_PB1100)
 #include <asm/pb1100.h>
+#elif defined(CONFIG_MIPS_HYD1100)
+#include <asm/hyd1100.h>
 #else
 #error unsupported alchemy board
 #endif
@@ -428,9 +430,8 @@
 #endif
 #ifdef CONFIG_MIPS_PB1500
 			case AU1000_MAC1_DMA_INT:
-#endif
 			case AU1500_GPIO_204:
-
+#endif
 				setup_local_irq(i, INTC_INT_HIGH_LEVEL, 0);
 				irq_desc[i].handler = &level_irq_type;
 				break;
@@ -457,6 +458,9 @@
 			case AU1000_GPIO_11: // PCMCIA_IRQ#
 			case AU1000_GPIO_13: // DC_IRQ# 
 			case AU1000_GPIO_23: // 2-wire SCL
+#endif
+#ifdef CONFIG_MIPS_HYD1100
+			case AU1000_GPIO_21: // CF IRQ#
 #endif
 				setup_local_irq(i, INTC_INT_LOW_LEVEL, 0);
 				irq_desc[i].handler = &level_irq_type;

Index: reset.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/common/reset.c,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- reset.c	1 May 2002 18:00:29 -0000	1.6
+++ reset.c	25 Sep 2002 07:38:57 -0000	1.7
@@ -102,7 +102,6 @@
 		au_writel(0x00, 0xb1900028); /* sys_clksrc */
 		au_writel(0x00, 0xb1900100); /* sys_pininputen */
 		break;
-		
 	default:
 		break;
 	}
@@ -111,6 +110,15 @@
 	set_cp0_config(CONF_CM_UNCACHED);
 	flush_cache_all();
 	write_32bit_cp0_register(CP0_WIRED, 0);
+
+#ifdef CONFIG_MIPS_PB1500
+	au_writel(0x00000000, 0xAE00001C);
+#endif
+
+#ifdef CONFIG_MIPS_PB1100
+	au_writel(0x00000000, 0xAE00001C);
+#endif
+
 	__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
 }

[Linux-mips-commits]CVS: linux/arch/mips Makefile,1.52,1.53 config.in,1.103,1.104

From: Pete P. <pp...@us...> - 2002-09-25 07:39:30

Update of /cvsroot/linux-mips/linux/arch/mips
In directory usw-pr-cvs1:/tmp/cvs-serv13662/arch/mips

Modified Files:
	Makefile config.in 
Log Message:
Au updates and Hydrogen Board support.


Index: Makefile
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/Makefile,v
retrieving revision 1.52
retrieving revision 1.53
diff -u -d -r1.52 -r1.53
--- Makefile	12 Jul 2002 20:14:26 -0000	1.52
+++ Makefile	25 Sep 2002 07:38:57 -0000	1.53
@@ -401,6 +401,13 @@
 LOADADDR      += 0x80100000
 endif
 
+ifdef CONFIG_MIPS_HYD1100
+LIBS          += arch/mips/au1000/hyd1100/hyd1100.o \
+                 arch/mips/au1000/common/au1000.o
+SUBDIRS       += arch/mips/au1000/hyd1100 arch/mips/au1000/common
+LOADADDR      += 0x80100000
+endif
+
 #
 # IDT 79S334 evaluation board.
 #

Index: config.in
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/config.in,v
retrieving revision 1.103
retrieving revision 1.104
diff -u -d -r1.103 -r1.104
--- config.in	12 Jul 2002 20:14:26 -0000	1.103
+++ config.in	25 Sep 2002 07:38:57 -0000	1.104
@@ -30,6 +30,7 @@
 fi
 bool 'Support for Alchemy Semi PB1100 board' CONFIG_MIPS_PB1100
 bool 'Support for Alchemy Semi PB1500 board' CONFIG_MIPS_PB1500
+bool 'Support for Alchemy Semi HYD1100 board' CONFIG_MIPS_HYD1100
 dep_bool 'Support for Algorithmics P4032 (EXPERIMENTAL)' CONFIG_ALGOR_P4032 $CONFIG_EXPERIMENTAL
 dep_bool 'Support for BAGET MIPS series (EXPERIMENTAL)' CONFIG_BAGET_MIPS $CONFIG_EXPERIMENTAL
 dep_bool 'Support for Cobalt Server (EXPERIMENTAL)' CONFIG_MIPS_COBALT $CONFIG_EXPERIMENTAL
@@ -171,6 +172,16 @@
    define_bool CONFIG_NONCOHERENT_IO y
    define_bool CONFIG_PC_KEYB y
    define_bool CONFIG_AU1000_USB_DEVICE y
+fi
+if [ "$CONFIG_MIPS_HYD1100" = "y" ]; then
+   define_bool CONFIG_MIPS_AU1000 y
+   define_bool CONFIG_NEW_IRQ y
+   define_bool CONFIG_PCI y
+   define_bool CONFIG_PCI_AUTO n
+   define_bool CONFIG_NEW_PCI y
+   define_bool CONFIG_NONCOHERENT_IO y
+   define_bool CONFIG_PC_KEYB y
+   define_bool CONFIG_SWAP_IO_SPACE y
 fi
 if [ "$CONFIG_IDT_79S334" = "y" ]; then
    define_bool CONFIG_MIPS_RC32334 y

[Linux-mips-commits]CVS: linux/drivers/video Config.in,1.19,1.20 au1100fb.c,1.7,1.8 au1100fb.h,1.5,1.6

From: Pete P. <pp...@us...> - 2002-09-25 07:39:03

Update of /cvsroot/linux-mips/linux/drivers/video
In directory usw-pr-cvs1:/tmp/cvs-serv13662/drivers/video

Modified Files:
	Config.in au1100fb.c au1100fb.h 
Log Message:
Au updates and Hydrogen Board support.


Index: Config.in
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/video/Config.in,v
retrieving revision 1.19
retrieving revision 1.20
diff -u -d -r1.19 -r1.20
--- Config.in	27 Jun 2002 21:13:06 -0000	1.19
+++ Config.in	25 Sep 2002 07:38:59 -0000	1.20
@@ -134,6 +134,9 @@
 	 if [ "$CONFIG_FB_ATY" != "n" ]; then
 	    bool '    Mach64 GX support (EXPERIMENTAL)' CONFIG_FB_ATY_GX
 	    bool '    Mach64 CT/VT/GT/LT (incl. 3D RAGE) support' CONFIG_FB_ATY_CT
+	    if [ "$CONFIG_FB_ATY_CT" != "n" ]; then
+	       bool '    Rage XL No-BIOS Init support' CONFIG_FB_ATY_XL_INIT
+	    fi
 	 fi
  	 tristate '  ATI Radeon display support (EXPERIMENTAL)' CONFIG_FB_RADEON
 	 tristate '  ATI Rage128 display support (EXPERIMENTAL)' CONFIG_FB_ATY128
@@ -161,6 +164,9 @@
          fi
          if [ "$CONFIG_MIPS_PB1100" = "y" ]; then
 	    bool '    Au1100 LCD Driver' CONFIG_FB_AU1100
+         fi
+         if [ "$CONFIG_MIPS_HYD1100" = "y" ]; then
+ 	    bool '    Au1100 LCD Driver' CONFIG_FB_AU1100
          fi
       fi
       tristate '  ITE IT8181 framebuffer support' CONFIG_FB_IT8181

Index: au1100fb.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/video/au1100fb.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- au1100fb.c	1 May 2002 18:00:31 -0000	1.7
+++ au1100fb.c	25 Sep 2002 07:38:59 -0000	1.8
@@ -61,7 +61,8 @@
  * Sanity check. If this is a new Au1100 based board, search for
  * the PB1100 ifdefs to make sure you modify the code accordingly.
  */
-#ifndef CONFIG_MIPS_PB1100
+#if defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_HYD1100)
+#else
 error Unknown Au1100 board
 #endif
 
@@ -318,8 +319,15 @@
 		p_lcd_reg->lcd_control |= LCD_CONTROL_GO;
 		au_writew(au_readw(PB1100_G_CONTROL) | p_lcd->mode_backlight, 
 			PB1100_G_CONTROL);
-		au_sync();
 #endif
+#ifdef CONFIG_MIPS_HYD1100
+		// Set to MAX high time on PWM
+		writel(0xfff,0xb5000028);
+		//DWPFIX is this the write PWM?
+		writel(0x1fff,0xb5000024);
+		writel(1<<23,0xb190010c);
+#endif
+		au_sync();
 		break;
 
 	case VESA_VSYNC_SUSPEND:
@@ -328,11 +336,17 @@
 		/* turn off panel */
 		//printk("turn off panel\n");
 #ifdef CONFIG_MIPS_PB1100
-		p_lcd_reg->lcd_control &= ~LCD_CONTROL_GO;
 		au_writew(au_readw(PB1100_G_CONTROL) & ~p_lcd->mode_backlight, 
 			PB1100_G_CONTROL);
-		au_sync();
+		p_lcd_reg->lcd_control &= ~LCD_CONTROL_GO;
+#endif
+#ifdef CONFIG_MIPS_HYD1100X
+		writel(0,0xb5000028);
+		writel(0,0xb5000024);
+		writel(0<<23,0xb190010c);
+		p_lcd_reg->lcd_control &= ~LCD_CONTROL_GO;
 #endif
+		au_sync();
 		break;
 	default: 
 		break;
@@ -395,7 +409,8 @@
 	vma->vm_pgoff = off >> PAGE_SHIFT;
 
 	pgprot_val(vma->vm_page_prot) &= ~_CACHE_MASK;
-	pgprot_val(vma->vm_page_prot) |= _CACHE_CACHABLE_NONCOHERENT;
+	//pgprot_val(vma->vm_page_prot) |= _CACHE_CACHABLE_NONCOHERENT;
+	pgprot_val(vma->vm_page_prot) |= (6 << 9); //CCA=6
 
 	/* This is an IO map - tell maydump to skip this VMA */
 	vma->vm_flags |= VM_IO;
@@ -472,12 +487,21 @@
 	p_lcd_reg->lcd_words = words - 1;
 	p_lcd_reg->lcd_dmaaddr0 = fb_info.fb_phys;
 
-#ifdef CONFIG_MIPS_PB1100
 	/* turn on panel */
+#ifdef CONFIG_MIPS_PB1100
 	au_writew(au_readw(PB1100_G_CONTROL) | p_lcd->mode_backlight, 
 			PB1100_G_CONTROL);
-	p_lcd_reg->lcd_control |= LCD_CONTROL_GO;
 #endif
+#ifdef CONFIG_MIPS_HYD1100
+#ifdef CONFIG_MIPS_HYD1100
+		// Set to MAX high time on PWM
+		writel(0xfff,0xb5000028);
+		//DWPFIX is this the write PWM?
+		writel(0x1fff,0xb5000024);
+		writel(1<<23,0xb190010c);
+#endif
+#endif
+	p_lcd_reg->lcd_control |= LCD_CONTROL_GO;
 
 	return 0;
 }
@@ -612,6 +636,19 @@
 	for(this_opt=strtok(options, ","); this_opt;
 	    this_opt=strtok(NULL, ",")) {
 		if (!strncmp(this_opt, "panel:", 6)) {
+#ifdef CONFIG_MIPS_PB1100
+			/* Read Pb1100 Switch S10 ? */
+			if (!strncmp(this_opt+6, "s10", 3))
+			{
+				int panel;
+				panel = *(volatile int *)0xAE000008; /* BCSR SWITCHES */
+				panel >>= 8;
+				panel &= 0x0F;
+				if (panel >= num_panels) panel = 0;
+				my_lcd_index = panel;
+			}
+			else
+#endif
 			/* Get the panel name, everything else if fixed */
 			for (i=0; i<num_panels; i++) {
 				if (!strncmp(this_opt+6, panels[i].panel_name, 
@@ -626,6 +663,9 @@
 			fb_info.nohwcursor = 1;
 		}
 	} 
+
+	printk("au1100fb: Panel %d %s\n", my_lcd_index,
+		panels[my_lcd_index].panel_name);
 }
 
 

Index: au1100fb.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/video/au1100fb.h,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- au1100fb.h	15 May 2002 16:53:54 -0000	1.5
+++ au1100fb.h	25 Sep 2002 07:38:59 -0000	1.6
@@ -191,7 +191,7 @@
  */
 struct known_lcd_panels panels[] =
 {
-	{ /* 0: Pb1100 LCDA: Sharp 320x240 TFT panel */
+	{ /* 0: Pb1100 LCDA: Sharp 320x240x16bpp TFT panel, no rotate */
 		320, /* xres */
 		240, /* yres */
 		16,  /* bpp  */
@@ -206,6 +206,60 @@
 		/*LCD_CONTROL_DB*/
 		/*LCD_CONTROL_CCO*/
 		/*LCD_CONTROL_DP*/
+		| LCD_CONTROL_PO_00
+		/*LCD_CONTROL_MPI*/
+		| LCD_CONTROL_PT
+		| LCD_CONTROL_PC
+		| LCD_CONTROL_BPP_16 ),
+
+		/* mode_horztiming */
+		( LCD_HORZTIMING_HN2_N(8)
+		| LCD_HORZTIMING_HN1_N(60)
+		| LCD_HORZTIMING_HPW_N(12)
+		| LCD_HORZTIMING_PPL_N(320) ),
+
+		/* mode_verttiming */
+		( LCD_VERTTIMING_VN2_N(5)
+		| LCD_VERTTIMING_VN1_N(17)
+		| LCD_VERTTIMING_VPW_N(1)
+		| LCD_VERTTIMING_LPP_N(240) ),
+
+		/* mode_clkcontrol */
+		( 0
+		/*LCD_CLKCONTROL_IB*/
+		/*LCD_CLKCONTROL_IC*/
+		/*LCD_CLKCONTROL_IH*/
+		/*LCD_CLKCONTROL_IV*/
+		| LCD_CLKCONTROL_PCD_N(1) ),
+
+		/* mode_pwmdiv */
+		0,
+
+		/* mode_pwmhi */
+		0,
+
+		/* mode_toyclksrc */
+		((1<<7) | (1<<6) | (1<<5)),
+
+		/* mode_backlight */
+		6
+	},
+
+	{ /* 1: Pb1100 LCDA: Sharp 320x240x16bpp TFT panel, rotated */
+		240, /* xres */
+		320, /* yres */
+		16,  /* bpp  */
+		
+		"Sharp_320x240_16",
+		/* mode_control */
+		( LCD_CONTROL_SBPPF_565
+		/*LCD_CONTROL_WP*/
+		/*LCD_CONTROL_WD*/
+		| LCD_CONTROL_C
+		| LCD_CONTROL_SM_0
+		/*LCD_CONTROL_DB*/
+		/*LCD_CONTROL_CCO*/
+		/*LCD_CONTROL_DP*/
 		| LCD_DEFAULT_PIX_FORMAT
 		/*LCD_CONTROL_MPI*/
 		| LCD_CONTROL_PT
@@ -245,7 +299,39 @@
 		6
 	},
 
-	{ /* 1: Pb1100 LCDC 640x480 TFT panel */
+	{ /* 2: Pb1100 LCDB 640x480x16bpp PrimeView TFT panel */
+		640, /* xres */
+		480, /* yres */
+		16,  /* bpp  */
+
+		"Primeview_640x480_16",
+
+		/* mode_control */
+		0x0004886a,
+
+		/* mode_horztiming */
+		0x0e4bfe7f,
+
+		/* mode_verttiming */
+		0x210805df,
+
+		/* mode_clkcontrol */
+		0x00038001,
+
+		/* mode_pwmdiv */
+		0,
+
+		/* mode_pwmhi */
+		0,
+
+		/* mode_toyclksrc */
+		((1<<7) | (1<<6) | (0<<5)),
+
+		/* mode_backlight */
+		7
+	},
+
+	{ /* 3: Pb1100 LCDC 640x480x16bpp TFT panel */
 		640, /* xres */
 		480, /* yres */
 		16,  /* bpp  */
@@ -253,7 +339,11 @@
 		"Generic_640x480_16",
 
 		/* mode_control */
+#ifdef CONFIG_MIPS_HYD1100
+		0x0004c15a,
+#else
 		0x004806a | LCD_DEFAULT_PIX_FORMAT,
+#endif
 
 		/* mode_horztiming */
 		0x3434d67f,
@@ -282,24 +372,31 @@
 		7
 	},
 
-	{ /* 2: Pb1100 LCDB 640x480 PrimeView TFT panel */
+	{ // 4: Pb1100 NEON: 640x480x16bpp CRT, HOG, Hsync 30.7 kHz, Vsync 57.7 Hz
 		640, /* xres */
 		480, /* yres */
-		16,  /* bpp  */
+		16,  /* bpp */
 
-		"PrimeView_640x480_16",
+		"NEON_640x480_16",
 
 		/* mode_control */
 		0x0004886a | LCD_DEFAULT_PIX_FORMAT,
 
-		/* mode_horztiming */
-		0x0e4bfe7f,
+		// mode_horztiming
+		// 15 pixels front porch
+		// 76 pixels back porch
+		// 64 pixels sync pulse
+		0x1e3bfe7f,
 
-		/* mode_verttiming */
+		// mode_verttiming
+		// 34 lines front porch
+		// 9 lines back porch
+		// 2 lines sync pulse
 		0x210805df,
 
 		/* mode_clkcontrol */
-		0x00038001,
+		// div to 24 MHz
+		0x00020001,
 
 		/* mode_pwmdiv */
 		0,
@@ -308,13 +405,14 @@
 		0,
 
 		/* mode_toyclksrc */
+		// use 48 MHz clock
 		((1<<7) | (1<<6) | (0<<5)),
 
 		/* mode_backlight */
 		7
 	},
 
-	{ /* 3: Pb1100 800x600x16bpp NEON CRT */
+	{ //5: Pb1100 NEON: 800x600x16bpp CRT, HOG, Hsync 45.7 kHz, Vsync 68.7 Hz
 		800, /* xres */
 		600, /* yres */
 		16,  /* bpp */
@@ -324,13 +422,20 @@
 		/* mode_control */
 		0x0004886A | LCD_DEFAULT_PIX_FORMAT,
 
-		/* mode_horztiming */
-		0x005AFF1F,
+		// mode_horztiming
+		// 32 pixels front porch
+		// 152 pixels back porch
+		// 64 pixels sync pulse
+		0x1F97FF1F,
 
-		/* mode_verttiming */
-		0x16000E57,
+		// mode_verttiming
+		// 37 lines front porch
+		// 23 lines back porch
+		// 6 lines sync pulse
+		0x24161A57,
 
 		/* mode_clkcontrol */
+		// keep at 47 MHz
 		0x00020000,
 
 		/* mode_pwmdiv */
@@ -340,13 +445,14 @@
 		0,
 
 		/* mode_toyclksrc */
+		// use 48 MHz clock
 		((1<<7) | (1<<6) | (0<<5)),
-
+		
 		/* mode_backlight */
 		7
 	},
 
-	{ /* 4: Pb1100 640x480x16bpp NEON CRT */
+	{ //6: Pb1100 NEON: 800x600x16bpp CRT, HOG, Hsync 45.7 kHz, Vsync 68.7 Hz
 		640, /* xres */
 		480, /* yres */
 		16,  /* bpp */
@@ -356,13 +462,20 @@
 		/* mode_control */
 		0x0004886A | LCD_DEFAULT_PIX_FORMAT,
 
-		/* mode_horztiming */
-		0x0052E27F,
+		// mode_horztiming
+		// 32 pixels front porch
+		// 152 pixels back porch
+		// 64 pixels sync pulse
+		0x1F97FF1F,
 
-		/* mode_verttiming */
-		0x18000DDF,
+		// mode_verttiming
+		// 37 lines front porch
+		// 23 lines back porch
+		// 6 lines sync pulse
+		0x24161A57,
 
 		/* mode_clkcontrol */
+		// keep at 47 MHz
 		0x00020000,
 
 		/* mode_pwmdiv */
@@ -372,10 +485,54 @@
 		0,
 
 		/* mode_toyclksrc */
+		// use 48 MHz clock
 		((1<<7) | (1<<6) | (0<<5)),
+		
+		/* mode_backlight */
+		7
+	},
 
+	{ //7: Pb1100 NEON: 800x600x16bpp CRT, HOG, Hsync 45.7 kHz, Vsync 68.7 Hz
+		800, /* xres */
+		600, /* yres */
+		16,  /* bpp */
+
+		"NEON_800x600_16",
+
+
+	  	/* mode_control */
+	   	0x0004886A,
+
+		// mode_horztiming
+		// 32 pixels front porch
+		// 152 pixels back porch
+		// 64 pixels sync pulse
+		0x1F97FF1F,
+
+		// mode_verttiming
+		// 37 lines front porch
+		// 23 lines back porch
+		// 6 lines sync pulse
+		0x24161A57,
+
+		/* mode_clkcontrol */
+		// keep at 47 MHz
+		0x00020000,
+
+		/* mode_pwmdiv */
+		0,
+
+		/* mode_pwmhi */
+		0,
+
+		/* mode_toyclksrc */
+		// use 48 MHz clock
+		((1<<7) | (1<<6) | (0<<5)),
+		
 		/* mode_backlight */
 		7
 	},
+
+
 };
 #endif /* _AU1100LCD_H */

[Linux-mips-commits]CVS: linux/include/asm-mips hyd1100.h,NONE,1.1 au1000.h,1.20,1.21 au1000_pcmcia.h,1.8,1.9

From: Pete P. <pp...@us...> - 2002-09-25 07:39:03

Update of /cvsroot/linux-mips/linux/include/asm-mips
In directory usw-pr-cvs1:/tmp/cvs-serv13662/include/asm-mips

Modified Files:
	au1000.h au1000_pcmcia.h 
Added Files:
	hyd1100.h 
Log Message:
Au updates and Hydrogen Board support.


--- NEW FILE: hyd1100.h ---
/*
 * Alchemy Semi Hyd1100 Referrence Board
 *
 * Copyright 2001 MontaVista Software Inc.
 * Author: MontaVista Software, Inc.
 *         	pp...@mv... or so...@mv...
 *
 * ########################################################################
 *
 *  This program is free software; you can distribute it and/or modify it
 *  under the terms of the GNU General Public License (Version 2) as
 *  published by the Free Software Foundation.
 *
 *  This program is distributed in the hope it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 *
 * ########################################################################
 *
 * 
 */
#ifndef __ASM_HYD1100_H
#define __ASM_HYD1100_H

#define PCMCIA_MAX_SOCK 0

#endif /* __ASM_HYD1100_H */

Index: au1000.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/au1000.h,v
retrieving revision 1.20
retrieving revision 1.21
diff -u -d -r1.20 -r1.21
--- au1000.h	29 May 2002 00:23:17 -0000	1.20
+++ au1000.h	25 Sep 2002 07:38:59 -0000	1.21
@@ -724,7 +724,52 @@
 #define SSI1_CONFIG                0xB1680020
 #define SSI1_ADATA                 0xB1680024
 #define SSI1_CLKDIV                0xB1680028
-#define SSI1_CONTROL               0xB1680100
+#define SSI1_ENABLE                0xB1680100
+
+/*
+ * Register content definitions
+ */
+#define SSI_STATUS_BF				(1<<4)
+#define SSI_STATUS_OF				(1<<3)
+#define SSI_STATUS_UF				(1<<2)
+#define SSI_STATUS_D				(1<<1)
+#define SSI_STATUS_B				(1<<0)
+
+/* SSI_INT */
+#define SSI_INT_OI					(1<<3)
+#define SSI_INT_UI					(1<<2)
+#define SSI_INT_DI					(1<<1)
+
+/* SSI_INTEN */
+#define SSI_INTEN_OIE				(1<<3)
+#define SSI_INTEN_UIE				(1<<2)
+#define SSI_INTEN_DIE				(1<<1)
+
+#define SSI_CONFIG_AO				(1<<24)
+#define SSI_CONFIG_DO				(1<<23)
+#define SSI_CONFIG_ALEN				(7<<20)
+#define SSI_CONFIG_DLEN				(15<<16)
+#define SSI_CONFIG_DD				(1<<11)
+#define SSI_CONFIG_AD				(1<<10)
+#define SSI_CONFIG_BM				(3<<8)
+#define SSI_CONFIG_CE				(1<<7)
+#define SSI_CONFIG_DP				(1<<6)
+#define SSI_CONFIG_DL				(1<<5)
+#define SSI_CONFIG_EP				(1<<4)
+#define SSI_CONFIG_ALEN_N(N)		((N-1)<<20)
+#define SSI_CONFIG_DLEN_N(N)		((N-1)<<16)
+#define SSI_CONFIG_BM_HI			(0<<8)
+#define SSI_CONFIG_BM_LO			(1<<8)
+#define SSI_CONFIG_BM_CY			(2<<8)
+
+#define SSI_ADATA_D					(1<<24)
+#define SSI_ADATA_ADDR				(0xFF<<16)
+#define SSI_ADATA_DATA				(0x0FFF)
+#define SSI_ADATA_ADDR_N(N)			(N<<16)
+
+#define SSI_ENABLE_CD				(1<<1)
+#define SSI_ENABLE_E				(1<<0)
+
 
 /* IrDA Controller */
 #define IRDA_BASE                 0xB0300000

Index: au1000_pcmcia.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/au1000_pcmcia.h,v
retrieving revision 1.8
retrieving revision 1.9
diff -u -d -r1.8 -r1.9
--- au1000_pcmcia.h	19 Apr 2002 19:12:52 -0000	1.8
+++ au1000_pcmcia.h	25 Sep 2002 07:39:00 -0000	1.9
@@ -87,6 +87,8 @@
 
 #if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500)
 extern struct pcmcia_low_level pb1x00_pcmcia_ops;
+#elif defined (CONFIG_MIPS_HYD1100)
+extern struct pcmcia_low_level hyd1100_pcmcia_ops;
 #else
 error unknown Au1000 board
 #endif

[Linux-mips-commits]CVS: linux/drivers/pcmcia au1000_hyd1100.c,NONE,1.1 Config.in,1.6,1.7 Makefile,1.7,1.8 au1000_generic.c,1.13,1.14

From: Pete P. <pp...@us...> - 2002-09-25 07:39:03

Update of /cvsroot/linux-mips/linux/drivers/pcmcia
In directory usw-pr-cvs1:/tmp/cvs-serv13662/drivers/pcmcia

Modified Files:
	Config.in Makefile au1000_generic.c 
Added Files:
	au1000_hyd1100.c 
Log Message:
Au updates and Hydrogen Board support.


--- NEW FILE: au1000_hyd1100.c ---
/*
 *
 * Alchemy Semi Hyd1100 board specific pcmcia routines.
 *
 * Copyright 2002 MontaVista Software Inc.
 * Author: MontaVista Software, Inc.
 *         	pp...@mv... or so...@mv...
 *
 * ########################################################################
 *
 *  This program is free software; you can distribute it and/or modify it
 *  under the terms of the GNU General Public License (Version 2) as
 *  published by the Free Software Foundation.
 *
 *  This program is distributed in the hope it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 *
 * ########################################################################
 *
 * 
 */
#include <linux/module.h>
#include <linux/init.h>
#include <linux/config.h>
#include <linux/delay.h>
#include <linux/ioport.h>
#include <linux/kernel.h>
#include <linux/tqueue.h>
#include <linux/timer.h>
#include <linux/mm.h>
#include <linux/proc_fs.h>
#include <linux/version.h>
#include <linux/types.h>

#include <pcmcia/version.h>
#include <pcmcia/cs_types.h>
#include <pcmcia/cs.h>
#include <pcmcia/ss.h>
#include <pcmcia/bulkmem.h>
#include <pcmcia/cistpl.h>
#include <pcmcia/bus_ops.h>
#include "cs_internal.h"

#include <asm/io.h>
#include <asm/irq.h>
#include <asm/system.h>

#include <asm/au1000.h>
#include <asm/au1000_pcmcia.h>
#include <asm/hyd1100.h>


static int hyd1100_pcmcia_init(struct pcmcia_init *init)
{
	return 1; // one slot
}

static int hyd1100_pcmcia_shutdown(void)
{
	return 0; // nothing to do
}

static int 
hyd1100_pcmcia_socket_state(unsigned sock, struct pcmcia_state *state)
{
	u32 inserted;
	inserted = (readl(SYS_PINSTATERD) & (1<<22)) ? 0 : 1;

	state->ready = 0;
	state->vs_Xv = 0;
	state->vs_3v = 0;
	state->detect = 0;

	if (inserted)
	{
		state->vs_3v=1;
		state->detect = 1;
		state->ready = 1;
	}

	state->bvd1=1;
	state->bvd2=1;
	state->wrprot=0; 
	return 1;
}


static int hyd1100_pcmcia_get_irq_info(struct pcmcia_irq_info *info)
{

	if(info->sock > PCMCIA_MAX_SOCK) return -1;

	if(info->sock == 0)
		info->irq = AU1000_GPIO_21;
	else 
		info->irq = -1;

	return 0;
}


static int 
hyd1100_pcmcia_configure_socket(const struct pcmcia_configure *configure)
{
	if(configure->sock > PCMCIA_MAX_SOCK) return -1;

	au_sync_delay(300);

	if (!configure->reset) {
		// de-assert reset
		writel(0x00010000, 0xb1700008);
		au_sync_delay(100);
	}
	else {
		// assert reset
		writel(0x00010001, 0xb1700008);
		au_sync_delay(300);
	}
	return 0;
}

void hyd1100_init()
{
	struct pcmcia_configure conf;
	hyd1100_pcmcia_init(NULL);

	conf.sock = 0;
	conf.vcc = 50;
	conf.vpp = 50;
	conf.reset = 1;
	hyd1100_pcmcia_configure_socket(&conf);
}

struct pcmcia_low_level hyd1100_pcmcia_ops = { 
	hyd1100_pcmcia_init,
	hyd1100_pcmcia_shutdown,
	hyd1100_pcmcia_socket_state,
	hyd1100_pcmcia_get_irq_info,
	hyd1100_pcmcia_configure_socket
};

Index: Config.in
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/pcmcia/Config.in,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- Config.in	19 Apr 2002 19:12:52 -0000	1.6
+++ Config.in	25 Sep 2002 07:38:59 -0000	1.7
@@ -28,6 +28,7 @@
       dep_tristate '  Au1x00 pcmcia support' CONFIG_PCMCIA_AU1000 $CONFIG_PCMCIA 
       if [ "$CONFIG_PCMCIA_AU1000" != "n" ]; then
         dep_bool '  Pb1x00 board support' CONFIG_PCMCIA_PB1X00
+        dep_bool '  Hyd1100 support' CONFIG_PCMCIA_HYD1100
       fi
    fi
 fi

Index: Makefile
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/pcmcia/Makefile,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- Makefile	19 Apr 2002 19:12:52 -0000	1.7
+++ Makefile	25 Sep 2002 07:38:59 -0000	1.8
@@ -62,6 +62,7 @@
 obj-$(CONFIG_PCMCIA_AU1000)			+= au1x00_ss.o
 au1000_ss-objs-y				:= au1000_generic.o
 au1000_ss-objs-$(CONFIG_PCMCIA_PB1X00)		+= au1000_pb1x00.o
+au1000_ss-objs-$(CONFIG_PCMCIA_HYD1100)	+= au1000_hyd1100.o
 
 obj-$(CONFIG_PCMCIA_SA1100)	+= sa1100_cs.o
 

Index: au1000_generic.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/pcmcia/au1000_generic.c,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -d -r1.13 -r1.14
--- au1000_generic.c	18 Jun 2002 23:07:27 -0000	1.13
+++ au1000_generic.c	25 Sep 2002 07:38:59 -0000	1.14
@@ -156,6 +156,8 @@
 
 #if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500)
 	pcmcia_low_level=&pb1x00_pcmcia_ops;
+#elif defined(CONFIG_MIPS_HYD1100)
+	pcmcia_low_level=&hyd1100_pcmcia_ops;
 #else
 #error Unsupported AU1000 board.
 #endif

[Linux-mips-commits]CVS: linux/drivers/net au1000_eth.h,1.5,1.6