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From: Steve L. <slo...@us...> - 2002-04-12 21:59:19
|
Update of /cvsroot/linux-mips/linux/drivers/sound In directory usw-pr-cvs1:/tmp/cvs-serv14263/drivers/sound Modified Files: ite8172.c Log Message: PCI and sound fixes to IT8172 reference board. Index: ite8172.c =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/sound/ite8172.c,v retrieving revision 1.4 retrieving revision 1.5 diff -u -d -r1.4 -r1.5 --- ite8172.c 18 Mar 2002 22:31:38 -0000 1.4 +++ ite8172.c 12 Apr 2002 21:59:15 -0000 1.5 @@ -51,6 +51,10 @@ * Revision history * 02.08.2001 Initial release * 06.22.2001 Added I2S support + * 03.20.2002 Added mutex locks around read/write methods, to prevent + * simultaneous access on SMP or preemptible kernels. Also + * removed the counter/pointer fragment aligning at the end + * of read/write methods [stevel]. */ #include <linux/version.h> #include <linux/module.h> @@ -292,6 +296,7 @@ spinlock_t lock; struct semaphore open_sem; + struct semaphore sem; mode_t open_mode; wait_queue_head_t open_wait; @@ -407,35 +412,31 @@ return sr; } +/* hold a spin-lock or stop the ADC before calling */ static void set_adc_rate(struct it8172_state *s, unsigned rate) { - unsigned long flags; unsigned short sr; sr = get_compat_rate(&rate); - spin_lock_irqsave(&s->lock, flags); s->capcc &= ~CC_SR_MASK; s->capcc |= sr; outw(s->capcc, s->io+IT_AC_CAPCC); - spin_unlock_irqrestore(&s->lock, flags); s->adcrate = rate; } +/* hold a spin-lock or stop the DAC before calling */ static void set_dac_rate(struct it8172_state *s, unsigned rate) { - unsigned long flags; unsigned short sr; sr = get_compat_rate(&rate); - spin_lock_irqsave(&s->lock, flags); s->pcc &= ~CC_SR_MASK; s->pcc |= sr; outw(s->pcc, s->io+IT_AC_PCC); - spin_unlock_irqrestore(&s->lock, flags); s->dacrate = rate; } @@ -768,8 +769,6 @@ unsigned short vol, mute; unsigned long newptr; - spin_lock(&s->lock); - isc = inb(s->io+IT_AC_ISC); /* fastpath out, to ease interrupt sharing */ @@ -778,6 +777,8 @@ return; } + spin_lock(&s->lock); + /* clear audio interrupts first */ outb(isc | ISC_VCI | ISC_CCI | ISC_PCI, s->io+IT_AC_ISC); @@ -802,9 +803,13 @@ if (isc & ISC_CCI) { if (adc->count > adc->dmasize - adc->fragsize) { // Overrun. Stop ADC and log the error + spin_unlock(&s->lock); stop_adc(s); + spin_lock(&s->lock); adc->error++; +#ifdef IT8172_VERBOSE_DEBUG dbg("adc overrun"); +#endif } else { newptr = virt_to_bus(adc->nextIn) + 2*adc->fragsize; if (newptr >= adc->dmaaddr + adc->dmasize) @@ -848,8 +853,16 @@ if (waitqueue_active(&dac->wait)) wake_up_interruptible(&dac->wait); - if (dac->count <= 0) + if (dac->count <= 0) { +#ifdef IT8172_VERBOSE_DEBUG + dbg("dac underrun"); +#endif + spin_unlock(&s->lock); stop_dac(s); + spin_lock(&s->lock); + dac->count = 0; + dac->nextIn = dac->nextOut; + } } spin_unlock(&s->lock); @@ -1090,7 +1103,7 @@ struct dmabuf *db = &s->dma_adc; ssize_t ret; unsigned long flags; - int cnt, remainder, avail; + int cnt, avail; if (ppos != &file->f_pos) return -ESPIPE; @@ -1100,26 +1113,30 @@ return -EFAULT; ret = 0; + down(&s->sem); + while (count > 0) { // wait for samples in capture buffer do { - spin_lock_irqsave(&s->lock, flags); if (db->stopped) start_adc(s); + spin_lock_irqsave(&s->lock, flags); avail = db->count; spin_unlock_irqrestore(&s->lock, flags); if (avail <= 0) { if (file->f_flags & O_NONBLOCK) { if (!ret) ret = -EAGAIN; - return ret; + goto out; } + up(&s->sem); interruptible_sleep_on(&db->wait); if (signal_pending(current)) { if (!ret) ret = -ERESTARTSYS; - return ret; + goto out; } + down(&s->sem); } } while (avail <= 0); @@ -1128,7 +1145,7 @@ avail : count, 1)) < 0) { if (!ret) ret = -EFAULT; - return ret; + goto out; } spin_lock_irqsave(&s->lock, flags); @@ -1144,25 +1161,8 @@ ret += cnt; } // while (count > 0) - /* - * See if the dma buffer count after this read call is - * aligned on a fragsize boundary. If not, read from - * buffer until we reach a boundary, and let's hope this - * is just the last remainder of an audio record. If not - * it means the user is not reading in fragsize chunks, in - * which case it's his/her fault that there are audio gaps - * in their record. - */ - spin_lock_irqsave(&s->lock, flags); - remainder = db->count % db->fragsize; - if (remainder) { - db->nextOut += remainder; - if (db->nextOut >= db->rawbuf + db->dmasize) - db->nextOut -= db->dmasize; - db->count -= remainder; - } - spin_unlock_irqrestore(&s->lock, flags); - + out: + up(&s->sem); return ret; } @@ -1173,7 +1173,7 @@ struct dmabuf *db = &s->dma_dac; ssize_t ret; unsigned long flags; - int cnt, remainder, avail; + int cnt, avail; if (ppos != &file->f_pos) return -ESPIPE; @@ -1182,7 +1182,9 @@ if (!access_ok(VERIFY_READ, buffer, count)) return -EFAULT; ret = 0; - + + down(&s->sem); + while (count > 0) { // wait for space in playback buffer do { @@ -1193,14 +1195,16 @@ if (file->f_flags & O_NONBLOCK) { if (!ret) ret = -EAGAIN; - return ret; + goto out; } + up(&s->sem); interruptible_sleep_on(&db->wait); if (signal_pending(current)) { if (!ret) ret = -ERESTARTSYS; - return ret; + goto out; } + down(&s->sem); } } while (avail <= 0); @@ -1210,45 +1214,25 @@ avail : count, 0)) < 0) { if (!ret) ret = -EFAULT; - return ret; + goto out; } spin_lock_irqsave(&s->lock, flags); db->count += cnt; - if (db->stopped) - start_dac(s); - spin_unlock_irqrestore(&s->lock, flags); - db->nextIn += cnt; if (db->nextIn >= db->rawbuf + db->dmasize) db->nextIn -= db->dmasize; + spin_unlock_irqrestore(&s->lock, flags); + if (db->stopped) + start_dac(s); count -= cnt; buffer += cnt; ret += cnt; } // while (count > 0) - /* - * See if the dma buffer count after this write call is - * aligned on a fragsize boundary. If not, fill buffer - * with silence to the next boundary, and let's hope this - * is just the last remainder of an audio playback. If not - * it means the user is not sending us fragsize chunks, in - * which case it's his/her fault that there are audio gaps - * in their playback. - */ - spin_lock_irqsave(&s->lock, flags); - remainder = db->count % db->fragsize; - if (remainder) { - int fill_cnt = db->fragsize - remainder; - memset(db->nextIn, 0, fill_cnt); - db->nextIn += fill_cnt; - if (db->nextIn >= db->rawbuf + db->dmasize) - db->nextIn -= db->dmasize; - db->count += fill_cnt; - } - spin_unlock_irqrestore(&s->lock, flags); - + out: + up(&s->sem); return ret; } @@ -1295,31 +1279,37 @@ struct it8172_state *s = (struct it8172_state *)file->private_data; struct dmabuf *db; unsigned long size; - + int ret = 0; + lock_kernel(); + down(&s->sem); + if (vma->vm_flags & VM_WRITE) db = &s->dma_dac; else if (vma->vm_flags & VM_READ) db = &s->dma_adc; else { - unlock_kernel(); - return -EINVAL; + ret = -EINVAL; + goto out; } if (vma->vm_pgoff != 0) { - unlock_kernel(); - return -EINVAL; + ret = -EINVAL; + goto out; } size = vma->vm_end - vma->vm_start; if (size > (PAGE_SIZE << db->buforder)) { - unlock_kernel(); - return -EINVAL; + ret = -EINVAL; + goto out; } if (remap_page_range(vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot)) { - unlock_kernel(); - return -EAGAIN; + ret = -EAGAIN; + goto out; } + vma->vm_flags &= ~VM_IO; db->mapped = 1; + out: + up(&s->sem); unlock_kernel(); return 0; } @@ -1771,7 +1761,6 @@ { int minor = MINOR(inode->i_rdev); DECLARE_WAITQUEUE(wait, current); - unsigned long flags; struct list_head *list; struct it8172_state *s; int ret; @@ -1809,7 +1798,8 @@ down(&s->open_sem); } - spin_lock_irqsave(&s->lock, flags); + stop_dac(s); + stop_adc(s); if (file->f_mode & FMODE_READ) { s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = @@ -1819,10 +1809,8 @@ if ((minor & 0xf) == SND_DEV_DSP16) s->capcc |= CC_DF; outw(s->capcc, s->io+IT_AC_CAPCC); - if ((ret = prog_dmabuf_adc(s))) { - spin_unlock_irqrestore(&s->lock, flags); + if ((ret = prog_dmabuf_adc(s))) return ret; - } } if (file->f_mode & FMODE_WRITE) { s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = @@ -1832,16 +1820,13 @@ if ((minor & 0xf) == SND_DEV_DSP16) s->pcc |= CC_DF; outw(s->pcc, s->io+IT_AC_PCC); - if ((ret = prog_dmabuf_dac(s))) { - spin_unlock_irqrestore(&s->lock, flags); + if ((ret = prog_dmabuf_dac(s))) return ret; - } } - spin_unlock_irqrestore(&s->lock, flags); - s->open_mode |= (file->f_mode & (FMODE_READ | FMODE_WRITE)); up(&s->open_sem); + init_MUTEX(&s->sem); return 0; } @@ -2052,7 +2037,7 @@ if (pci_enable_device(pcidev)) goto err_dev3; pci_set_master(pcidev); - + /* get out of legacy mode */ pci_read_config_byte (pcidev, 0x40, &legacy); pci_write_config_byte (pcidev, 0x40, legacy & ~1); @@ -2078,7 +2063,7 @@ /* cold reset the AC97 */ outw(CODECC_CR, s->io+IT_AC_CODECC); - udelay(1000); + it8172_delay(10); outw(0, s->io+IT_AC_CODECC); /* need to delay around 500msec(bleech) to give some CODECs enough time to wakeup */ @@ -2092,7 +2077,7 @@ /* codec init */ if (!ac97_probe_codec(&s->codec)) goto err_dev3; - + /* add I2S as allowable recording source */ s->codec.record_sources |= SOUND_MASK_I2S; @@ -2198,7 +2183,7 @@ { if (!pci_present()) /* No PCI bus in this machine! */ return -ENODEV; - info("version v0.5 time " __TIME__ " " __DATE__); + info("version v1.0 time " __TIME__ " " __DATE__); return pci_module_init(&it8172_driver); } |
From: Steve L. <slo...@us...> - 2002-04-12 21:59:18
|
Update of /cvsroot/linux-mips/linux/arch/mips/kernel In directory usw-pr-cvs1:/tmp/cvs-serv14263/arch/mips/kernel Added Files: pci.c Log Message: PCI and sound fixes to IT8172 reference board. |
From: Steve L. <slo...@us...> - 2002-04-12 21:59:18
|
Update of /cvsroot/linux-mips/linux/arch/mips/ite-boards/generic In directory usw-pr-cvs1:/tmp/cvs-serv14263/arch/mips/ite-boards/generic Modified Files: it8172_pci.c Log Message: PCI and sound fixes to IT8172 reference board. Index: it8172_pci.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/ite-boards/generic/it8172_pci.c,v retrieving revision 1.4 retrieving revision 1.5 diff -u -d -r1.4 -r1.5 --- it8172_pci.c 27 Nov 2001 00:30:25 -0000 1.4 +++ it8172_pci.c 12 Apr 2002 21:59:15 -0000 1.5 @@ -54,14 +54,14 @@ static struct resource pci_io_resource = { "io pci IO space", - 0x14000000, + 0x14018000, 0x17FFFFFF, IORESOURCE_IO }; static struct resource pci_mem_resource_0 = { "ext pci memory space 0/1", - 0x0C000000, + 0x10101000, 0x13FFFFFF, IORESOURCE_MEM, &pci_mem_resource_0, @@ -82,7 +82,7 @@ extern struct pci_ops it8172_pci_ops; struct pci_channel mips_pci_channels[] = { - { &it8172_pci_ops, &pci_io_resource, &pci_mem_resource_0, 0, 0xff }, + { &it8172_pci_ops, &pci_io_resource, &pci_mem_resource_0, 0x10, 0xff }, { NULL, NULL, NULL, NULL, NULL} }; |
From: Pete P. <pp...@us...> - 2002-04-12 20:50:51
|
Update of /cvsroot/linux-mips/linux/include/asm-mips In directory usw-pr-cvs1:/tmp/cvs-serv23504/include/asm-mips Modified Files: pci.h Log Message: The purpose of CONFIG_MAPPED_PCI_IO, is to allow a board to have its own pci_map_* implementation and its own pci-dma.c... useful when you have broken/stupid hardware. Index: pci.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/pci.h,v retrieving revision 1.9 retrieving revision 1.10 diff -u -d -r1.9 -r1.10 --- pci.h 26 Feb 2002 19:03:32 -0000 1.9 +++ pci.h 12 Apr 2002 20:50:47 -0000 1.10 @@ -79,6 +79,37 @@ extern void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle); +#ifdef CONFIG_MAPPED_PCI_IO + +extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, + int direction); +extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, + size_t size, int direction); +extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, + int direction); +extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, + int nents, int direction); +extern void pci_dma_sync_single(struct pci_dev *hwdev, dma_addr_t dma_handle, + size_t size, int direction); +extern void pci_dma_sync_sg(struct pci_dev *hwdev, struct scatterlist *sg, + int nelems, int direction); + +/* pci_unmap_{single,page} is not a nop, thus... */ +#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ + dma_addr_t ADDR_NAME; +#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ + __u32 LEN_NAME; +#define pci_unmap_addr(PTR, ADDR_NAME) \ + ((PTR)->ADDR_NAME) +#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ + (((PTR)->ADDR_NAME) = (VAL)) +#define pci_unmap_len(PTR, LEN_NAME) \ + ((PTR)->LEN_NAME) +#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ + (((PTR)->LEN_NAME) = (VAL)) + +#else /* CONFIG_MAPPED_PCI_IO */ + /* * Map a single buffer of the indicated size for DMA in streaming mode. * The 32-bit bus address to use is returned. @@ -249,6 +280,9 @@ dma_cache_wback_inv((unsigned long)sg->address, sg->length); #endif } + +#endif /* CONFIG_MAPPED_PCI_IO */ + /* Return whether the given PCI device DMA address mask can * be supported properly. For example, if your device can |
From: Pete P. <pp...@us...> - 2002-04-12 20:45:11
|
Update of /cvsroot/linux-mips/linux/arch/mips/kernel In directory usw-pr-cvs1:/tmp/cvs-serv21160/arch/mips/kernel Modified Files: proc.c Log Message: Pb1100 updated: * updated defconfig * added sound driver and mtd support * fixed proc output to print correct CPU Index: proc.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/proc.c,v retrieving revision 1.15 retrieving revision 1.16 diff -u -d -r1.15 -r1.16 --- proc.c 19 Feb 2002 18:13:00 -0000 1.15 +++ proc.c 12 Apr 2002 20:45:07 -0000 1.16 @@ -61,6 +61,7 @@ [CPU_TX3927] "TX3927", [CPU_AU1000] "Au1000", [CPU_AU1500] "Au1500", + [CPU_AU1100] "Au1100", [CPU_4KEC] "MIPS 4KEc", [CPU_4KSC] "MIPS 4KSc", [CPU_VR41XX] "NEC Vr41xx", |
From: Pete P. <pp...@us...> - 2002-04-12 20:45:11
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv21160/arch/mips/configs Modified Files: defconfig-pb1100 Log Message: Pb1100 updated: * updated defconfig * added sound driver and mtd support * fixed proc output to print correct CPU Index: defconfig-pb1100 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-pb1100,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- defconfig-pb1100 11 Apr 2002 00:15:04 -0000 1.3 +++ defconfig-pb1100 12 Apr 2002 20:45:07 -0000 1.4 @@ -180,6 +180,9 @@ # CONFIG_MTD_PHYSMAP is not set # CONFIG_MTD_PB1000 is not set # CONFIG_MTD_PB1500 is not set +CONFIG_MTD_PB1100=y +CONFIG_MTD_PB1500_BOOT=y +# CONFIG_MTD_PB1500_USER is not set # CONFIG_MTD_CSTM_MIPS_IXX is not set # CONFIG_MTD_OCELOT is not set @@ -421,7 +424,49 @@ # # IrDA (infrared) support # -# CONFIG_IRDA is not set +CONFIG_IRDA=y + +# +# IrDA protocols +# +CONFIG_IRLAN=m +CONFIG_IRNET=m +# CONFIG_IRCOMM is not set +# CONFIG_IRDA_ULTRA is not set + +# +# IrDA options +# +CONFIG_IRDA_CACHE_LAST_LSAP=y +CONFIG_IRDA_FAST_RR=y +# CONFIG_IRDA_DEBUG is not set + +# +# Infrared-port device drivers +# + +# +# SIR device drivers +# +# CONFIG_IRTTY_SIR is not set +# CONFIG_IRPORT_SIR is not set + +# +# Dongle support +# +# CONFIG_DONGLE is not set + +# +# FIR device drivers +# +# CONFIG_USB_IRDA is not set +# CONFIG_NSC_FIR is not set +# CONFIG_WINBOND_FIR is not set +# CONFIG_TOSHIBA_FIR is not set +CONFIG_AU1000_FIR=y +# CONFIG_SMC_IRCC_FIR is not set +# CONFIG_ALI_FIR is not set +# CONFIG_VLSI_FIR is not set # # ISDN subsystem @@ -705,7 +750,30 @@ # # Sound # -# CONFIG_SOUND is not set +CONFIG_SOUND=y +# CONFIG_SOUND_BT878 is not set +# CONFIG_SOUND_CMPCI is not set +# CONFIG_SOUND_EMU10K1 is not set +# CONFIG_MIDI_EMU10K1 is not set +# CONFIG_SOUND_FUSION is not set +# CONFIG_SOUND_CS4281 is not set +# CONFIG_SOUND_ES1370 is not set +# CONFIG_SOUND_ES1371 is not set +# CONFIG_SOUND_ESSSOLO1 is not set +# CONFIG_SOUND_MAESTRO is not set +# CONFIG_SOUND_MAESTRO3 is not set +# CONFIG_SOUND_ICH is not set +# CONFIG_SOUND_RME96XX is not set +# CONFIG_SOUND_SONICVIBES is not set +# CONFIG_SOUND_HAL2 is not set +CONFIG_SOUND_AU1000=y +# CONFIG_SOUND_TRIDENT is not set +# CONFIG_SOUND_MSNDCLAS is not set +# CONFIG_SOUND_MSNDPIN is not set +# CONFIG_SOUND_VIA82CXXX is not set +# CONFIG_MIDI_VIA82CXXX is not set +# CONFIG_SOUND_OSS is not set +# CONFIG_SOUND_TVMIXER is not set # # USB support |
From: Pete P. <pp...@us...> - 2002-04-12 20:45:11
|
Update of /cvsroot/linux-mips/linux/drivers/mtd/maps In directory usw-pr-cvs1:/tmp/cvs-serv21160/drivers/mtd/maps Modified Files: Config.in Makefile pb1xxx-flash.c Log Message: Pb1100 updated: * updated defconfig * added sound driver and mtd support * fixed proc output to print correct CPU Index: Config.in =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/mtd/maps/Config.in,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- Config.in 15 Feb 2002 19:47:27 -0000 1.2 +++ Config.in 12 Apr 2002 20:45:07 -0000 1.3 @@ -39,9 +39,11 @@ if [ "$CONFIG_MIPS" = "y" ]; then dep_tristate ' Pb1000 boot flash device' CONFIG_MTD_PB1000 $CONFIG_MIPS_PB1000 dep_tristate ' Pb1500 MTD support' CONFIG_MTD_PB1500 $CONFIG_MIPS_PB1500 - if [ "$CONFIG_MTD_PB1500" = "y" -o "$CONFIG_MTD_PB1500" = "m" ]; then - bool ' Pb1500 boot flash device' CONFIG_MTD_PB1500_BOOT - bool ' Pb1500 user flash device (2nd 32MB bank)' CONFIG_MTD_PB1500_USER + dep_tristate ' Pb1100 MTD support' CONFIG_MTD_PB1100 $CONFIG_MIPS_PB1100 + if [ "$CONFIG_MTD_PB1500" = "y" -o "$CONFIG_MTD_PB1500" = "m" \ + -o "$CONFIG_MTD_PB1100" = "y" -o "$CONFIG_MTD_PB1100" = "m" ]; then + bool ' Pb[15]00 boot flash device' CONFIG_MTD_PB1500_BOOT + bool ' Pb[15]00 user flash device (2nd 32MB bank)' CONFIG_MTD_PB1500_USER fi dep_tristate ' Flash chip mapping on ITE QED-4N-S01B, Globespan IVR or custom board' CONFIG_MTD_CSTM_MIPS_IXX $CONFIG_MTD_CFI $CONFIG_MTD_JEDEC $CONFIG_MTD_PARTITIONS if [ "$CONFIG_MTD_CSTM_MIPS_IXX" = "y" -o "$CONFIG_MTD_CSTM_MIPS_IXX" = "m" ]; then Index: Makefile =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/mtd/maps/Makefile,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- Makefile 15 Feb 2002 19:47:27 -0000 1.2 +++ Makefile 12 Apr 2002 20:45:07 -0000 1.3 @@ -31,5 +31,6 @@ obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o obj-$(CONFIG_MTD_PB1000) += pb1xxx-flash.o obj-$(CONFIG_MTD_PB1500) += pb1xxx-flash.o +obj-$(CONFIG_MTD_PB1100) += pb1xxx-flash.o include $(TOPDIR)/Rules.make Index: pb1xxx-flash.c =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/mtd/maps/pb1xxx-flash.c,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- pb1xxx-flash.c 15 Feb 2002 19:47:27 -0000 1.2 +++ pb1xxx-flash.c 12 Apr 2002 20:45:07 -0000 1.3 @@ -127,7 +127,7 @@ } }; -#elif defined(CONFIG_MIPS_PB1500) +#elif defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1100) static unsigned char flash_buswidth = 4; #if defined(CONFIG_MTD_PB1500_BOOT) && defined(CONFIG_MTD_PB1500_USER) |
From: Pete P. <pp...@us...> - 2002-04-12 20:45:11
|
Update of /cvsroot/linux-mips/linux/arch/mips/zboot In directory usw-pr-cvs1:/tmp/cvs-serv21160/arch/mips/zboot Modified Files: Makefile Log Message: Pb1100 updated: * updated defconfig * added sound driver and mtd support * fixed proc output to print correct CPU Index: Makefile =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/zboot/Makefile,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- Makefile 12 Apr 2002 18:10:47 -0000 1.3 +++ Makefile 12 Apr 2002 20:45:07 -0000 1.4 @@ -53,8 +53,6 @@ clean: $(MAKE) -C common clean $(MAKE) -C images clean - $(MAKE) -C pb1000 clean - $(MAKE) -C pb1500 clean - $(MAKE) -C pb1100 clean + $(MAKE) -C pb1xxx clean include $(TOPDIR)/Rules.make |
From: Pete P. <pp...@us...> - 2002-04-12 20:45:10
|
Update of /cvsroot/linux-mips/linux/arch/mips In directory usw-pr-cvs1:/tmp/cvs-serv21160/arch/mips Modified Files: Makefile Log Message: Pb1100 updated: * updated defconfig * added sound driver and mtd support * fixed proc output to print correct CPU Index: Makefile =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/Makefile,v retrieving revision 1.44 retrieving revision 1.45 diff -u -d -r1.44 -r1.45 --- Makefile 2 Apr 2002 22:59:38 -0000 1.44 +++ Makefile 12 Apr 2002 20:45:06 -0000 1.45 @@ -558,6 +558,7 @@ rm -f arch/$(ARCH)/ld.script $(MAKE) -C arch/$(ARCH)/tools clean $(MAKE) -C arch/mips/baget clean + $(MAKE) -C arch/$(ARCH)/zboot clean archmrproper: @$(MAKEBOOT) mrproper |
From: Pete P. <pp...@us...> - 2002-04-12 18:30:58
|
Update of /cvsroot/linux-mips/linux/arch/mips/zboot/pb1xxx In directory usw-pr-cvs1:/tmp/cvs-serv8203/arch/mips/zboot/pb1xxx Modified Files: Makefile Log Message: Updated the header. Index: Makefile =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/zboot/pb1xxx/Makefile,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- Makefile 12 Apr 2002 18:10:48 -0000 1.1 +++ Makefile 12 Apr 2002 18:13:48 -0000 1.2 @@ -1,6 +1,6 @@ # arch/mips/compressed/alchemy/Makefile # -# Makefile for Alchemy Semiconductor PB1500 board. +# Makefile for Alchemy Semiconductor Pb1[015]00 boards. # All of the boot loader code was derived from the ppc # boot code. # |
From: Pete P. <pp...@us...> - 2002-04-12 18:10:53
|
Update of /cvsroot/linux-mips/linux/arch/mips/zboot/pb1500 In directory usw-pr-cvs1:/tmp/cvs-serv7014/pb1500 Removed Files: Makefile head.S ld.script Log Message: Consolidated zImage support for all three Alchemy boards (Pb1000, Pb1500, Pb1100) into one directory. --- Makefile DELETED --- --- head.S DELETED --- --- ld.script DELETED --- |
From: Pete P. <pp...@us...> - 2002-04-12 18:10:53
|
Update of /cvsroot/linux-mips/linux/arch/mips/zboot/pb1xxx In directory usw-pr-cvs1:/tmp/cvs-serv7014/pb1xxx Added Files: Makefile head.S ld.script Log Message: Consolidated zImage support for all three Alchemy boards (Pb1000, Pb1500, Pb1100) into one directory. --- NEW FILE: Makefile --- # arch/mips/compressed/alchemy/Makefile # # Makefile for Alchemy Semiconductor PB1500 board. # All of the boot loader code was derived from the ppc # boot code. # # Copyright 2001,2002 MontaVista Software Inc. # # Author: Mark A. Greer # mg...@mv... # Ported and modified for mips support by # Pete Popov <pp...@mv...> # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the # Free Software Foundation; either version 2 of the License, or (at your # option) any later version. .c.s: $(CC) $(CFLAGS) -S -o $*.s $< .s.o: $(AS) -o $*.o $< .c.o: $(CC) $(CFLAGS) -D__BOOTER__ -c -o $*.o $< .S.s: $(CPP) $(AFLAGS) -o $*.o $< .S.o: $(CC) $(AFLAGS) -c -o $*.o $< ######################################################################### # START BOARD SPECIFIC VARIABLES ifdef CONFIG_MIPS_PB1000 BNAME=pb1000 endif ifdef CONFIG_MIPS_PB1100 BNAME=pb1100 endif ifdef CONFIG_MIPS_PB1500 BNAME=pb1500 endif # These two variables control where the zImage is stored # in flash and loaded in memory. If you change either one, # be sure to make the appropriate change to the zImage # rule. RAM_LOAD_ADDR = 0x81000000 FLASH_LOAD_ADDR = 0xBFD00000 # These two variables specify the free ram region # that can be used for temporary malloc area AVAIL_RAM_START=0x80400000 AVAIL_RAM_END=0x80800000 # This one must match the LOADADDR in arch/mips/Makefile! LOADADDR=0x80100000 # END BOARD SPECIFIC VARIABLES ######################################################################### ZLINKFLAGS = -T ld.script -Ttext $(RAM_LOAD_ADDR) OBJECTS := head.o ../common/misc-common.o ../common/misc-simple.o \ ../common/au1k_uart.o ../common/string.o ../common/ctype.o LIBS := ../lib/zlib.a ENTRY := ../utils/entry OFFSET := ../utils/offset SIZE := ../utils/size all: zImage clean: rm -rf *.o vmlinux* zvmlinux.* head.o: head.S $(TOPDIR)/vmlinux $(CC) -DFLASH_LOAD_ADDR=$(FLASH_LOAD_ADDR) $(AFLAGS) \ -DKERNEL_ENTRY=$(shell sh $(ENTRY) $(NM) $(TOPDIR)/vmlinux ) \ -c -o $*.o $< ../common/misc-simple.o: $(CC) $(CFLAGS) -DINITRD_OFFSET=0 -DINITRD_SIZE=0 -DZIMAGE_OFFSET=0 \ -DAVAIL_RAM_START=$(AVAIL_RAM_START) \ -DAVAIL_RAM_END=$(AVAIL_RAM_END) \ -DLOADADDR=$(LOADADDR) \ -DZIMAGE_SIZE=0 -c -o $@ $*.c # This is the first pass at building the boot loader image, # without knowing the file offset where the vmlinuz.gz # kernel will end up. We build this image, check the offset, # and then rebuild it with the correct offset and size # passed to mips-simple.c zvmlinux.no: $(OBJECTS) $(LIBS) ../images/vmlinux.gz $(LD) $(ZLINKFLAGS) -o $@.tmp $(OBJECTS) $(LIBS) $(OBJCOPY) -R .comment \ --add-section=image=../images/vmlinux.gz \ $@.tmp $@ # rm -f $@.tmp # This is the final image we build, now that we know what # the vmlinuz.gz offset is. zvmlinux: $(OBJECTS) $(LIBS) ../images/vmlinux.gz zvmlinux.no $(CC) $(CFLAGS) -DINITRD_OFFSET=0 -DINITRD_SIZE=0 \ -DZIMAGE_OFFSET=$(shell sh $(OFFSET) $(OBJDUMP) $@.no image) \ -DZIMAGE_SIZE=$(shell sh $(SIZE) $(OBJDUMP) $@.no image) \ -D__BOOTER__ \ -DAVAIL_RAM_START=$(AVAIL_RAM_START) \ -DAVAIL_RAM_END=$(AVAIL_RAM_END) \ -DLOADADDR=$(LOADADDR) \ -c -o ../common/misc-simple.o ../common/misc-simple.c $(LD) $(ZLINKFLAGS) -o $@.tmp $(OBJECTS) $(LIBS) $(OBJCOPY) -R .comment \ --add-section=image=../images/vmlinux.gz \ $@.tmp $@ $(OBJCOPY) --adjust-section-vma=image+$(RAM_LOAD_ADDR) $@ $(OBJCOPY) --adjust-section-vma=image+$(shell sh $(OFFSET) \ $(OBJDUMP) $@.no image ) $@ # rm -f $@.tmp # rm -f $@.no # Here we manipulate the image in order to get it the necessary # srecord file we need. zImage: zvmlinux mv zvmlinux ../images/$@.$(BNAME) $(OBJCOPY) --set-section-flags=image=alloc,load,code ../images/$@.$(BNAME) $(OBJCOPY) -O srec --adjust-vma 0x3ed00000 \ ../images/$@.$(BNAME) ../images/$@.$(BNAME).srec # rm ../images/vmlinux.gz include $(TOPDIR)/Rules.make --- NEW FILE: head.S --- /* * arch/mips/kernel/head.S * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 1994, 1995 Waldorf Electronics * Written by Ralf Baechle and Andreas Busse * Copyright (C) 1995 - 1999 Ralf Baechle * Copyright (C) 1996 Paul M. Antoine * Modified for DECStation and hence R3000 support by Paul M. Antoine * Further modifications by David S. Miller and Harald Koerfgen * Copyright (C) 1999 Silicon Graphics, Inc. * * Head.S contains the MIPS exception handler and startup code. * ************************************************************************** * 9 Nov, 2000. * Added Cache Error exception handler and SBDDP EJTAG debug exception. * * Kevin Kissell, ke...@mi... and Carsten Langgaard, car...@mi... * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. ************************************************************************** */ #include <linux/config.h> #include <linux/threads.h> #include <asm/asm.h> #include <asm/cacheops.h> #include <asm/mipsregs.h> #include <asm/offset.h> #include <asm/cachectl.h> #include <asm/regdef.h> #define IndexInvalidate_I 0x00 .set noreorder .cprestore LEAF(start) start: locate: la sp, .stack move s0, a0 move s1, a1 move s2, a2 move s3, a3 la a0, start /* li a1, 0xbfd00000 */ li a1, FLASH_LOAD_ADDR la a2, _edata subu t1, a2, a0 srl t1, t1, 2 /* copy text section */ li t0, 0 1: lw v0, 0(a1) nop sw v0, 0(a0) xor t0, t0, v0 addu a0, 4 bne a2, a0, 1b addu a1, 4 /* Clear BSS */ la a0, _edata la a2, _end 2: sw zero, 0(a0) bne a2, a0, 2b addu a0, 4 /* flush the I-Cache */ li k0, 0x80000000 # start address li k1, 0x80004000 # end address (16KB I-Cache) subu k1, 128 1: .set mips3 cache IndexInvalidate_I, 0(k0) cache IndexInvalidate_I, 32(k0) cache IndexInvalidate_I, 64(k0) cache IndexInvalidate_I, 96(k0) .set mips0 bne k0, k1, 1b addu k0, k0, 128 /* done */ li a0, FLASH_LOAD_ADDR /* load address */ move a1, t1 /* length in words */ move a2, t0 /* checksum */ move a3, sp la ra, 1f la k0, decompress_kernel jr k0 nop 1: move a0, s0 move a1, s1 move a2, s2 move a3, s3 li k0, KERNEL_ENTRY jr k0 nop 3: b 3b END(start) LEAF(udelay) udelay: END(udelay) LEAF(FlushCache) li k0, 0x80000000 # start address li k1, 0x80004000 # end address (16KB I-Cache) subu k1, 128 1: .set mips3 cache IndexInvalidate_I, 0(k0) cache IndexInvalidate_I, 32(k0) cache IndexInvalidate_I, 64(k0) cache IndexInvalidate_I, 96(k0) .set mips0 bne k0, k1, 1b addu k0, k0, 128 jr ra nop END(FlushCache) .comm .stack,4096*2,4 --- NEW FILE: ld.script --- OUTPUT_ARCH(mips) ENTRY(start) SECTIONS { /* Read-only sections, merged into text segment: */ /* . = 0x81000000; */ .init : { *(.init) } =0 .text : { _ftext = . ; *(.text) *(.rodata) *(.rodata1) /* .gnu.warning sections are handled specially by elf32.em. */ *(.gnu.warning) } =0 .kstrtab : { *(.kstrtab) } . = ALIGN(16); /* Exception table */ __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; __start___dbe_table = .; /* Exception table for data bus errors */ __dbe_table : { *(__dbe_table) } __stop___dbe_table = .; __start___ksymtab = .; /* Kernel symbol table */ __ksymtab : { *(__ksymtab) } __stop___ksymtab = .; _etext = .; . = ALIGN(8192); .data.init_task : { *(.data.init_task) } /* Startup code */ . = ALIGN(4096); __init_begin = .; .text.init : { *(.text.init) } .data.init : { *(.data.init) } . = ALIGN(16); __setup_start = .; .setup.init : { *(.setup.init) } __setup_end = .; __initcall_start = .; .initcall.init : { *(.initcall.init) } __initcall_end = .; . = ALIGN(4096); /* Align double page for init_task_union */ __init_end = .; . = ALIGN(4096); .data.page_aligned : { *(.data.idt) } . = ALIGN(32); .data.cacheline_aligned : { *(.data.cacheline_aligned) } .fini : { *(.fini) } =0 .reginfo : { *(.reginfo) } /* Adjust the address for the data segment. We want to adjust up to the same address within the page on the next page up. It would be more correct to do this: . = .; The current expression does not correctly handle the case of a text segment ending precisely at the end of a page; it causes the data segment to skip a page. The above expression does not have this problem, but it will currently (2/95) cause BFD to allocate a single segment, combining both text and data, for this case. This will prevent the text segment from being shared among multiple executions of the program; I think that is more important than losing a page of the virtual address space (note that no actual memory is lost; the page which is skipped can not be referenced). */ . = .; .data : { _fdata = . ; *(.data) /* Align the initial ramdisk image (INITRD) on page boundaries. */ . = ALIGN(4096); __rd_start = .; *(.initrd) __rd_end = .; . = ALIGN(4096); CONSTRUCTORS } .data1 : { *(.data1) } _gp = . + 0x8000; .lit8 : { *(.lit8) } .lit4 : { *(.lit4) } .ctors : { *(.ctors) } .dtors : { *(.dtors) } .got : { *(.got.plt) *(.got) } .dynamic : { *(.dynamic) } /* We want the small data sections together, so single-instruction offsets can access them all, and initialized data all before uninitialized, so we can shorten the on-disk segment size. */ .sdata : { *(.sdata) } . = ALIGN(4); _edata = .; PROVIDE (edata = .); __bss_start = .; _fbss = .; .sbss : { *(.sbss) *(.scommon) } .bss : { *(.dynbss) *(.bss) *(COMMON) . = ALIGN(4); _end = . ; PROVIDE (end = .); } /* Sections to be discarded */ /DISCARD/ : { *(.text.exit) *(.data.exit) *(.exitcall.exit) } /* This is the MIPS specific mdebug section. */ .mdebug : { *(.mdebug) } /* These are needed for ELF backends which have not yet been converted to the new style linker. */ .stab 0 : { *(.stab) } .stabstr 0 : { *(.stabstr) } /* DWARF debug sections. Symbols in the .debug DWARF section are relative to the beginning of the section so we begin .debug at 0. It's not clear yet what needs to happen for the others. */ .debug 0 : { *(.debug) } .debug_srcinfo 0 : { *(.debug_srcinfo) } .debug_aranges 0 : { *(.debug_aranges) } .debug_pubnames 0 : { *(.debug_pubnames) } .debug_sfnames 0 : { *(.debug_sfnames) } .line 0 : { *(.line) } /* These must appear regardless of . */ .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) } .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) } .comment : { *(.comment) } .note : { *(.note) } } |
From: Pete P. <pp...@us...> - 2002-04-12 18:10:53
|
Update of /cvsroot/linux-mips/linux/arch/mips/zboot In directory usw-pr-cvs1:/tmp/cvs-serv7014 Modified Files: Makefile Log Message: Consolidated zImage support for all three Alchemy boards (Pb1000, Pb1500, Pb1100) into one directory. Index: Makefile =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/zboot/Makefile,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- Makefile 16 Feb 2002 16:55:45 -0000 1.2 +++ Makefile 12 Apr 2002 18:10:47 -0000 1.3 @@ -40,10 +40,13 @@ $(BOOT_TARGETS): lib/zlib.a images/vmlinux.gz ifdef CONFIG_MIPS_PB1000 - $(MAKE) -C pb1000 + $(MAKE) -C pb1xxx endif ifdef CONFIG_MIPS_PB1500 - $(MAKE) -C pb1500 + $(MAKE) -C pb1xxx +endif +ifdef CONFIG_MIPS_PB1100 + $(MAKE) -C pb1xxx endif # Do the dirs @@ -52,5 +55,6 @@ $(MAKE) -C images clean $(MAKE) -C pb1000 clean $(MAKE) -C pb1500 clean + $(MAKE) -C pb1100 clean include $(TOPDIR)/Rules.make |
From: Pete P. <pp...@us...> - 2002-04-12 18:10:52
|
Update of /cvsroot/linux-mips/linux/arch/mips/zboot/pb1000 In directory usw-pr-cvs1:/tmp/cvs-serv7014/pb1000 Removed Files: Makefile head.S ld.script Log Message: Consolidated zImage support for all three Alchemy boards (Pb1000, Pb1500, Pb1100) into one directory. --- Makefile DELETED --- --- head.S DELETED --- --- ld.script DELETED --- |
From: Pete P. <pp...@us...> - 2002-04-12 18:10:52
|
Update of /cvsroot/linux-mips/linux/arch/mips/zboot/include In directory usw-pr-cvs1:/tmp/cvs-serv7014/include Modified Files: ns16550.h Log Message: Consolidated zImage support for all three Alchemy boards (Pb1000, Pb1500, Pb1100) into one directory. Index: ns16550.h =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/zboot/include/ns16550.h,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- ns16550.h 16 Feb 2002 16:55:45 -0000 1.2 +++ ns16550.h 12 Apr 2002 18:10:48 -0000 1.3 @@ -5,7 +5,7 @@ /* * Figure out which file will have the definitons of COMx */ -#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1500) +#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1100) #else #error no serial.h #endif |
From: Pete P. <pp...@us...> - 2002-04-12 18:09:55
|
Update of /cvsroot/linux-mips/linux/arch/mips/zboot/pb1xxx In directory usw-pr-cvs1:/tmp/cvs-serv6820/pb1xxx Log Message: Directory /cvsroot/linux-mips/linux/arch/mips/zboot/pb1xxx added to the repository |
From: Pete P. <pp...@us...> - 2002-04-11 02:00:38
|
Update of /cvsroot/linux-mips/linux/include/asm-mips In directory usw-pr-cvs1:/tmp/cvs-serv22989/include/asm-mips Modified Files: cpu.h Log Message: Added CPU_AU1100. Index: cpu.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/cpu.h,v retrieving revision 1.22 retrieving revision 1.23 diff -u -d -r1.22 -r1.23 --- cpu.h 26 Feb 2002 17:08:29 -0000 1.22 +++ cpu.h 11 Apr 2002 02:00:34 -0000 1.23 @@ -137,7 +137,8 @@ CPU_R5000A, CPU_R4640, CPU_NEVADA, CPU_RM7000, CPU_R5432, CPU_4KC, CPU_5KC, CPU_R4310, CPU_SB1, CPU_TX3912, CPU_TX3922, CPU_TX3927, CPU_AU1000, CPU_4KEC, CPU_4KSC, CPU_VR41XX, CPU_R5500, CPU_TX49XX, - CPU_TX39XX, CPU_AU1500, CPU_R5900, CPU_RC32300, CPU_SR7100, CPU_LAST + CPU_TX39XX, CPU_AU1500, CPU_R5900, CPU_RC32300, CPU_SR7100, + CPU_AU1100, CPU_LAST }; #endif |
From: Pete P. <pp...@us...> - 2002-04-11 01:46:50
|
Update of /cvsroot/linux-mips/linux/arch/mips/kernel In directory usw-pr-cvs1:/tmp/cvs-serv19791/arch/mips/kernel Modified Files: setup.c Log Message: Parse for all three Alchemy/AMD CPUs. Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/setup.c,v retrieving revision 1.54 retrieving revision 1.55 diff -u -d -r1.54 -r1.55 --- setup.c 2 Apr 2002 22:59:39 -0000 1.54 +++ setup.c 11 Apr 2002 01:46:46 -0000 1.55 @@ -503,10 +503,20 @@ switch (mips_cpu.processor_id & 0xff00) { case PRID_IMP_AU1_REV1: case PRID_IMP_AU1_REV2: - if (mips_cpu.processor_id & 0xff000000) - mips_cpu.cputype = CPU_AU1500; - else - mips_cpu.cputype = CPU_AU1000; + switch ((mips_cpu.processor_id >> 24) & 0xff) { + case 0: + mips_cpu.cputype = CPU_AU1000; + break; + case 1: + mips_cpu.cputype = CPU_AU1500; + break; + case 2: + mips_cpu.cputype = CPU_AU1100; + break; + default: + panic("Unknown Au Core!"); + break; + } mips_cpu.isa_level = MIPS_CPU_ISA_M32; mips_cpu.options = MIPS_CPU_TLB | MIPS_CPU_4KEX | MIPS_CPU_4KTLB | MIPS_CPU_COUNTER | |
From: Pete P. <pp...@us...> - 2002-04-11 00:15:13
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv450/arch/mips/configs Modified Files: defconfig-pb1100 Log Message: Made 64 bit IO support the default. Index: defconfig-pb1100 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-pb1100,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- defconfig-pb1100 10 Apr 2002 01:10:11 -0000 1.2 +++ defconfig-pb1100 11 Apr 2002 00:15:04 -0000 1.3 @@ -94,7 +94,7 @@ # CONFIG_CPU_MIPS64 is not set # CONFIG_CPU_RC32300 is not set CONFIG_CPU_HAS_PREFETCH=y -# CONFIG_64BIT_PHYS_ADDR is not set +CONFIG_64BIT_PHYS_ADDR=y CONFIG_CPU_ADVANCED=y CONFIG_CPU_HAS_LLSC=y # CONFIG_CPU_HAS_LLDSCD is not set |
From: Pete P. <pp...@us...> - 2002-04-11 00:13:05
|
Update of /cvsroot/linux-mips/linux/drivers/video In directory usw-pr-cvs1:/tmp/cvs-serv32576/drivers/video Modified Files: au1100fb.c Log Message: Minor cleanup. Index: au1100fb.c =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/video/au1100fb.c,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- au1100fb.c 10 Apr 2002 01:10:12 -0000 1.1 +++ au1100fb.c 11 Apr 2002 00:12:57 -0000 1.2 @@ -94,6 +94,8 @@ static int au1100fb_mmap(struct fb_info *fb, struct file *file, struct vm_area_struct *vma); static int au1100_blank(int blank_mode, struct fb_info_gen *info); +static int au1100fb_ioctl(struct inode *inode, struct file *file, u_int cmd, + u_long arg, int con, struct fb_info *info); static struct fb_ops au1100fb_ops = { owner: THIS_MODULE, @@ -103,6 +105,7 @@ fb_get_cmap: fbgen_get_cmap, fb_set_cmap: fbgen_set_cmap, fb_pan_display: fbgen_pan_display, + fb_ioctl: au1100fb_ioctl, fb_mmap: au1100fb_mmap, }; @@ -187,9 +190,11 @@ var->yres != p_lcd->yres || var->xres != p_lcd->xres || var->yres != p_lcd->yres) { + printk("bad resolution selected\n"); return -EINVAL; } if(var->bits_per_pixel != p_lcd->bpp) { + printk("bad bpp\n"); return -EINVAL; } @@ -269,6 +274,7 @@ #ifdef FBCON_HAS_CFB8 case 8: /* FIXME */ + printk("cfb8??\n"); break; #endif #ifdef FBCON_HAS_CFB16 @@ -286,21 +292,22 @@ static int au1100_blank(int blank_mode, struct fb_info_gen *_info) { - printk("au1100_blank\n"); - switch (blank_mode) { case VESA_NO_BLANKING: - printk("assert go\n"); + printk("Au1100fb: assert go\n"); p_lcd_reg->lcd_control |= LCD_CONTROL_GO; break; case VESA_VSYNC_SUSPEND: case VESA_HSYNC_SUSPEND: case VESA_POWERDOWN: - printk("deassert go\n"); + printk("Au1100fb: deassert go\n"); p_lcd_reg->lcd_control &= ~LCD_CONTROL_GO; break; default: + printk("Au1100fb: unknown blank mode %d\n", + blank_mode); + break; } return 0; @@ -374,6 +381,13 @@ return 0; } +static int au1100fb_ioctl(struct inode *inode, struct file *file, u_int cmd, + u_long arg, int con, struct fb_info *info) +{ + /* nothing to do yet */ + return -EINVAL; +} + static struct fbgen_hwswitch au1100_switch = { au1100_detect, au1100_encode_fix, @@ -568,20 +582,6 @@ } } - -#if 0 -/* If all you need is that - just don't define ->fb_open */ -static int au1100fb_open(const struct fb_info *info, int user) -{ - return 0; -} - -/* If all you need is that - just don't define ->fb_release */ -static int au1100fb_release(const struct fb_info *info, int user) -{ - return 0; -} -#endif #ifdef MODULE |
From: Pete P. <pp...@us...> - 2002-04-10 01:10:16
|
Update of /cvsroot/linux-mips/linux/drivers/video In directory usw-pr-cvs1:/tmp/cvs-serv12747/drivers/video Modified Files: Config.in Makefile fbmem.c Added Files: au1100fb.c au1100fb.h Log Message: Au1100 fb driver. First pass only, there are still some things to be done. --- NEW FILE: au1100fb.c --- /* * BRIEF MODULE DESCRIPTION * Au1100 LCD Driver. * * Copyright 2002 MontaVista Software * Author: MontaVista Software, Inc. * pp...@mv... or so...@mv... * * Copyright 2002 Alchemy Semiconductor * Author: Alchemy Semiconductor * * Based on: * linux/drivers/video/skeletonfb.c -- Skeleton for a frame buffer device * Created 28 Dec 1997 by Geert Uytterhoeven * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 675 Mass Ave, Cambridge, MA 02139, USA. */ #include <linux/module.h> #include <linux/kernel.h> #include <linux/errno.h> #include <linux/string.h> #include <linux/mm.h> #include <linux/tty.h> #include <linux/slab.h> #include <linux/delay.h> #include <linux/fb.h> #include <linux/init.h> #include <linux/pci.h> #include <asm/au1000.h> #include <asm/pb1100.h> #include "au1100fb.h" #include <video/fbcon.h> #include <video/fbcon-mfb.h> #include <video/fbcon-cfb2.h> #include <video/fbcon-cfb4.h> #include <video/fbcon-cfb8.h> #include <video/fbcon-cfb16.h> #define CMAPSIZE 16 static int my_lcd_index; /* default is zero */ struct known_lcd_panels *p_lcd; AU1100_LCD *p_lcd_reg = (AU1100_LCD *)AU1100_LCD_ADDR; struct au1100fb_info { struct fb_info_gen gen; unsigned long fb_virt_start; unsigned long fb_size; unsigned long fb_phys; struct { unsigned red, green, blue, pad; } palette[256]; #if defined(FBCON_HAS_CFB16) u16 fbcon_cmap16[16]; #endif }; struct au1100fb_par { struct fb_var_screeninfo var; int line_length; // in bytes int cmap_len; // color-map length }; static struct au1100fb_info fb_info; static struct au1100fb_par current_par; static struct display disp; int au1100fb_init(void); void au1100fb_setup(char *options, int *ints); static int au1100fb_mmap(struct fb_info *fb, struct file *file, struct vm_area_struct *vma); static int au1100_blank(int blank_mode, struct fb_info_gen *info); static struct fb_ops au1100fb_ops = { owner: THIS_MODULE, fb_get_fix: fbgen_get_fix, fb_get_var: fbgen_get_var, fb_set_var: fbgen_set_var, fb_get_cmap: fbgen_get_cmap, fb_set_cmap: fbgen_set_cmap, fb_pan_display: fbgen_pan_display, fb_mmap: au1100fb_mmap, }; static void au1100_detect(void) { /* * This function should detect the current video mode settings * and store it as the default video mode */ /* * Yeh, well, we're not going to change any settings so we're * always stuck with the default ... */ } static int au1100_encode_fix(struct fb_fix_screeninfo *fix, const void *_par, struct fb_info_gen *_info) { struct au1100fb_info *info = (struct au1100fb_info *) _info; struct au1100fb_par *par = (struct au1100fb_par *) _par; struct fb_var_screeninfo *var = &par->var; memset(fix, 0, sizeof(struct fb_fix_screeninfo)); fix->smem_start = info->fb_phys; fix->smem_len = info->fb_size; fix->type = FB_TYPE_PACKED_PIXELS; fix->type_aux = 0; fix->visual = (var->bits_per_pixel == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR; fix->ywrapstep = 0; fix->xpanstep = 1; fix->ypanstep = 1; fix->line_length = par->line_length; return 0; } static void set_color_bitfields(struct fb_var_screeninfo *var) { switch (var->bits_per_pixel) { case 8: var->red.offset = 0; var->red.length = 8; var->green.offset = 0; var->green.length = 8; var->blue.offset = 0; var->blue.length = 8; var->transp.offset = 0; var->transp.length = 0; break; case 16: /* RGB 565 */ var->red.offset = 11; var->red.length = 5; var->green.offset = 5; var->green.length = 6; var->blue.offset = 0; var->blue.length = 5; var->transp.offset = 0; var->transp.length = 0; break; } var->red.msb_right = 0; var->green.msb_right = 0; var->blue.msb_right = 0; var->transp.msb_right = 0; } static int au1100_decode_var(const struct fb_var_screeninfo *var, void *_par, struct fb_info_gen *_info) { struct au1100fb_par *par = (struct au1100fb_par *)_par; /* * Don't allow setting any of these yet: xres and yres don't * make sense for LCD panels. */ if (var->xres != p_lcd->xres || var->yres != p_lcd->yres || var->xres != p_lcd->xres || var->yres != p_lcd->yres) { return -EINVAL; } if(var->bits_per_pixel != p_lcd->bpp) { return -EINVAL; } memset(par, 0, sizeof(struct au1100fb_par)); par->var = *var; /* FIXME */ switch (var->bits_per_pixel) { case 8: par->var.bits_per_pixel = 8; break; case 16: par->var.bits_per_pixel = 16; break; default: printk("color depth %d bpp not supported\n", var->bits_per_pixel); return -EINVAL; } set_color_bitfields(&par->var); par->cmap_len = (par->var.bits_per_pixel == 8) ? 256 : 16; return 0; } static int au1100_encode_var(struct fb_var_screeninfo *var, const void *par, struct fb_info_gen *_info) { *var = ((struct au1100fb_par *)par)->var; return 0; } static void au1100_get_par(void *_par, struct fb_info_gen *_info) { *(struct au1100fb_par *)_par = current_par; } static void au1100_set_par(const void *par, struct fb_info_gen *info) { /* nothing to do: we don't change any settings */ } static int au1100_getcolreg(unsigned regno, unsigned *red, unsigned *green, unsigned *blue, unsigned *transp, struct fb_info *info) { struct au1100fb_info* i = (struct au1100fb_info*)info; if (regno > 256) return 1; *red = i->palette[regno].red; *green = i->palette[regno].green; *blue = i->palette[regno].blue; *transp = 0; return 0; } static int au1100_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue, unsigned transp, struct fb_info *info) { struct au1100fb_info* i = (struct au1100fb_info *)info; if (regno > 255) return 1; i->palette[regno].red = red; i->palette[regno].green = green; i->palette[regno].blue = blue; switch(p_lcd->bpp) { #ifdef FBCON_HAS_CFB8 case 8: /* FIXME */ break; #endif #ifdef FBCON_HAS_CFB16 case 16: i->fbcon_cmap16[regno] = (regno << 10) | (regno << 5) | regno; break; #endif default: break; } return 0; } static int au1100_blank(int blank_mode, struct fb_info_gen *_info) { printk("au1100_blank\n"); switch (blank_mode) { case VESA_NO_BLANKING: printk("assert go\n"); p_lcd_reg->lcd_control |= LCD_CONTROL_GO; break; case VESA_VSYNC_SUSPEND: case VESA_HSYNC_SUSPEND: case VESA_POWERDOWN: printk("deassert go\n"); p_lcd_reg->lcd_control &= ~LCD_CONTROL_GO; break; default: } return 0; } static void au1100_set_disp(const void *unused, struct display *disp, struct fb_info_gen *info) { disp->screen_base = (char *)fb_info.fb_virt_start; switch (disp->var.bits_per_pixel) { #ifdef FBCON_HAS_CFB8 case 8: disp->dispsw = &fbcon_cfb8; break; #endif #ifdef FBCON_HAS_CFB16 case 16: disp->dispsw = &fbcon_cfb16; disp->dispsw_data = fb_info.fbcon_cmap16; break; #endif default: disp->dispsw = &fbcon_dummy; disp->dispsw_data = NULL; break; } } static int au1100fb_mmap(struct fb_info *fb, struct file *file, struct vm_area_struct *vma) { unsigned int len; unsigned long start=0, off; if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) { return -EINVAL; } start = fb_info.fb_phys & PAGE_MASK; len = PAGE_ALIGN((start & ~PAGE_MASK) + fb_info.fb_size); off = vma->vm_pgoff << PAGE_SHIFT; if ((vma->vm_end - vma->vm_start + off) > len) { return -EINVAL; } off += start; vma->vm_pgoff = off >> PAGE_SHIFT; pgprot_val(vma->vm_page_prot) &= ~_CACHE_MASK; pgprot_val(vma->vm_page_prot) |= _CACHE_UNCACHED; /* This is an IO map - tell maydump to skip this VMA */ vma->vm_flags |= VM_IO; if (io_remap_page_range(vma->vm_start, off, vma->vm_end - vma->vm_start, vma->vm_page_prot)) return -EAGAIN; return 0; } int au1100_pan_display(const struct fb_var_screeninfo *var, struct fb_info_gen *info) { return 0; } static struct fbgen_hwswitch au1100_switch = { au1100_detect, au1100_encode_fix, au1100_decode_var, au1100_encode_var, au1100_get_par, au1100_set_par, au1100_getcolreg, au1100_setcolreg, au1100_pan_display, au1100_blank, au1100_set_disp }; int au1100_setmode(void) { int words; /* FIXME Need to accomodate for swivel mode and 12bpp, <8bpp*/ switch (p_lcd->mode_control & LCD_CONTROL_SM) { case LCD_CONTROL_SM_0: case LCD_CONTROL_SM_180: words = (p_lcd->xres * p_lcd->yres * p_lcd->bpp) / 32; break; case LCD_CONTROL_SM_90: case LCD_CONTROL_SM_270: /* is this correct? */ words = (p_lcd->xres * p_lcd->bpp) / 8; break; default: printk("mode_control reg not initialized\n"); return -EINVAL; } /* * Setup LCD controller */ p_lcd_reg->lcd_control = p_lcd->mode_control; p_lcd_reg->lcd_intstatus = 0; p_lcd_reg->lcd_intenable = 0; p_lcd_reg->lcd_horztiming = p_lcd->mode_horztiming; p_lcd_reg->lcd_verttiming = p_lcd->mode_verttiming; p_lcd_reg->lcd_clkcontrol = p_lcd->mode_clkcontrol; p_lcd_reg->lcd_words = words - 1; p_lcd_reg->lcd_dmaaddr0 = fb_info.fb_phys; /* turn on panel */ writew(readw(PB1500_G_CONTROL) | p_lcd->mode_backlight, PB1500_G_CONTROL); p_lcd_reg->lcd_control |= LCD_CONTROL_GO; return 0; } int __init au1100fb_init(void) { uint32 sys_clksrc; unsigned long page; /* * Get the panel information/display mode and update the registry */ p_lcd = &panels[my_lcd_index]; switch (p_lcd->mode_control & LCD_CONTROL_SM) { case LCD_CONTROL_SM_0: case LCD_CONTROL_SM_180: p_lcd->xres = (p_lcd->mode_horztiming & LCD_HORZTIMING_PPL) + 1; p_lcd->yres = (p_lcd->mode_verttiming & LCD_VERTTIMING_LPP) + 1; break; case LCD_CONTROL_SM_90: case LCD_CONTROL_SM_270: p_lcd->yres = (p_lcd->mode_horztiming & LCD_HORZTIMING_PPL) + 1; p_lcd->xres = (p_lcd->mode_verttiming & LCD_VERTTIMING_LPP) + 1; break; } /* * Panel dimensions x bpp must be divisible by 32 */ if (((p_lcd->yres * p_lcd->bpp) % 32) != 0) printk("VERT %% 32\n"); if (((p_lcd->xres * p_lcd->bpp) % 32) != 0) printk("HORZ %% 32\n"); /* * Allocate LCD framebuffer from system memory */ fb_info.fb_size = (p_lcd->xres * p_lcd->yres * p_lcd->bpp) / 8; current_par.var.xres = p_lcd->xres; current_par.var.xres_virtual = p_lcd->xres; current_par.var.yres = p_lcd->yres; current_par.var.yres_virtual = p_lcd->yres; current_par.var.bits_per_pixel = p_lcd->bpp; /* FIX!!! only works for 8/16 bpp */ current_par.line_length = p_lcd->xres * p_lcd->bpp / 8; /* in bytes */ fb_info.fb_virt_start = (unsigned long ) __get_free_pages(GFP_ATOMIC | GFP_DMA, get_order(fb_info.fb_size + 0x1000)); if (!fb_info.fb_virt_start) { printk("Unable to allocate fb memory\n"); return -ENOMEM; } fb_info.fb_phys = virt_to_bus((void *)fb_info.fb_virt_start); /* * Set page reserved so that mmap will work. This is necessary * since we'll be remapping normal memory. */ for (page = fb_info.fb_virt_start; page < PAGE_ALIGN(fb_info.fb_virt_start + fb_info.fb_size); page += PAGE_SIZE) { SetPageReserved(virt_to_page(page)); } memset((void *)fb_info.fb_virt_start, 0, fb_info.fb_size); /* set freqctrl now to allow more time to stabilize */ /* zero-out out LCD bits */ sys_clksrc = readl(SYS_CLKSRC) & ~0x000003e0; sys_clksrc |= p_lcd->mode_toyclksrc; writel(sys_clksrc, SYS_CLKSRC); /* FIXME add check to make sure auxpll is what is expected! */ au1100_setmode(); fb_info.gen.parsize = sizeof(struct au1100fb_par); fb_info.gen.fbhw = &au1100_switch; strcpy(fb_info.gen.info.modename, "Au1100 LCD"); fb_info.gen.info.changevar = NULL; fb_info.gen.info.node = -1; fb_info.gen.info.fbops = &au1100fb_ops; fb_info.gen.info.disp = &disp; fb_info.gen.info.switch_con = &fbgen_switch; fb_info.gen.info.updatevar = &fbgen_update_var; fb_info.gen.info.blank = &fbgen_blank; fb_info.gen.info.flags = FBINFO_FLAG_DEFAULT; /* This should give a reasonable default video mode */ fbgen_get_var(&disp.var, -1, &fb_info.gen.info); fbgen_do_set_var(&disp.var, 1, &fb_info.gen); fbgen_set_disp(-1, &fb_info.gen); fbgen_install_cmap(0, &fb_info.gen); if (register_framebuffer(&fb_info.gen.info) < 0) return -EINVAL; printk(KERN_INFO "fb%d: %s frame buffer device\n", GET_FB_IDX(fb_info.gen.info.node), fb_info.gen.info.modename); /* uncomment this if your driver cannot be unloaded */ /* MOD_INC_USE_COUNT; */ return 0; } void au1100fb_cleanup(struct fb_info *info) { unregister_framebuffer(info); } void au1100fb_setup(char *options, int *ints) { char* this_opt; int i; if (!options || !*options) return; this_opt=strtok(options, ","); /* Get the panel name, everything else if fixed */ for (i=0; i<(sizeof(panels)/sizeof(struct known_lcd_panels)); i++) { if (!strncmp(this_opt, panels[i].panel_name, strlen(this_opt))) { my_lcd_index = i; break; } } } #if 0 /* If all you need is that - just don't define ->fb_open */ static int au1100fb_open(const struct fb_info *info, int user) { return 0; } /* If all you need is that - just don't define ->fb_release */ static int au1100fb_release(const struct fb_info *info, int user) { return 0; } #endif #ifdef MODULE MODULE_LICENSE("GPL"); int init_module(void) { return au1100fb_init(); } void cleanup_module(void) { au1100fb_cleanup(void); } MODULE_AUTHOR("Pete Popov <pp...@mv...>"); MODULE_DESCRIPTION("Au1100 LCD framebuffer device driver"); #endif /* MODULE */ --- NEW FILE: au1100fb.h --- /* * BRIEF MODULE DESCRIPTION * Hardware definitions for the Au1100 LCD controller * * Copyright 2002 MontaVista Software * Copyright 2002 Alchemy Semiconductor * Author: Alchemy Semiconductor, MontaVista Software * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 675 Mass Ave, Cambridge, MA 02139, USA. */ #ifndef _AU1100LCD_H #define _AU1100LCD_H /********************************************************************/ #define uint32 unsigned long typedef volatile struct { uint32 lcd_control; uint32 lcd_intstatus; uint32 lcd_intenable; uint32 lcd_horztiming; uint32 lcd_verttiming; uint32 lcd_clkcontrol; uint32 lcd_dmaaddr0; uint32 lcd_dmaaddr1; uint32 lcd_words; uint32 lcd_pwmdiv; uint32 lcd_pwmhi; uint32 reserved[(0x0400-0x002C)/4]; uint32 lcd_pallettebase[256]; } AU1100_LCD; /********************************************************************/ #define AU1100_LCD_ADDR 0xB5000000 /* * Register bit definitions */ /* lcd_control */ #define LCD_CONTROL_SBPPF (7<<18) #define LCD_CONTROL_SBPPF_655 (0<<18) #define LCD_CONTROL_SBPPF_565 (1<<18) #define LCD_CONTROL_SBPPF_556 (2<<18) #define LCD_CONTROL_SBPPF_1555 (3<<18) #define LCD_CONTROL_SBPPF_5551 (4<<18) #define LCD_CONTROL_WP (1<<17) #define LCD_CONTROL_WD (1<<16) #define LCD_CONTROL_C (1<<15) #define LCD_CONTROL_SM (3<<13) #define LCD_CONTROL_SM_0 (0<<13) #define LCD_CONTROL_SM_90 (1<<13) #define LCD_CONTROL_SM_180 (2<<13) #define LCD_CONTROL_SM_270 (3<<13) #define LCD_CONTROL_DB (1<<12) #define LCD_CONTROL_CCO (1<<11) #define LCD_CONTROL_DP (1<<10) #define LCD_CONTROL_PO (3<<8) #define LCD_CONTROL_PO_00 (0<<8) #define LCD_CONTROL_PO_01 (1<<8) #define LCD_CONTROL_PO_10 (2<<8) #define LCD_CONTROL_PO_11 (3<<8) #define LCD_CONTROL_MPI (1<<7) #define LCD_CONTROL_PT (1<<6) #define LCD_CONTROL_PC (1<<5) #define LCD_CONTROL_BPP (7<<1) #define LCD_CONTROL_BPP_1 (0<<1) #define LCD_CONTROL_BPP_2 (1<<1) #define LCD_CONTROL_BPP_4 (2<<1) #define LCD_CONTROL_BPP_8 (3<<1) #define LCD_CONTROL_BPP_12 (4<<1) #define LCD_CONTROL_BPP_16 (5<<1) #define LCD_CONTROL_GO (1<<0) /* lcd_intstatus, lcd_intenable */ #define LCD_INT_SD (1<<7) #define LCD_INT_OF (1<<6) #define LCD_INT_UF (1<<5) #define LCD_INT_SA (1<<3) #define LCD_INT_SS (1<<2) #define LCD_INT_S1 (1<<1) #define LCD_INT_S0 (1<<0) /* lcd_horztiming */ #define LCD_HORZTIMING_HN2 (255<<24) #define LCD_HORZTIMING_HN2_N(N) (((N)-1)<<24) #define LCD_HORZTIMING_HN1 (255<<16) #define LCD_HORZTIMING_HN1_N(N) (((N)-1)<<16) #define LCD_HORZTIMING_HPW (63<<10) #define LCD_HORZTIMING_HPW_N(N) (((N)-1)<<10) #define LCD_HORZTIMING_PPL (1023<<0) #define LCD_HORZTIMING_PPL_N(N) (((N)-1)<<0) /* lcd_verttiming */ #define LCD_VERTTIMING_VN2 (255<<24) #define LCD_VERTTIMING_VN2_N(N) (((N)-1)<<24) #define LCD_VERTTIMING_VN1 (255<<16) #define LCD_VERTTIMING_VN1_N(N) (((N)-1)<<16) #define LCD_VERTTIMING_VPW (63<<10) #define LCD_VERTTIMING_VPW_N(N) (((N)-1)<<10) #define LCD_VERTTIMING_LPP (1023<<0) #define LCD_VERTTIMING_LPP_N(N) (((N)-1)<<0) /* lcd_clkcontrol */ #define LCD_CLKCONTROL_IB (1<<18) #define LCD_CLKCONTROL_IC (1<<17) #define LCD_CLKCONTROL_IH (1<<16) #define LCD_CLKCONTROL_IV (1<<15) #define LCD_CLKCONTROL_BF (31<<10) #define LCD_CLKCONTROL_BF_N(N) (((N)-1)<<10) #define LCD_CLKCONTROL_PCD (1023<<0) #define LCD_CLKCONTROL_PCD_N(N) ((N)<<0) /* lcd_pwmdiv */ #define LCD_PWMDIV_EN (1<<12) #define LCD_PWMDIV_PWMDIV (2047<<0) #define LCD_PWMDIV_PWMDIV_N(N) (((N)-1)<<0) /* lcd_pwmhi */ #define LCD_PWMHI_PWMHI1 (2047<<12) #define LCD_PWMHI_PWMHI1_N(N) ((N)<<12) #define LCD_PWMHI_PWMHI0 (2047<<0) #define LCD_PWMHI_PWMHI0_N(N) ((N)<<0) /* lcd_pallettebase - MONOCHROME */ #define LCD_PALLETTE_MONO_MI (15<<0) #define LCD_PALLETTE_MONO_MI_N(N) ((N)<<0) /* lcd_pallettebase - COLOR */ #define LCD_PALLETTE_COLOR_BI (15<<8) #define LCD_PALLETTE_COLOR_BI_N(N) ((N)<<8) #define LCD_PALLETTE_COLOR_GI (15<<4) #define LCD_PALLETTE_COLOR_GI_N(N) ((N)<<4) #define LCD_PALLETTE_COLOR_RI (15<<0) #define LCD_PALLETTE_COLOR_RI_N(N) ((N)<<0) /* lcd_palletebase - COLOR TFT PALLETIZED */ #define LCD_PALLETTE_TFT_DC (65535<<0) #define LCD_PALLETTE_TFT_DC_N(N) ((N)<<0) /********************************************************************/ enum EGPEFormat { gpe1Bpp, gpe2Bpp, gpe4Bpp, gpe8Bpp, gpe16Bpp, gpe24Bpp, gpe32Bpp, gpe16YCrCb, gpeDeviceCompatible, gpeUndefined }; struct known_lcd_panels { uint32 xres; uint32 yres; uint32 bpp; unsigned char panel_name[256]; uint32 mode_control; uint32 mode_horztiming; uint32 mode_verttiming; uint32 mode_clkcontrol; uint32 mode_pwmdiv; uint32 mode_pwmhi; uint32 mode_toyclksrc; uint32 mode_backlight; }; /* * The fb driver assumes that AUX PLL is at 48MHz. That can * cover up to 800x600 resolution; if you need higher resolution, * you should modify the driver as needed, not just this structure. */ struct known_lcd_panels panels[] = { { /* 0: Pb1100 LCDA: Sharp 320x240 TFT panel */ 320, /* xres */ 240, /* yres */ 16, /* bpp */ "Sharp_320x240_16", /* mode_control */ ( LCD_CONTROL_SBPPF_565 /*LCD_CONTROL_WP*/ /*LCD_CONTROL_WD*/ | LCD_CONTROL_C | LCD_CONTROL_SM_0 /*LCD_CONTROL_DB*/ /*LCD_CONTROL_CCO*/ /*LCD_CONTROL_DP*/ | LCD_CONTROL_PO_00 /*LCD_CONTROL_MPI*/ | LCD_CONTROL_PT | LCD_CONTROL_PC | LCD_CONTROL_BPP_16 ), /* mode_horztiming */ ( LCD_HORZTIMING_HN2_N(8) | LCD_HORZTIMING_HN1_N(60) | LCD_HORZTIMING_HPW_N(12) | LCD_HORZTIMING_PPL_N(320) ), /* mode_verttiming */ ( LCD_VERTTIMING_VN2_N(5) | LCD_VERTTIMING_VN1_N(17) | LCD_VERTTIMING_VPW_N(1) | LCD_VERTTIMING_LPP_N(240) ), /* mode_clkcontrol */ ( 0 /*LCD_CLKCONTROL_IB*/ /*LCD_CLKCONTROL_IC*/ /*LCD_CLKCONTROL_IH*/ /*LCD_CLKCONTROL_IV*/ | LCD_CLKCONTROL_PCD_N(1) ), /* mode_pwmdiv */ 0, /* mode_pwmhi */ 0, /* mode_toyclksrc */ ((1<<7) | (1<<6) | (1<<5)), /* mode_backlight */ 6 }, { /* 1: Pb1100 LCDC 640x480 TFT panel */ 640, /* xres */ 480, /* yres */ 16, /* bpp */ "Generic_640x480_16", /* mode_control */ 0x004806a, /* mode_horztiming */ 0x3434d67f, /* mode_verttiming */ 0x0e0e39df, /* mode_clkcontrol */ ( 0 /*LCD_CLKCONTROL_IB*/ /*LCD_CLKCONTROL_IC*/ /*LCD_CLKCONTROL_IH*/ /*LCD_CLKCONTROL_IV*/ | LCD_CLKCONTROL_PCD_N(1) ), /* mode_pwmdiv */ 0, /* mode_pwmhi */ 0, /* mode_toyclksrc */ ((1<<7) | (1<<6) | (0<<5)), /* mode_backlight */ 7 }, { /* 2: Pb1100 LCDB 640x480 PrimeView/Casio TFT panel */ 640, /* xres */ 480, /* yres */ 16, /* bpp */ "Casio_640x480_16", /* mode_control */ 0x0004886a, /* mode_horztiming */ 0x0e4bfe7f, /* mode_verttiming */ 0x210805df, /* mode_clkcontrol */ 0x00038001, /* mode_pwmdiv */ 0, /* mode_pwmhi */ 0, /* mode_toyclksrc */ ((1<<7) | (1<<6) | (0<<5)), /* mode_backlight */ 7 }, { /* 3: Pb1100 800x600x16bpp NEON CRT */ 800, /* xres */ 600, /* yres */ 16, /* bpp */ "NEON_800x600_16", /* mode_control */ 0x0004886A, /* mode_horztiming */ 0x005AFF1F, /* mode_verttiming */ 0x16000E57, /* mode_clkcontrol */ 0x00020000, /* mode_pwmdiv */ 0, /* mode_pwmhi */ 0, /* mode_toyclksrc */ ((1<<7) | (1<<6) | (0<<5)), /* mode_backlight */ 7 }, { /* 4: Pb1100 640x480x16bpp NEON CRT */ 640, /* xres */ 480, /* yres */ 16, /* bpp */ "NEON_640x480_16", /* mode_control */ 0x0004886A, /* mode_horztiming */ 0x0052E27F, /* mode_verttiming */ 0x18000DDF, /* mode_clkcontrol */ 0x00020000, /* mode_pwmdiv */ 0, /* mode_pwmhi */ 0, /* mode_toyclksrc */ ((1<<7) | (1<<6) | (0<<5)), /* mode_backlight */ 7 }, }; #endif /* _AU1100LCD_H */ Index: Config.in =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/video/Config.in,v retrieving revision 1.16 retrieving revision 1.17 diff -u -d -r1.16 -r1.17 --- Config.in 2 Apr 2002 22:38:34 -0000 1.16 +++ Config.in 10 Apr 2002 01:10:11 -0000 1.17 @@ -159,6 +159,9 @@ bool ' Use CRT on Pb1100 ' CONFIG_PB1500_CRT bool ' Use TFT Panel on Pb1100 ' CONFIG_PB1500_TFT fi + if [ "$CONFIG_MIPS_PB1100" = "y" ]; then + bool ' Au1100 LCD Driver' CONFIG_FB_PB1100 + fi fi tristate ' ITE IT8181 framebuffer support' CONFIG_FB_IT8181 tristate ' Simple Frame Buffer support' CONFIG_FB_SIMPLE Index: Makefile =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/video/Makefile,v retrieving revision 1.13 retrieving revision 1.14 diff -u -d -r1.13 -r1.14 --- Makefile 2 Apr 2002 22:38:34 -0000 1.13 +++ Makefile 10 Apr 2002 01:10:11 -0000 1.14 @@ -86,6 +86,7 @@ obj-$(CONFIG_FB_MAXINE) += maxinefb.o obj-$(CONFIG_FB_TX3912) += tx3912fb.o obj-$(CONFIG_FB_MQ200) += mq200fb.o +obj-$(CONFIG_FB_PB1100) += au1100fb.o fbgen.o subdir-$(CONFIG_FB_MATROX) += matrox ifeq ($(CONFIG_FB_MATROX),y) Index: fbmem.c =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/video/fbmem.c,v retrieving revision 1.20 retrieving revision 1.21 diff -u -d -r1.20 -r1.21 --- fbmem.c 2 Apr 2002 22:38:34 -0000 1.20 +++ fbmem.c 10 Apr 2002 01:10:12 -0000 1.21 @@ -301,9 +301,6 @@ #ifdef CONFIG_FB_E1356 { "e1356fb", e1356fb_init, e1356fb_setup }, #endif -#ifdef CONFIG_FB_AU1100 - { "au1100fb", au1100fb_init, au1100fb_setup }, -#endif #ifdef CONFIG_FB_IT8181 { "it8181fb", it8181fb_init, it8181fb_setup }, #endif @@ -331,6 +328,9 @@ #ifdef CONFIG_FB_HPCSFB { "hpcsfb", hpcsfb_init, hpcsfb_setup }, #endif +#ifdef CONFIG_FB_PB1100 + { "au1100fb", au1100fb_init, au1100fb_setup }, +#endif /* * Generic drivers that don't use resource management (yet) |
From: Pete P. <pp...@us...> - 2002-04-10 01:10:16
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv12747/arch/mips/configs Modified Files: defconfig-pb1100 Log Message: Au1100 fb driver. First pass only, there are still some things to be done. Index: defconfig-pb1100 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-pb1100,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- defconfig-pb1100 2 Apr 2002 22:59:39 -0000 1.1 +++ defconfig-pb1100 10 Apr 2002 01:10:11 -0000 1.2 @@ -94,7 +94,7 @@ # CONFIG_CPU_MIPS64 is not set # CONFIG_CPU_RC32300 is not set CONFIG_CPU_HAS_PREFETCH=y -CONFIG_64BIT_PHYS_ADDR=y +# CONFIG_64BIT_PHYS_ADDR is not set CONFIG_CPU_ADVANCED=y CONFIG_CPU_HAS_LLSC=y # CONFIG_CPU_HAS_LLDSCD is not set @@ -480,36 +480,14 @@ # Joysticks # # CONFIG_INPUT_GAMEPORT is not set -# CONFIG_INPUT_NS558 is not set -# CONFIG_INPUT_LIGHTNING is not set -# CONFIG_INPUT_PCIGAME is not set -# CONFIG_INPUT_CS461X is not set -# CONFIG_INPUT_EMU10K1 is not set -# CONFIG_INPUT_SERIO is not set -# CONFIG_INPUT_SERPORT is not set # -# Joysticks +# Input core support is needed for gameports +# + +# +# Input core support is needed for joysticks # -# CONFIG_INPUT_ANALOG is not set -# CONFIG_INPUT_A3D is not set -# CONFIG_INPUT_ADI is not set -# CONFIG_INPUT_COBRA is not set -# CONFIG_INPUT_GF2K is not set -# CONFIG_INPUT_GRIP is not set -# CONFIG_INPUT_INTERACT is not set -# CONFIG_INPUT_TMDC is not set -# CONFIG_INPUT_SIDEWINDER is not set -# CONFIG_INPUT_IFORCE_USB is not set -# CONFIG_INPUT_IFORCE_232 is not set -# CONFIG_INPUT_WARRIOR is not set -# CONFIG_INPUT_MAGELLAN is not set -# CONFIG_INPUT_SPACEORB is not set -# CONFIG_INPUT_SPACEBALL is not set -# CONFIG_INPUT_STINGER is not set -# CONFIG_INPUT_DB9 is not set -# CONFIG_INPUT_GAMECON is not set -# CONFIG_INPUT_TURBOGRAFX is not set # CONFIG_QIC02_TAPE is not set # @@ -696,9 +674,8 @@ # CONFIG_FB_3DFX is not set # CONFIG_FB_VOODOO1 is not set # CONFIG_FB_TRIDENT is not set -CONFIG_FB_E1356=y -CONFIG_PB1500_CRT=y -# CONFIG_PB1500_TFT is not set +# CONFIG_FB_E1356 is not set +CONFIG_FB_PB1100=y # CONFIG_FB_IT8181 is not set # CONFIG_FB_SIMPLE is not set # CONFIG_FB_HPCSFB is not set @@ -766,11 +743,10 @@ # # USB Human Interface Devices (HID) # -# CONFIG_USB_HID is not set -# CONFIG_USB_HIDDEV is not set -# CONFIG_USB_KBD is not set -# CONFIG_USB_MOUSE is not set -# CONFIG_USB_WACOM is not set + +# +# Input core support is needed for USB HID +# # # USB Imaging devices @@ -842,13 +818,11 @@ # # Input core support # -CONFIG_INPUT=y -CONFIG_INPUT_KEYBDEV=y -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT is not set +# CONFIG_INPUT_KEYBDEV is not set +# CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVDEV is not set # # Kernel hacking |
From: Pete P. <pp...@us...> - 2002-04-05 23:25:18
|
Update of /cvsroot/linux-mips/linux/include/asm-mips In directory usw-pr-cvs1:/tmp/cvs-serv12970 Modified Files: au1000.h Log Message: Added additional I2S defines, courtesy of Sony. Index: au1000.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/au1000.h,v retrieving revision 1.16 retrieving revision 1.17 diff -u -d -r1.16 -r1.17 --- au1000.h 2 Apr 2002 22:59:40 -0000 1.16 +++ au1000.h 5 Apr 2002 23:25:15 -0000 1.17 @@ -28,6 +28,10 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. */ + /* + * some definitions add by ta...@sm... and sa...@sm... + */ + #ifndef _AU1000_H_ #define _AU1000_H_ @@ -345,11 +349,36 @@ #define SYS_RTCMATCH2 (SYS_BASE + 0x54) #define SYS_RTCREAD (SYS_BASE + 0x58) - /* I2S Controller */ -#define I2S_DATA 0xB1000000 -#define I2S_CONFIG 0xB1000001 -#define I2S_ENABLE 0xB1000002 +#define I2S_DATA 0xB1000000 + #define I2S_DATA_MASK (0xffffff) +#define I2S_CONFIG 0xB1000004 + #define I2S_CONFIG_XU (1<<25) + #define I2S_CONFIG_XO (1<<24) + #define I2S_CONFIG_RU (1<<23) + #define I2S_CONFIG_RO (1<<22) + #define I2S_CONFIG_TR (1<<21) + #define I2S_CONFIG_TE (1<<20) + #define I2S_CONFIG_TF (1<<19) + #define I2S_CONFIG_RR (1<<18) + #define I2S_CONFIG_RE (1<<17) + #define I2S_CONFIG_RF (1<<16) + #define I2S_CONFIG_PD (1<<11) + #define I2S_CONFIG_LB (1<<10) + #define I2S_CONFIG_IC (1<<9) + #define I2S_CONFIG_FM_BIT 7 + #define I2S_CONFIG_FM_MASK (0x3 << I2S_CONFIG_FM_BIT) + #define I2S_CONFIG_FM_I2S (0x0 << I2S_CONFIG_FM_BIT) + #define I2S_CONFIG_FM_LJ (0x1 << I2S_CONFIG_FM_BIT) + #define I2S_CONFIG_FM_RJ (0x2 << I2S_CONFIG_FM_BIT) + #define I2S_CONFIG_TN (1<<6) + #define I2S_CONFIG_RN (1<<5) + #define I2S_CONFIG_SZ_BIT 0 + #define I2S_CONFIG_SZ_MASK (0x1F << I2S_CONFIG_SZ_BIT) + +#define I2S_CONTROL 0xB1000008 + #define I2S_CONTROL_D (1<<1) + #define I2S_CONTROL_CE (1<<0) /* USB Host Controller */ // We pass USB_OHCI_BASE to ioremap, so it needs to be a physical address @@ -637,12 +666,44 @@ /* SSIO */ #define SSI0_STATUS 0xB1600000 + #define SSI_STATUS_BF (1<<4) + #define SSI_STATUS_OF (1<<3) + #define SSI_STATUS_UF (1<<2) + #define SSI_STATUS_D (1<<1) + #define SSI_STATUS_B (1<<0) #define SSI0_INT 0xB1600004 + #define SSI_INT_OI (1<<3) + #define SSI_INT_UI (1<<2) + #define SSI_INT_DI (1<<1) #define SSI0_INT_ENABLE 0xB1600008 + #define SSI_INTE_OIE (1<<3) + #define SSI_INTE_UIE (1<<2) + #define SSI_INTE_DIE (1<<1) #define SSI0_CONFIG 0xB1600020 + #define SSI_CONFIG_AO (1<<24) + #define SSI_CONFIG_DO (1<<23) + #define SSI_CONFIG_ALEN_BIT 20 + #define SSI_CONFIG_ALEN_MASK (0x7<<20) + #define SSI_CONFIG_DLEN_BIT 16 + #define SSI_CONFIG_DLEN_MASK (0x7<<16) + #define SSI_CONFIG_DD (1<<11) + #define SSI_CONFIG_AD (1<<10) + #define SSI_CONFIG_BM_BIT 8 + #define SSI_CONFIG_BM_MASK (0x3<<8) + #define SSI_CONFIG_CE (1<<7) + #define SSI_CONFIG_DP (1<<6) + #define SSI_CONFIG_DL (1<<5) + #define SSI_CONFIG_EP (1<<4) #define SSI0_ADATA 0xB1600024 + #define SSI_AD_D (1<<24) + #define SSI_AD_ADDR_BIT 16 + #define SSI_AD_ADDR_MASK (0xff<<16) + #define SSI_AD_DATA_BIT 0 + #define SSI_AD_DATA_MASK (0xfff<<0) #define SSI0_CLKDIV 0xB1600028 #define SSI0_CONTROL 0xB1600100 + #define SSI_CONTROL_CD (1<<1) + #define SSI_CONTROL_E (1<<0) /* SSI1 */ #define SSI1_STATUS 0xB1680000 @@ -694,6 +755,22 @@ /* GPIO */ #define SYS_PINFUNC 0xB190002C + #define SYS_PF_USB (1<<15) /* 2nd USB device/host */ + #define SYS_PF_U3 (1<<14) /* GPIO23/U3TXD */ + #define SYS_PF_U2 (1<<13) /* GPIO22/U2TXD */ + #define SYS_PF_U1 (1<<12) /* GPIO21/U1TXD */ + #define SYS_PF_SRC (1<<11) /* GPIO6/SROMCKE */ + #define SYS_PF_CK5 (1<<10) /* GPIO3/CLK5 */ + #define SYS_PF_CK4 (1<<9) /* GPIO2/CLK4 */ + #define SYS_PF_IRF (1<<8) /* GPIO15/IRFIRSEL */ + #define SYS_PF_UR3 (1<<7) /* GPIO[14:9]/UART3 */ + #define SYS_PF_I2D (1<<6) /* GPIO8/I2SDI */ + #define SYS_PF_I2S (1<<5) /* I2S/GPIO[29:31] */ + #define SYS_PF_NI2 (1<<4) /* NI2/GPIO[24:28] */ + #define SYS_PF_U0 (1<<3) /* U0TXD/GPIO20 */ + #define SYS_PF_RD (1<<2) /* IRTXD/GPIO19 */ + #define SYS_PF_A97 (1<<1) /* AC97/SSL1 */ + #define SYS_PF_S0 (1<<0) /* SSI_0/GPIO[16:18] */ #define SYS_TRIOUTRD 0xB1900100 #define SYS_TRIOUTCLR 0xB1900100 #define SYS_OUTPUTRD 0xB1900108 @@ -721,8 +798,64 @@ /* Clock Controller */ #define SYS_FREQCTRL0 0xB1900020 + #define SYS_FC_FRDIV2_BIT 22 + #define SYS_FC_FRDIV2_MASK (0xff << FQC2_FRDIV2_BIT) + #define SYS_FC_FE2 (1<<21) + #define SYS_FC_FS2 (1<<20) + #define SYS_FC_FRDIV1_BIT 12 + #define SYS_FC_FRDIV1_MASK (0xff << FQC2_FRDIV1_BIT) + #define SYS_FC_FE1 (1<<11) + #define SYS_FC_FS1 (1<<10) + #define SYS_FC_FRDIV0_BIT 2 + #define SYS_FC_FRDIV0_MASK (0xff << FQC2_FRDIV0_BIT) + #define SYS_FC_FE0 (1<<1) + #define SYS_FC_FS0 (1<<0) #define SYS_FREQCTRL1 0xB1900024 + #define SYS_FC_FRDIV5_BIT 22 + #define SYS_FC_FRDIV5_MASK (0xff << FQC2_FRDIV5_BIT) + #define SYS_FC_FE5 (1<<21) + #define SYS_FC_FS5 (1<<20) + #define SYS_FC_FRDIV4_BIT 12 + #define SYS_FC_FRDIV4_MASK (0xff << FQC2_FRDIV4_BIT) + #define SYS_FC_FE4 (1<<11) + #define SYS_FC_FS4 (1<<10) + #define SYS_FC_FRDIV3_BIT 2 + #define SYS_FC_FRDIV3_MASK (0xff << FQC2_FRDIV3_BIT) + #define SYS_FC_FE3 (1<<1) + #define SYS_FC_FS3 (1<<0) #define SYS_CLKSRC 0xB1900028 + #define SYS_CS_ME1_BIT 27 + #define SYS_CS_ME1_MASK (0x7<<CSC_ME1_BIT) + #define SYS_CS_DE1 (1<<26) + #define SYS_CS_CE1 (1<<25) + #define SYS_CS_ME0_BIT 22 + #define SYS_CS_ME0_MASK (0x7<<CSC_ME0_BIT) + #define SYS_CS_DE0 (1<<21) + #define SYS_CS_CE0 (1<<20) + #define SYS_CS_MI2_BIT 17 + #define SYS_CS_MI2_MASK (0x7<<CSC_MI2_BIT) + #define SYS_CS_DI2 (1<<16) + #define SYS_CS_CI2 (1<<15) + #define SYS_CS_MUH_BIT 12 + #define SYS_CS_MUH_MASK (0x7<<CSC_MUH_BIT) + #define SYS_CS_DUH (1<<11) + #define SYS_CS_CUH (1<<10) + #define SYS_CS_MUD_BIT 7 + #define SYS_CS_MUD_MASK (0x7<<CSC_MUD_BIT) + #define SYS_CS_DUD (1<<6) + #define SYS_CS_CUD (1<<5) + #define SYS_CS_MIR_BIT 2 + #define SYS_CS_MIR_MASK (0x7<<CSC_MIR_BIT) + #define SYS_CS_DIR (1<<1) + #define SYS_CS_CIR (1<<0) + + #define SYS_CS_MUX_AUX 0x1 + #define SYS_CS_MUX_FQ0 0x2 + #define SYS_CS_MUX_FQ1 0x3 + #define SYS_CS_MUX_FQ2 0x4 + #define SYS_CS_MUX_FQ3 0x5 + #define SYS_CS_MUX_FQ4 0x6 + #define SYS_CS_MUX_FQ5 0x7 #define SYS_CPUPLL 0xB1900060 #define SYS_AUXPLL 0xB1900064 |
From: Pete P. <pp...@us...> - 2002-04-03 00:30:39
|
Update of /cvsroot/linux-mips/linux/drivers/video In directory usw-pr-cvs1:/tmp/cvs-serv6623 Modified Files: Config.in Makefile epson1356fb.h fbmem.c Log Message: Added support for the Pb1100 board and updated the driver to use the 64BIT I/O support on Alchemy's boards. Index: Config.in =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/video/Config.in,v retrieving revision 1.15 retrieving revision 1.16 diff -u -d -r1.15 -r1.16 --- Config.in 8 Mar 2002 20:10:51 -0000 1.15 +++ Config.in 2 Apr 2002 22:38:34 -0000 1.16 @@ -155,6 +155,10 @@ bool ' Use CRT on Pb1500 ' CONFIG_PB1500_CRT bool ' Use TFT Panel on Pb1500 ' CONFIG_PB1500_TFT fi + if [ "$CONFIG_MIPS_PB1100" = "y" -a "$CONFIG_FB_E1356" != "n" ]; then + bool ' Use CRT on Pb1100 ' CONFIG_PB1500_CRT + bool ' Use TFT Panel on Pb1100 ' CONFIG_PB1500_TFT + fi fi tristate ' ITE IT8181 framebuffer support' CONFIG_FB_IT8181 tristate ' Simple Frame Buffer support' CONFIG_FB_SIMPLE Index: Makefile =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/video/Makefile,v retrieving revision 1.12 retrieving revision 1.13 diff -u -d -r1.12 -r1.13 --- Makefile 7 Mar 2002 09:15:16 -0000 1.12 +++ Makefile 2 Apr 2002 22:38:34 -0000 1.13 @@ -115,6 +115,7 @@ obj-$(CONFIG_FB_HIT) += hitfb.o fbgen.o obj-$(CONFIG_FB_E1355) += epson1355fb.o fbgen.o obj-$(CONFIG_FB_E1356) += epson1356fb.o +obj-$(CONFIG_FB_AU1100) += au1100lcd.o obj-$(CONFIG_FB_IT8181) += it8181fb.o fbgen.o obj-$(CONFIG_FB_PVR2) += pvr2fb.o obj-$(CONFIG_FB_VOODOO1) += sstfb.o Index: epson1356fb.h =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/video/epson1356fb.h,v retrieving revision 1.6 retrieving revision 1.7 diff -u -d -r1.6 -r1.7 --- epson1356fb.h 7 Mar 2002 23:30:22 -0000 1.6 +++ epson1356fb.h 2 Apr 2002 22:38:34 -0000 1.7 @@ -321,8 +321,8 @@ struct e1356fb_fix { int system; // the number of a pre-packaged system - u32 regbase_phys; // phys start address of registers - u32 membase_phys; // phys start address of fb memory + u64 regbase_phys; // phys start address of registers + u64 membase_phys; // phys start address of fb memory // Memory parameters int mem_speed; // speed: 50, 60, 70, or 80 (nsec) @@ -493,7 +493,7 @@ * 36-bit physical addresses in linux-mips32 mm, since * the mips32 specification specifically supports this. */ - 0xE0000000, 0xE0200000, + 0xE00000000, 0xE00200000, 60, MEM_TYPE_EDO_2CAS, 64, MEM_SMR_CBR, 0, 0, // BUSCLK and MCLK are calculated at run-time 40000, 14318, // CLKI, CLKI2 @@ -550,7 +550,7 @@ * 36-bit physical addresses in linux-mips32 mm, since * the mips32 specification specifically supports this. */ - 0xE0000000, 0xE0200000, + 0xE1B000000, 0xE1B200000, 50, MEM_TYPE_EMBEDDED_SDRAM, 64, MEM_SMR_CBR, 0, 0, // BUSCLK and MCLK are calculated at run-time 40000, 14318, // CLKI, CLKI2 Index: fbmem.c =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/video/fbmem.c,v retrieving revision 1.19 retrieving revision 1.20 diff -u -d -r1.19 -r1.20 --- fbmem.c 18 Mar 2002 22:26:30 -0000 1.19 +++ fbmem.c 2 Apr 2002 22:38:34 -0000 1.20 @@ -130,6 +130,8 @@ extern int e1355fb_setup(char*); extern int e1356fb_init(void); extern int e1356fb_setup(char*); +extern int au1100fb_init(void); +extern int au1100fb_setup(char*); extern int it8181fb_init(void); extern int it8181fb_setup(char*); extern int pvr2fb_init(void); @@ -298,6 +300,9 @@ #endif #ifdef CONFIG_FB_E1356 { "e1356fb", e1356fb_init, e1356fb_setup }, +#endif +#ifdef CONFIG_FB_AU1100 + { "au1100fb", au1100fb_init, au1100fb_setup }, #endif #ifdef CONFIG_FB_IT8181 { "it8181fb", it8181fb_init, it8181fb_setup }, |
From: Pete P. <pp...@us...> - 2002-04-03 00:30:27
|
Update of /cvsroot/linux-mips/linux/drivers/net In directory usw-pr-cvs1:/tmp/cvs-serv13922/drivers/net Modified Files: au1000_eth.c au1000_eth.h Log Message: Pb1100 support. Index: au1000_eth.c =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/net/au1000_eth.c,v retrieving revision 1.8 retrieving revision 1.9 diff -u -d -r1.8 -r1.9 --- au1000_eth.c 15 Feb 2002 19:47:27 -0000 1.8 +++ au1000_eth.c 2 Apr 2002 22:59:39 -0000 1.9 @@ -121,9 +121,12 @@ au1500_iflist[NUM_INTERFACES] = { {AU1500_ETH0_BASE, AU1000_ETH0_IRQ}, {AU1500_ETH1_BASE, AU1000_ETH1_IRQ} + }, + au1100_iflist[NUM_INTERFACES] = { + {AU1000_ETH0_BASE, AU1000_ETH0_IRQ}, + {NULL, NULL} }; - static char version[] __devinitdata = "au1000eth.c:1.0 pp...@mv...\n"; @@ -636,12 +639,18 @@ } else if ( (prid & 0xffff0000) == 0x01030000 ) { base_addr = au1500_iflist[i].port; irq = au1500_iflist[i].irq; + } else if ( (prid & 0xffff0000) == 0x02030000 ) { + base_addr = au1100_iflist[i].port; + irq = au1100_iflist[i].irq; } else { printk(KERN_ERR "au1000 eth: unknown Processor ID\n"); return -ENODEV; } - if (au1000_probe1(NULL, base_addr, irq, i) != 0) { - return -ENODEV; + // check for valid entries, au1100 only has one entry + if (base_addr && irq) { + if (au1000_probe1(NULL, base_addr, irq, i) != 0) { + return -ENODEV; + } } } return 0; Index: au1000_eth.h =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/net/au1000_eth.h,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- au1000_eth.h 4 Dec 2001 03:36:09 -0000 1.3 +++ au1000_eth.h 2 Apr 2002 22:59:39 -0000 1.4 @@ -39,7 +39,7 @@ #define ETH_TX_TIMEOUT HZ/4 #define MAC_MIN_PKT_SIZE 64 -#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1500) +#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1100) #define PHY_ADDRESS 0 #define PHY_CONTROL_DEFAULT 0x3000 #define PHY_CONTROL_REG_ADDR 0 |