From: Petr V. <VAN...@vc...> - 2004-04-07 21:25:26
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On 7 Apr 04 at 22:44, Jurriaan wrote: > From: Jean Delvare <kh...@li...> > Date: Wed, Apr 07, 2004 at 10:24:15PM +0200 > > > Thanks everyone for mailing back-and-forth, and testing. Please test > > > if this fixes the problem on your radeon-machine as well, if possible. > > > > Please provide a clean patch against 2.6.5 if you want me to test. > > > Try this (warning: this only works in 32bpp, and will probably do > strange things with other color depths; it's a proof-of-concept). > > diff -Br -b -U 3 -N linux-2.6.5/drivers/video/aty/radeon_accel.c linux-2.6.5-new/drivers/video/aty/radeon_accel.c > --- linux-2.6.5/drivers/video/aty/radeon_accel.c 2004-02-18 04:58:34.000000000 +0100 > +++ linux-2.6.5-new/drivers/video/aty/radeon_accel.c 2004-04-07 22:40:41.000000000 +0200 > @@ -7,13 +7,16 @@ > static void radeonfb_prim_fillrect(struct radeonfb_info *rinfo, > const struct fb_fillrect *region) > { > + int color; > radeon_fifo_wait(4); > > OUTREG(DP_GUI_MASTER_CNTL, > rinfo->dp_gui_master_cntl /* contains, like GMC_DST_32BPP */ > | GMC_BRUSH_SOLID_COLOR > | ROP3_P); > - OUTREG(DP_BRUSH_FRGD_CLR, region->color); > + color = region->color | (region->color << 8); > + color = color | (color << 16); > + OUTREG(DP_BRUSH_FRGD_CLR, color); > OUTREG(DP_WRITE_MSK, 0xffffffff); > OUTREG(DP_CNTL, (DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM)); > > Let me know if it works for you! Did you tried that it does not work on 16bpp? I would be really surprised if it did not work for 16/8bpp too. Maybe better to apply this patch and try it... Petr |