Andrew Morton wrote:
> On Thu, 20 Aug 2009 22:50:47 +0100
> Ben Dooks <be...@si...> wrote:
>
>> In the final part of the calculation for the tft display clockrate we
>> divide the output pf s3c2410fb_calc_pixclk() by 2 which leaves us with
>> a rounding error if the result is odd.
>>
>> Change to using DIV_ROUND_UP() to ensure that we always choose a higher
>> divisor and thus a lower frequency.
>>
>> Signed-off-by: Ben Dooks <be...@si...>
>>
>> ---
>> drivers/video/s3c2410fb.c | 4 +++-
>> 2 files changed, 5 insertions(+), 2 deletions(-)
>>
>> Index: b/drivers/video/s3c2410fb.c
>> ===================================================================
>> --- a/drivers/video/s3c2410fb.c 2009-08-20 08:45:41.000000000 +0100
>> +++ b/drivers/video/s3c2410fb.c 2009-08-20 08:45:42.000000000 +0100
>> @@ -369,7 +369,9 @@ static void s3c2410fb_activate_var(struc
>> void __iomem *regs = fbi->io;
>> int type = fbi->regs.lcdcon1 & S3C2410_LCDCON1_TFT;
>> struct fb_var_screeninfo *var = &info->var;
>> - int clkdiv = s3c2410fb_calc_pixclk(fbi, var->pixclock) / 2;
>> + int clkdiv;
>> +
>> + clkdiv = DIV_ROUND_UP(s3c2410fb_calc_pixclk(fbi, var->pixclock), 2);
>>
>> printk(KERN_INFO "%s: pixclock=%d, clkdiv=%d\n",
>> __func__, var->pixclock, clkdiv);
>
> The changelog forgot to tell us what the impact of this bug is, so I
> cannot work out whether we need this fix in 2.6.32, 2.6.31, 2.6.30.x, ....
Sorry, found this whilst working on a new machine and the pix clock being
too fast for the display. The machine is not yet merged into the mainline
so this not an important fix.
--
Ben Dooks, Software Engineer, Simtec Electronics
http://www.simtec.co.uk/
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