From: Vaibhav H. <hva...@ti...> - 2008-09-17 08:04:07
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With referance to the below RFC added DSS library and TV encoder support for OMAP 2/3 architectures. http://www.mail-archive.com/lin...@vg.../msg02510.html http://lists-archives.org/video4linux/23648-omap3-display-driver-v4l This library as of now includes support for video planes (video1 and video2), V4L2 driver makes use of DSS library to display image onto the TV. The next immediate plan is to add support for Graphics plane in DSS library. Signed-off-by: Brijesh Jadav <bri...@ti...> Hari Nagalla <hna...@ti...> Hardik Shah <har...@ti...> Manju Hadli <mr...@ti...> R Sivaraj <si...@ti...> Vaibhav Hiremath <hva...@ti...> --- arch/arm/plat-omap/Kconfig | 15 + arch/arm/plat-omap/Makefile | 3 +- arch/arm/plat-omap/include/mach/io.h | 3 +- arch/arm/plat-omap/include/mach/omap-dss.h | 977 ++++++++++ arch/arm/plat-omap/include/mach/omap-venc.h | 627 +++++++ arch/arm/plat-omap/omap-dss.c | 2606 +++++++++++++++++++++++++++ arch/arm/plat-omap/omap-venc.c | 492 +++++ 7 files changed, 4720 insertions(+), 3 deletions(-) create mode 100644 arch/arm/plat-omap/include/mach/omap-dss.h create mode 100644 arch/arm/plat-omap/include/mach/omap-venc.h create mode 100755 arch/arm/plat-omap/omap-dss.c create mode 100755 arch/arm/plat-omap/omap-venc.c diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index 960c13f..05cb683 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -245,6 +245,21 @@ config OMAP_SERIAL_WAKE to data on the serial RX line. This allows you to wake the system from serial console. +config VIDEO_OMAP_DSSLIB + bool "DSS Library support" + depends on ARCH_OMAP2 || ARCH_OMAP3 + default n + help + Select this option if you want to have DSS hardware library. + +config VIDEO_OMAP_TVOUT + bool "TV out support" + depends on ARCH_OMAP2 || ARCH_OMAP3 + select VIDEO_OMAP_DSSLIB + default n + help + Select this option if you want to enable TV out. + endmenu endif diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index 1259846..fd6fee7 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile @@ -11,7 +11,8 @@ obj- := # OCPI interconnect support for 1710, 1610 and 5912 obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o - +obj-$(CONFIG_VIDEO_OMAP_DSSLIB) += omap-dss.o +obj-$(CONFIG_VIDEO_OMAP_TVOUT) += omap-venc.o obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o obj-$(CONFIG_CPU_FREQ) += cpu-omap.o diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h index ea55267..1fa211f 100644 --- a/arch/arm/plat-omap/include/mach/io.h +++ b/arch/arm/plat-omap/include/mach/io.h @@ -142,12 +142,11 @@ #define OMAP343X_SDRC_VIRT 0xFD000000 #define OMAP343X_SDRC_SIZE SZ_1M - #define IO_OFFSET 0x90000000 #define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ #define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ #define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */ - +#define io_p2v(pa) __IO_ADDRESS(pa) /* DSP */ #define DSP_MEM_34XX_PHYS OMAP34XX_DSP_MEM_BASE /* 0x58000000 */ #define DSP_MEM_34XX_VIRT 0xe0000000 diff --git a/arch/arm/plat-omap/include/mach/omap-dss.h b/arch/arm/plat-omap/include/mach/omap-dss.h new file mode 100644 index 0000000..cbb3f77 --- /dev/null +++ b/arch/arm/plat-omap/include/mach/omap-dss.h @@ -0,0 +1,977 @@ +/* + * arch/arm/plat-omap/include/mach/omap-dss.h + * + * Copyright (C) 2004-2005 Texas Instruments. + * Copyright (C) 2006 Texas Instruments. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + + * Leveraged from original Linux 2.6 framebuffer driver for OMAP24xx + * Author: Andy Lowe (so...@mv...) + * Copyright (C) 2004 MontaVista Software, Inc. + * + */ + +#ifndef __ASM_ARCH_OMAP_DISP_H +#define __ASM_ARCH_OMAP_DISP_H + +/* 16 bit uses LDRH/STRH, base +/- offset_8 */ +typedef struct { + volatile u16 offset[256]; +} __regbase16; +#define __REGV16(vaddr) (((__regbase16 *)((vaddr)&~0xff)) \ + ->offset[((vaddr)&0xff)>>1]) +#define __REG16(paddr) __REGV16(io_p2v(paddr)) + +/* 8/32 bit uses LDR/STR, base +/- offset_12 */ +typedef struct { + volatile u8 offset[4096]; +} __regbase8; +#define __REGV8(vaddr) (((__regbase8 *)((vaddr)&~4095)) \ + ->offset[((vaddr)&4095)>>0]) +#define __REG8(paddr) __REGV8(io_p2v(paddr)) + +typedef struct { + volatile u32 offset[4096]; +} __regbase32; +#define __REGV32(vaddr) (((__regbase32 *)((vaddr)&~4095)) \ + ->offset[((vaddr)&4095)>>2]) +#define __REG32(paddr) __REGV32(io_p2v(paddr)) + +/*physical memory map definitions */ + /* display subsystem */ +#define DSS_REG_BASE 0x48050000 +#define DSS_REG_SIZE 0x00001000 + /* DSS */ +#define DSS_REG_OFFSET 0x00000000 + /* display controller */ +#define DISPC_REG_OFFSET 0x00000400 + /* remote framebuffer interface */ +#define RFBI_REG_OFFSET 0x00000800 + /* video encoder */ +#define VENC_REG_OFFSET 0x00000C00 + +/* display subsystem register offsets */ +#define DSS_REVISION 0x000 +#define DSS_SYSCONFIG 0x010 +#define DSS_SYSSTATUS 0x014 +#define DSS_CONTROL 0x040 +#ifdef CONFIG_ARCH_OMAP3430 +#define DSS_SDI_CONTROL 0x044 /* omap3430 specific */ +#define DSS_PLL_CONTROL 0x048 /* omap3430 specific */ +#endif /* CONFIG_ARCH_OMAP3430 */ +#define DSS_PSA_LCD_REG_1 0x050 +#define DSS_PSA_LCD_REG_2 0x054 +#define DSS_PSA_VIDEO_REG 0x058 +#define DSS_STATUS 0x05C + +/* display controller register offsets */ +#define DISPC_REVISION 0x000 +#define DISPC_SYSCONFIG 0x010 +#define DISPC_SYSSTATUS 0x014 +#define DISPC_IRQSTATUS 0x018 +#define DISPC_IRQENABLE 0x01C +#define DISPC_CONTROL 0x040 +#define DISPC_CONFIG 0x044 +#define DISPC_CAPABLE 0x048 +#define DISPC_DEFAULT_COLOR0 0x04C +#define DISPC_DEFAULT_COLOR1 0x050 +#define DISPC_TRANS_COLOR0 0x054 +#define DISPC_TRANS_COLOR1 0x058 +#define DISPC_LINE_STATUS 0x05C +#define DISPC_LINE_NUMBER 0x060 +#define DISPC_TIMING_H 0x064 +#define DISPC_TIMING_V 0x068 +#define DISPC_POL_FREQ 0x06C +#define DISPC_DIVISOR 0x070 +#define DISPC_GLOBAL_ALPHA 0x074 +#define DISPC_SIZE_DIG 0x078 +#define DISPC_SIZE_LCD 0x07C +#define DISPC_GFX_BA0 0x080 +#define DISPC_GFX_BA1 0x084 +#define DISPC_GFX_POSITION 0x088 +#define DISPC_GFX_SIZE 0x08C +#define DISPC_GFX_ATTRIBUTES 0x0A0 +#define DISPC_GFX_FIFO_THRESHOLD 0x0A4 +#define DISPC_GFX_FIFO_SIZE 0x0A8 +#define DISPC_GFX_ROW_INC 0x0AC +#define DISPC_GFX_PIXEL_INC 0x0B0 +#define DISPC_GFX_WINDOW_SKIP 0x0B4 +#define DISPC_GFX_TABLE_BA 0x0B8 + +#define RFBI_SYSCONFIG 0x010 + +/* The registers for the video pipelines are parameterized by the video pipeline + * index: n=0 for VID1 and n=1 for VID2. + */ +#define DISPC_VID_BA0(n) (0x0BC + (n)*0x90) +#define DISPC_VID_BA1(n) (0x0C0 + (n)*0x90) +#define DISPC_VID_POSITION(n) (0x0C4 + (n)*0x90) +#define DISPC_VID_SIZE(n) (0x0C8 + (n)*0x90) +#define DISPC_VID_ATTRIBUTES(n) (0x0CC + (n)*0x90) +#define DISPC_VID_FIFO_THRESHOLD(n) (0x0D0 + (n)*0x90) +#define DISPC_VID_FIFO_SIZE(n) (0x0D4 + (n)*0x90) +#define DISPC_VID_ROW_INC(n) (0x0D8 + (n)*0x90) +#define DISPC_VID_PIXEL_INC(n) (0x0DC + (n)*0x90) +#define DISPC_VID_FIR(n) (0x0E0 + (n)*0x90) +#define DISPC_VID_PICTURE_SIZE(n) (0x0E4 + (n)*0x90) +#define DISPC_VID_ACCU0(n) (0x0E8 + (n)*0x90) +#define DISPC_VID_ACCU1(n) (0x0EC + (n)*0x90) + +/* The FIR coefficients are parameterized by the video pipeline index n = {0, 1} + * and the coefficient index i = {0, 1, 2, 3, 4, 5, 6, 7}. + */ +#define DISPC_VID_FIR_COEF_H(n, i) (0x0F0 + (i)*0x8 + (n)*0x90) +#define DISPC_VID_FIR_COEF_HV(n, i) (0x0F4 + (i)*0x8 + (n)*0x90) +#define DISPC_VID_FIR_COEF_V(n, i) (0x1E0 + (i)*0x4 + (n)*0x20) +#define DISPC_VID_CONV_COEF0(n) (0x130 + (n)*0x90) +#define DISPC_VID_CONV_COEF1(n) (0x134 + (n)*0x90) +#define DISPC_VID_CONV_COEF2(n) (0x138 + (n)*0x90) +#define DISPC_VID_CONV_COEF3(n) (0x13C + (n)*0x90) +#define DISPC_VID_CONV_COEF4(n) (0x140 + (n)*0x90) + +#define DISPC_DATA_CYCLE1 0x1D4 +#define DISPC_DATA_CYCLE2 0x1D8 +#define DISPC_DATA_CYCLE3 0x1DC + +#define DISPC_CPR_R 0x220 +#define DISPC_CPR_G 0x224 +#define DISPC_CPR_B 0x228 + +/* bit fields within selected registers */ +#define DSS_CONTROL_VENC_OUT (1 << 6) +#define DSS_CONTROL_TV_REF (1 << 5) +#define DSS_CONTROL_DAC_DEMEN (1 << 4) +#define DSS_CONTROL_VENC_CLOCK_4X_ENABLE (1 << 3) +#define DSS_CONTROL_VENC_CLOCK_MODE (1 << 2) +#define DSS_CONTROL_CLK (1 << 0) +#define DSS_CONTROL_APLL_CLK 1 +#define DSS_CONTROL_DPLL_CLK 0 +#define DSS_SYSCONFIG_SOFTRESET (1 << 1) +#define DSS_SYSSTATUS_RESETDONE (1 << 0) +#define DSS_SYSCONFIG_SIDLEMODE (3 << 3) +#define DSS_SYSCONFIG_SIDLEMODE_FIDLE (0 << 3) +#define DSS_SYSCONFIG_SIDLEMODE_NIDLE (1 << 3) +#define DSS_SYSCONFIG_SIDLEMODE_SIDLE (2 << 3) +#define DSS_SYSCONFIG_SOFTRESET (1 << 1) +#define DSS_SYSCONFIG_AUTOIDLE (1 << 0) + +#define DISPC_REVISION_MAJOR (15 << 4) +#define DISPC_REVISION_MAJOR_SHIFT 4 +#define DISPC_REVISION_MINOR (15 << 0) +#define DISPC_REVISION_MINOR_SHIFT 0 + +#define DISPC_SYSCONFIG_MIDLEMODE (3 << 12) +#define DISPC_SYSCONFIG_MIDLEMODE_FSTANDBY (0 << 12) +#define DISPC_SYSCONFIG_MIDLEMODE_NSTANDBY (1 << 12) +#define DISPC_SYSCONFIG_MIDLEMODE_SSTANDBY (2 << 12) +#define DISPC_SYSCONFIG_SIDLEMODE (3 << 3) +#define DISPC_SYSCONFIG_SIDLEMODE_FIDLE (0 << 3) +#define DISPC_SYSCONFIG_SIDLEMODE_NIDLE (1 << 3) +#define DISPC_SYSCONFIG_SIDLEMODE_SIDLE (2 << 3) +#define DISPC_SYSCONFIG_SOFTRESET (1 << 1) +#define DISPC_SYSCONFIG_AUTOIDLE (1 << 0) +#define DISPC_SYSCONFIG_CLKACTIVITY (2 << 8) +#define DISPC_SYSCONFIG_ENABLE_WKUP (1 << 2) + +#define DISPC_SYSSTATUS_RESETDONE (1 << 0) + +#define DISPC_IRQSTATUS_SYNCLOSTDIGITAL (1 << 15) +#define DISPC_IRQSTATUS_SYNCLOST (1 << 14) +#define DISPC_IRQSTATUS_VID2ENDWINDOW (1 << 13) +#define DISPC_IRQSTATUS_VID2FIFOUNDERFLOW (1 << 12) +#define DISPC_IRQSTATUS_VID1ENDWINDOW (1 << 11) +#define DISPC_IRQSTATUS_VID1FIFOUNDERFLOW (1 << 10) +#define DISPC_IRQSTATUS_OCPERROR (1 << 9) +#define DISPC_IRQSTATUS_PALETTEGAMMALOADING (1 << 8) +#define DISPC_IRQSTATUS_GFXENDWINDOW (1 << 7) +#define DISPC_IRQSTATUS_GFXFIFOUNDERFLOW (1 << 6) +#define DISPC_IRQSTATUS_PROGRAMMEDLINENUMBER (1 << 5) +#define DISPC_IRQSTATUS_ACBIASCOUNTSTATUS (1 << 4) +#define DISPC_IRQSTATUS_EVSYNC_ODD (1 << 3) +#define DISPC_IRQSTATUS_EVSYNC_EVEN (1 << 2) +#define DISPC_IRQSTATUS_VSYNC (1 << 1) +#define DISPC_IRQSTATUS_FRAMEDONE (1 << 0) + +#define DISPC_IRQENABLE_SYNCLOSTDIGITAL (1 << 15) +#define DISPC_IRQENABLE_SYNCLOST (1 << 14) +#define DISPC_IRQENABLE_VID2ENDWINDOW (1 << 13) +#define DISPC_IRQENABLE_VID2FIFOUNDERFLOW (1 << 12) +#define DISPC_IRQENABLE_VID1ENDWINDOW (1 << 11) +#define DISPC_IRQENABLE_VID1FIFOUNDERFLOW (1 << 10) +#define DISPC_IRQENABLE_OCPERROR (1 << 9) +#define DISPC_IRQENABLE_PALETTEGAMMALOADING (1 << 8) +#define DISPC_IRQENABLE_GFXENDWINDOW (1 << 7) +#define DISPC_IRQENABLE_GFXFIFOUNDERFLOW (1 << 6) +#define DISPC_IRQENABLE_PROGRAMMEDLINENUMBER (1 << 5) +#define DISPC_IRQENABLE_ACBIASCOUNTSTATUS (1 << 4) +#define DISPC_IRQENABLE_EVSYNC_ODD (1 << 3) +#define DISPC_IRQENABLE_EVSYNC_EVEN (1 << 2) +#define DISPC_IRQENABLE_VSYNC (1 << 1) +#define DISPC_IRQENABLE_FRAMEDONE (1 << 0) + +#define DISPC_CONTROL_TDMUNUSEDBITS (3 << 25) +#define DISPC_CONTROL_TDMUNUSEDBITS_LOWLEVEL (0 << 25) +#define DISPC_CONTROL_TDMUNUSEDBITS_HIGHLEVEL (1 << 25) +#define DISPC_CONTROL_TDMUNUSEDBITS_UNCHANGED (2 << 25) +#define DISPC_CONTROL_TDMCYCLEFORMAT (3 << 23) +#define DISPC_CONTROL_TDMCYCLEFORMAT_1CYCPERPIX (0 << 23) +#define DISPC_CONTROL_TDMCYCLEFORMAT_2CYCPERPIX (1 << 23) +#define DISPC_CONTROL_TDMCYCLEFORMAT_3CYCPERPIX (2 << 23) +#define DISPC_CONTROL_TDMCYCLEFORMAT_3CYCPER2PIX (3 << 23) +#define DISPC_CONTROL_TDMPARALLELMODE (3 << 21) +#define DISPC_CONTROL_TDMPARALLELMODE_8BPARAINT (0 << 21) +#define DISPC_CONTROL_TDMPARALLELMODE_9BPARAINT (1 << 21) +#define DISPC_CONTROL_TDMPARALLELMODE_12BPARAINT (2 << 21) +#define DISPC_CONTROL_TDMPARALLELMODE_16BPARAINT (3 << 21) +#define DISPC_CONTROL_TDMENABLE (1 << 20) +#define DISPC_CONTROL_HT (7 << 17) +#define DISPC_CONTROL_HT_SHIFT 17 +#define DISPC_CONTROL_GPOUT1 (1 << 16) +#define DISPC_CONTROL_GPOUT0 (1 << 15) +#define DISPC_CONTROL_GPIN1 (1 << 14) +#define DISPC_CONTROL_GPIN0 (1 << 13) +#define DISPC_CONTROL_OVERLAYOPTIMIZATION (1 << 12) +#define DISPC_CONTROL_RFBIMODE (1 << 11) +#define DISPC_CONTROL_SECURE (1 << 10) +#define DISPC_CONTROL_TFTDATALINES (3 << 8) +#define DISPC_CONTROL_TFTDATALINES_OALSB12B (0 << 8) +#define DISPC_CONTROL_TFTDATALINES_OALSB16B (1 << 8) +#define DISPC_CONTROL_TFTDATALINES_OALSB18B (2 << 8) +#define DISPC_CONTROL_TFTDATALINES_OALSB24B (3 << 8) +#define DISPC_CONTROL_TFTDITHERENABLE (1 << 7) +#define DISPC_CONTROL_GODIGITAL (1 << 6) +#define DISPC_CONTROL_GOLCD (1 << 5) +#define DISPC_CONTROL_M8B (1 << 4) +#define DISPC_CONTROL_STNTFT (1 << 3) +#define DISPC_CONTROL_MONOCOLOR (1 << 2) +#define DISPC_CONTROL_DIGITALENABLE (1 << 1) +#define DISPC_CONTROL_LCDENABLE (1 << 0) + +#define DISPC_CONFIG_TVALPHAENABLE (1 << 19) +#define DISPC_CONFIG_LCDALPHAENABLE (1 << 18) +#ifdef CONFIG_ARCH_OMAP3430 +#define DISPC_CONFIG_FIFOMERGE (1 << 14) +#endif +#define DISPC_CONFIG_TCKDIGSELECTION (1 << 13) +#define DISPC_CONFIG_TCKDIGENABLE (1 << 12) +#define DISPC_CONFIG_TCKLCDSELECTION (1 << 11) +#define DISPC_CONFIG_TCKLCDENABLE (1 << 10) +#define DISPC_CONFIG_FUNCGATED (1 << 9) +#define DISPC_CONFIG_ACBIASGATED (1 << 8) +#define DISPC_CONFIG_VSYNCGATED (1 << 7) +#define DISPC_CONFIG_HSYNCGATED (1 << 6) +#define DISPC_CONFIG_PIXELCLOCKGATED (1 << 5) +#define DISPC_CONFIG_PIXELDATAGATED (1 << 4) +#define DISPC_CONFIG_PALETTEGAMMATABLE (1 << 3) +#define DISPC_CONFIG_LOADMODE_FRDATLEFR (1 << 2) +#define DISPC_CONFIG_LOADMODE_PGTABUSETB (1 << 1) +#define DISPC_CONFIG_PIXELGATED (1 << 0) + +#define DISPC_CAPABLE_GFXGAMMATABLECAPABLE (1 << 9) +#define DISPC_CAPABLE_GFXLAYERCAPABLE (1 << 8) +#define DISPC_CAPABLE_GFXTRANSDSTCAPABLE (1 << 7) +#define DISPC_CAPABLE_STNDITHERINGCAPABLE (1 << 6) +#define DISPC_CAPABLE_TFTDITHERINGCAPABLE (1 << 5) +#define DISPC_CAPABLE_VIDTRANSSRCCAPABLE (1 << 4) +#define DISPC_CAPABLE_VIDLAYERCAPABLE (1 << 3) +#define DISPC_CAPABLE_VIDVERTFIRCAPABLE (1 << 2) +#define DISPC_CAPABLE_VIDHORFIRCAPABLE (1 << 1) +#define DISPC_CAPABLE_VIDCAPABLE (1 << 0) + +#define DISPC_POL_FREQ_ONOFF_SHIFT 17 +#define DISPC_POL_FREQ_ONOFF (1 << 17) +#define DISPC_POL_FREQ_RF (1 << 16) +#define DISPC_POL_FREQ_IEO (1 << 15) +#define DISPC_POL_FREQ_IPC_SHIFT 14 +#define DISPC_POL_FREQ_IPC (1 << 14) +#define DISPC_POL_FREQ_IHS (1 << 13) +#define DISPC_POL_FREQ_IVS (1 << 12) +#define DISPC_POL_FREQ_ACBI (15 << 8) +#define DISPC_POL_FREQ_ACBI_SHIFT 8 +#define DISPC_POL_FREQ_ACB 0xFF +#define DISPC_POL_FREQ_ACB_SHIFT 0 + +#define DISPC_TIMING_H_HBP (0xFF << 20) +#define DISPC_TIMING_H_HBP_SHIFT 20 +#define DISPC_TIMING_H_HFP (0xFF << 8) +#define DISPC_TIMING_H_HFP_SHIFT 8 +#define DISPC_TIMING_H_HSW (0x3F << 0) +#define DISPC_TIMING_H_HSW_SHIFT 0 + +#define DISPC_TIMING_V_VBP (0xFF << 20) +#define DISPC_TIMING_V_VBP_SHIFT 20 +#define DISPC_TIMING_V_VFP (0xFF << 8) +#define DISPC_TIMING_V_VFP_SHIFT 8 +#define DISPC_TIMING_V_VSW (0x3F << 0) +#define DISPC_TIMING_V_VSW_SHIFT 0 + +#define DISPC_DIVISOR_LCD (0xFF << 16) +#define DISPC_DIVISOR_LCD_SHIFT 16 +#define DISPC_DIVISOR_PCD 0xFF +#define DISPC_DIVISOR_PCD_SHIFT 0 + +#define DISPC_GLOBAL_ALPHA_VID2_GALPHA (0xFF << 16) +#define DISPC_GLOBAL_ALPHA_VID2_GALPHA_SHIFT 16 +#define DISPC_GLOBAL_ALPHA_GFX_GALPHA 0xFF +#define DISPC_GLOBAL_ALPHA_GFX_GALPHA_SHIFT 0 + +#define DISPC_SIZE_LCD_LPP (0x7FF << 16) +#define DISPC_SIZE_LCD_LPP_SHIFT 16 +#define DISPC_SIZE_LCD_PPL 0x7FF +#define DISPC_SIZE_LCD_PPL_SHIFT 0 + +#define DISPC_SIZE_DIG_LPP (0x7FF << 16) +#define DISPC_SIZE_DIG_LPP_SHIFT 16 +#define DISPC_SIZE_DIG_PPL 0x7FF +#define DISPC_SIZE_DIG_PPL_SHIFT 0 + +#define DISPC_GFX_POSITION_GFXPOSY (0x7FF << 16) +#define DISPC_GFX_POSITION_GFXPOSY_SHIFT 16 +#define DISPC_GFX_POSITION_GFXPOSX 0x7FF +#define DISPC_GFX_POSITION_GFXPOSX_SHIFT 0 + +#define DISPC_GFX_SIZE_GFXSIZEY (0x7FF << 16) +#define DISPC_GFX_SIZE_GFXSIZEY_SHIFT 16 +#define DISPC_GFX_SIZE_GFXSIZEX 0x7FF +#define DISPC_GFX_SIZE_GFXSIZEX_SHIFT 0 + +#define DISPC_GFX_ATTRIBUTES_GFXENDIANNESS (1 << 10) +#define DISPC_GFX_ATTRIBUTES_GFXNIBBLEMODE (1 << 9) +#define DISPC_GFX_ATTRIBUTES_GFXCHANNELOUT (1 << 8) +#define DISPC_GFX_ATTRIBUTES_GFXBURSTSIZE (3 << 6) +#define DISPC_GFX_ATTRIBUTES_GFXBURSTSIZE_BURST4X32 (0 << 6) +#define DISPC_GFX_ATTRIBUTES_GFXBURSTSIZE_BURST8X32 (1 << 6) +#define DISPC_GFX_ATTRIBUTES_GFXBURSTSIZE_BURST16X32 (2 << 6) +#define DISPC_GFX_ATTRIBUTES_GFXREPLICATIONENABLE (1 << 5) +#define DISPC_GFX_ATTRIBUTES_GFXFORMAT (15 << 1) +#define DISPC_GFX_ATTRIBUTES_GFXFORMAT_BITMAP1 (0 << 1) +#define DISPC_GFX_ATTRIBUTES_GFXFORMAT_BITMAP2 (1 << 1) +#define DISPC_GFX_ATTRIBUTES_GFXFORMAT_BITMAP4 (2 << 1) +#define DISPC_GFX_ATTRIBUTES_GFXFORMAT_BITMAP8 (3 << 1) +#define DISPC_GFX_ATTRIBUTES_GFXFORMAT_RGB12 (4 << 1) +#define DISPC_GFX_ATTRIBUTES_GFXFORMAT_RGB16 (6 << 1) +#define DISPC_GFX_ATTRIBUTES_GFXFORMAT_RGB24 (8 << 1) +#define DISPC_GFX_ATTRIBUTES_GFXFORMAT_ARGB32 (12 << 1) +#define DISPC_GFX_ATTRIBUTES_GFXFORMAT_RGBA32 (13 << 1) +#define DISPC_GFX_ATTRIBUTES_ENABLE (1 << 0) +#define DISPC_GFX_ATTRIBUTES_GFXREPEN 5 + +#ifdef CONFIG_ARCH_OMAP3430 +#define DISPC_GFX_FIFO_THRESHOLD_HIGH (0xFFF << 16) +#define DISPC_GFX_FIFO_THRESHOLD_HIGH_SHIFT 16 +#define DISPC_GFX_FIFO_THRESHOLD_LOW 0xFFF +#define DISPC_GFX_FIFO_THRESHOLD_LOW_SHIFT 0 +#else +#define DISPC_GFX_FIFO_THRESHOLD_HIGH (0x1FF << 16) +#define DISPC_GFX_FIFO_THRESHOLD_HIGH_SHIFT 16 +#define DISPC_GFX_FIFO_THRESHOLD_LOW 0x1FF +#define DISPC_GFX_FIFO_THRESHOLD_LOW_SHIFT 0 +#endif /* CONFIG_ARCH_OMAP3430 */ + +#define DISPC_VID_POSITION_VIDPOSY (0x7FF << 16) +#define DISPC_VID_POSITION_VIDPOSY_SHIFT 16 +#define DISPC_VID_POSITION_VIDPOSX 0x7FF +#define DISPC_VID_POSITION_VIDPOSX_SHIFT 0 + +#define DISPC_VID_SIZE_VIDSIZEY (0x7FF << 16) +#define DISPC_VID_SIZE_VIDSIZEY_SHIFT 16 +#define DISPC_VID_SIZE_VIDSIZEX 0x7FF +#define DISPC_VID_SIZE_VIDSIZEX_SHIFT 0 + +#define DISPC_VID_ATTRIBUTES_VIDVERTICALTAPS (1 << 21) +#define DISPC_VID_ATTRIBUTES_VIDROWREPEATENABLE (1 << 18) +#define DISPC_VID_ATTRIBUTES_VIDENDIANNESS (1 << 17) +#define DISPC_VID_ATTRIBUTES_VIDCHANNELOUT (1 << 16) +#define DISPC_VID_ATTRIBUTES_VIDBURSTSIZE (3 << 14) +#define DISPC_VID_ATTRIBUTES_VIDBURSTSIZE_BURST4X32 (0 << 14) +#define DISPC_VID_ATTRIBUTES_VIDBURSTSIZE_BURST8X32 (1 << 14) +#define DISPC_VID_ATTRIBUTES_VIDBURSTSIZE_BURST16X32 (2 << 14) +#define DISPC_VID_ATTRIBUTES_VIDROTATION(n) ((n) << 12) +#define DISPC_VID_ATTRIBUTES_VIDFULLRANGE (1 << 11) +#define DISPC_VID_ATTRIBUTES_VIDREPLICATIONENABLE (1 << 10) +#define DISPC_VID_ATTRIBUTES_VIDCOLORCONVENABLE (1 << 9) +#define DISPC_VID_ATTRIBUTES_VIDVRESIZECONF (1 << 8) +#define DISPC_VID_ATTRIBUTES_VIDHRESIZECONF (1 << 7) +#define DISPC_VID_ATTRIBUTES_VIDRESIZEENABLE_VRESIZE (1 << 6) +#define DISPC_VID_ATTRIBUTES_VIDRESIZEENABLE_HRESIZE (1 << 5) +#define DISPC_VID_ATTRIBUTES_VIDFORMAT (15 << 1) +#define DISPC_VID_ATTRIBUTES_VIDFORMAT_RGB16 (6 << 1) +#define DISPC_VID_ATTRIBUTES_VIDFORMAT_RGB24 (8 << 1) +#define DISPC_VID_ATTRIBUTES_VIDFORMAT_RGB24P (9 << 1) +#define DISPC_VID_ATTRIBUTES_VIDFORMAT_YUV2 (10 << 1) +#define DISPC_VID_ATTRIBUTES_VIDFORMAT_UYVY (11 << 1) +#define DISPC_VID_ATTRIBUTES_VIDFORMAT_ARGB32 (12 << 1) +#define DISPC_VID_ATTRIBUTES_VIDFORMAT_RGBA32 (13 << 1) +#define DISPC_VID_ATTRIBUTES_ENABLE (1 << 0) + +#define DISPC_VID_PICTURE_SIZE_VIDORGSIZEY (0x7FF << 16) +#define DISPC_VID_PICTURE_SIZE_VIDORGSIZEY_SHIFT 16 +#define DISPC_VID_PICTURE_SIZE_VIDORGSIZEX 0x7FF +#define DISPC_VID_PICTURE_SIZE_VIDORGSIZEX_SHIFT 0 + +#define DISPC_VID_ATTRIBUTES_VIDROT 12 +#define DISPC_VID_ATTRIBUTES_VIDROWREPEAT 18 + +/*RFBI Sysconfig values */ +#define RFBI_SYSCONFIG_SIDLEMODE_SIDLE (2 << 3) + +/* VENC register offsets */ +#define VENC_F_CONTROL 0x0008 +#define VENC_VIDOUT_CTRL 0x0010 +#define VENC_SYNC_CONTROL 0x0014 +#define VENC_LLEN 0x001C +#define VENC_FLENS 0x0020 +#define VENC_HFLTR_CTRL 0x0024 +#define VENC_CC_CARR_WSS_CARR 0x0028 +#define VENC_C_PHASE 0x002C +#define VENC_GAIN_U 0x0030 +#define VENC_GAIN_V 0x0034 +#define VENC_GAIN_Y 0x0038 +#define VENC_BLACK_LEVEL 0x003C +#define VENC_BLANK_LEVEL 0x0040 +#define VENC_X_COLOR 0x0044 +#define VENC_M_CONTROL 0x0048 +#define VENC_BSTAMP_WSS_DATA 0x004C +#define VENC_S_CARR 0x0050 +#define VENC_LINE21 0x0054 +#define VENC_LN_SEL 0x0058 +#define VENC_L21_WC_CTL 0x005C +#define VENC_HTRIGGER_VTRIGGER 0x0060 +#define VENC_SAVID_EAVID 0x0064 +#define VENC_FLEN_FAL 0x0068 +#define VENC_LAL_PHASE_RESET 0x006C +#define VENC_HS_INT_START_STOP_X 0x0070 +#define VENC_HS_EXT_START_STOP_X 0x0074 +#define VENC_VS_INT_START_X 0x0078 +#define VENC_VS_INT_STOP_X_VS_INT_START_Y 0x007C +#define VENC_VS_INT_STOP_Y_VS_EXT_START_X 0x0080 +#define VENC_VS_EXT_STOP_X_VS_EXT_START_Y 0x0084 +#define VENC_VS_EXT_STOP_Y 0x0088 +#define VENC_AVID_START_STOP_X 0x0090 +#define VENC_AVID_START_STOP_Y 0x0094 +#define VENC_FID_INT_START_X_FID_INT_START_Y 0x00A0 +#define VENC_FID_INT_OFFSET_Y_FID_EXT_START_X 0x00A4 +#define VENC_FID_EXT_START_Y_FID_EXT_OFFSET_Y 0x00A8 +#define VENC_TVDETGP_INT_START_STOP_X 0x00B0 +#define VENC_TVDETGP_INT_START_STOP_Y 0x00B4 +#define VENC_GEN_CTRL 0x00B8 +#define VENC_DAC_TST 0x00C4 +#define VENC_DAC 0x00C8 + +/* VENC bit fields */ +#define VENC_FCONTROL_RESET (1<<8) + +/* Rotation using VRFB */ +#define SMS_ROT_VIRT_BASE(context, degree) (0x70000000 \ + | 0x4000000 * (context) \ + | 0x1000000 * (degree/90)) +#define SMS_IMAGEHEIGHT_OFFSET 16 +#define SMS_IMAGEWIDTH_OFFSET 0 +#define SMS_PH_OFFSET 8 +#define SMS_PW_OFFSET 4 +#define SMS_PS_OFFSET 0 + +#ifdef CONFIG_ARCH_OMAP3 +#define L4_PHYS L4_34XX_BASE /* 0x48000000 */ +#define L4_VIRT (L4_PHYS + IO_OFFSET) /* 0xD8000000 */ +#define L4_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */ + +#define L4_WK_PHYS L4_WK_34XX_BASE /* 0x48300000 */ +#define L4_WK_VIRT (L4_WK_PHYS + IO_OFFSET) /* 0xD8300000 */ +#define L4_WK_SIZE SZ_1M + +#define L4_PER_PHYS L4_PER_34XX_BASE /* 0x49000000 */ +#define L4_PER_VIRT (L4_PER_PHYS + IO_OFFSET) /* 0xD9000000 */ +#define L4_PER_SIZE SZ_1M + +#define L4_EMU_PHYS L4_EMU_34XX_BASE /* 0x54000000 */ +#define L4_EMU_VIRT (L4_EMU_PHYS + IO_OFFSET) /* 0xE4000000 */ +#define L4_EMU_SIZE SZ_1M + +#define GFX_PHYS GFX_34XX_BASE /* 0x50000000 */ +#define GFX_VIRT (GFX_PHYS + IO_OFFSET) /* 0xE0000000 */ +#define GFX_SIZE SZ_64K + +#define L3_PHYS L3_34XX_BASE /* 0x68000000 */ +#define L3_VIRT (L3_PHYS + IO_OFFSET) /* 0xF8000000 */ +#define L3_SIZE SZ_1M /* 81kB of 128MB used, want 1MB sect */ + +#define SMS_PHYS OMAP343X_SMS_BASE /* 0x6C000000 */ +#define SMS_VIRT (SMS_PHYS + IO_OFFSET) /* 0xFC000000 */ +#define SMS_SIZE SZ_1M + +#define SDRC_PHYS OMAP343X_SDRC_BASE /* 0x6D000000 */ +#define SDRC_VIRT (SDRC_PHYS + IO_OFFSET) /* 0xFD000000 */ +#define SDRC_SIZE SZ_1M + +#define GPMC_PHYS OMAP34XX_GPMC_BASE /* 0x6E000000 */ +#define GPMC_VIRT (GPMC_PHYS + IO_OFFSET) /* 0xFE000000 */ +#define GPMC_SIZE SZ_1M + +#endif + +#ifdef CONFIG_ARCH_OMAP2420 +#define OMAP_SMS_BASE (L3_24XX_BASE + 0x8000) +#endif +#ifdef CONFIG_ARCH_OMAP2430 +#define OMAP_SMS_BASE OMAP243X_SMS_PHYS +#endif +#ifdef CONFIG_ARCH_OMAP3430 +#define OMAP_SMS_BASE SMS_PHYS +#endif + +#define SMS_ROT0_PHYSICAL_BA(context) __REG32(OMAP_SMS_BASE + 0x188 \ + + 0x10 * context) +#define SMS_ROT_CONTROL(context) __REG32(OMAP_SMS_BASE + 0x180 \ + + 0x10 * context) +#define SMS_ROT0_SIZE(context) __REG32(OMAP_SMS_BASE + 0x184 \ + + 0x10 * context) +#ifdef CONFIG_ARCH_OMAP3430 +#define DSI_PROTO_ENG_REG_BASE 0x4804FC00 +#define DSI_PLL_CONTROLLER_REG_BASE 0x4804FF00 + +/* DSI PHY registers */ +#define DSI_CLK_CTRL 0x54 + +/* DSI PLL registers */ +#define DSI_PLL_CONTROL 0x00 +#define DSI_PLL_STATUS 0x04 +#define DSI_PLL_GO 0x08 +#define DSI_PLL_CONFIGURATION1 0x0C +#define DSI_PLL_CONFIGURATION2 0x10 + +#endif + +/* Structure to store and restore the DSS registers */ +struct omap_dispc_regs { + u32 revision; /* 0x000 */ + u32 res1[3]; + u32 sysconfig; /* 0x010 */ + u32 sysstatus; /* 0x014 */ + u32 irqstatus; /* 0x018 */ + u32 irqenable; /* 0x01C */ + u32 res2[8]; + u32 control; /* 0x040 */ + u32 config; /* 0x044 */ + u32 capable; /* 0x048 */ + u32 default_color0; /* 0x04C */ + u32 default_color1; /* 0x050 */ + u32 trans_color0; /* 0x054 */ + u32 trans_color1; /* 0x058 */ + u32 line_status; /* 0x05C */ + u32 line_number; /* 0x060 */ + u32 timing_h; /* 0x064 */ + u32 timing_v; /* 0x068 */ + u32 pol_freq; /* 0x06C */ + u32 divisor; /* 0x070 */ + u32 global_alpha; /* 0x074 */ + u32 size_dig; /* 0x078 */ + u32 size_lcd; /* 0x07C */ + u32 gfx_ba0; /* 0x080 */ + u32 gfx_ba1; /* 0x084 */ + u32 gfx_position; /* 0x088 */ + u32 gfx_size; /* 0x08C */ + u32 res4[4]; + u32 gfx_attributes; /* 0x0A0 */ + u32 gfx_fifo_threshold; /* 0x0A4 */ + u32 gfx_fifo_size; /* 0x0A8 */ + u32 gfx_row_inc; /* 0x0AC */ + u32 gfx_pixel_inc; /* 0x0B0 */ + u32 gfx_window_skip; /* 0x0B4 */ + u32 gfx_table_ba; /* 0x0B8 */ + u32 vid1_ba0; /* 0x0BC */ + u32 vid1_ba1; /* 0x0C0 */ + u32 vid1_position; /* 0x0C4 */ + u32 vid1_size; /* 0x0C8 */ + u32 vid1_attributes; /* 0x0CC */ + u32 vid1_fifo_threshold; /* 0x0D0 */ + u32 vid1_fifo_size; /* 0x0D4 */ + u32 vid1_row_inc; /* 0x0D8 */ + u32 vid1_pixel_inc; /* 0x0DC */ + u32 vid1_fir; /* 0x0E0 */ + u32 vid1_picture_size; /* 0x0E4 */ + u32 vid1_accu0; /* 0x0E8 */ + u32 vid1_accu1; /* 0x0EC */ + u32 vid1_fir_coef_h0; /* 0x0F0 */ + u32 vid1_fir_coef_hv0; /* 0x0F4 */ + u32 vid1_fir_coef_h1; /* 0x0F8 */ + u32 vid1_fir_coef_hv1; /* 0x0FC */ + u32 vid1_fir_coef_h2; /* 0x100 */ + u32 vid1_fir_coef_hv2; /* 0x104 */ + u32 vid1_fir_coef_h3; /* 0x108 */ + u32 vid1_fir_coef_hv3; /* 0x10C */ + u32 vid1_fir_coef_h4; /* 0x110 */ + u32 vid1_fir_coef_hv4; /* 0x114 */ + u32 vid1_fir_coef_h5; /* 0x118 */ + u32 vid1_fir_coef_hv5; /* 0x11C */ + u32 vid1_fir_coef_h6; /* 0x120 */ + u32 vid1_fir_coef_hv6; /* 0x124 */ + u32 vid1_fir_coef_h7; /* 0x128 */ + u32 vid1_fir_coef_hv7; /* 0x12C */ + u32 vid1_conv_coef0; /* 0x130 */ + u32 vid1_conv_coef1; /* 0x134 */ + u32 vid1_conv_coef2; /* 0x138 */ + u32 vid1_conv_coef3; /* 0x13C */ + u32 vid1_conv_coef4; /* 0x140 */ + u32 res5[2]; + u32 vid2_ba0; /* 0x14C */ + u32 vid2_ba1; /* 0x150 */ + u32 vid2_position; /* 0x154 */ + u32 vid2_size; /* 0x158 */ + u32 vid2_attributes; /* 0x15C */ + u32 vid2_fifo_threshold; /* 0x160 */ + u32 vid2_fifo_size; /* 0x164 */ + u32 vid2_row_inc; /* 0x168 */ + u32 vid2_pixel_inc; /* 0x16C */ + u32 vid2_fir; /* 0x170 */ + u32 vid2_picture_size; /* 0x174 */ + u32 vid2_accu0; /* 0x178 */ + u32 vid2_accu1; /* 0x17C */ + u32 vid2_fir_coef_h0; /* 0x180 */ + u32 vid2_fir_coef_hv0; /* 0x184 */ + u32 vid2_fir_coef_h1; /* 0x188 */ + u32 vid2_fir_coef_hv1; /* 0x18C */ + u32 vid2_fir_coef_h2; /* 0x190 */ + u32 vid2_fir_coef_hv2; /* 0x194 */ + u32 vid2_fir_coef_h3; /* 0x198 */ + u32 vid2_fir_coef_hv3; /* 0x19C */ + u32 vid2_fir_coef_h4; /* 0x1A0 */ + u32 vid2_fir_coef_hv4; /* 0x1A4 */ + u32 vid2_fir_coef_h5; /* 0x1A8 */ + u32 vid2_fir_coef_hv5; /* 0x1AC */ + u32 vid2_fir_coef_h6; /* 0x1B0 */ + u32 vid2_fir_coef_hv6; /* 0x1B4 */ + u32 vid2_fir_coef_h7; /* 0x1B8 */ + u32 vid2_fir_coef_hv7; /* 0x1BC */ + u32 vid2_conv_coef0; /* 0x1C0 */ + u32 vid2_conv_coef1; /* 0x1C4 */ + u32 vid2_conv_coef2; /* 0x1C8 */ + u32 vid2_conv_coef3; /* 0x1CC */ + u32 vid2_conv_coef4; /* 0x1D0 */ + u32 data_cycle1; /* 0x1D4 */ + u32 data_cycle2; /* 0x1D8 */ + u32 data_cycle3; /* 0x1DC */ +#ifdef CONFIG_ARCH_OMAP3430 + /* omap3430 specific registers */ + u32 vid1_fir_coef_v0; /* 0x1E0 */ + u32 vid1_fir_coef_v1; /* 0x1E4 */ + u32 vid1_fir_coef_v2; /* 0x1E8 */ + u32 vid1_fir_coef_v3; /* 0x1EC */ + u32 vid1_fir_coef_v4; /* 0x1F0 */ + u32 vid1_fir_coef_v5; /* 0x1F4 */ + u32 vid1_fir_coef_v6; /* 0x1F8 */ + u32 vid1_fir_coef_v7; /* 0x1FC */ + u32 vid2_fir_coef_v0; /* 0x200 */ + u32 vid2_fir_coef_v1; /* 0x204 */ + u32 vid2_fir_coef_v2; /* 0x208 */ + u32 vid2_fir_coef_v3; /* 0x20C */ + u32 vid2_fir_coef_v4; /* 0x210 */ + u32 vid2_fir_coef_v5; /* 0x214 */ + u32 vid2_fir_coef_v6; /* 0x218 */ + u32 vid2_fir_coef_v7; /* 0x21C */ + u32 cpr_coef_r; /* 0x220 */ + u32 cpr_coef_g; /* 0x224 */ + u32 cpr_coef_b; /* 0x228 */ + u32 gfx_preload; /* 0x22C */ + u32 vid1_preload; /* 0x230 */ + u32 vid2_preload; /* 0x234 */ +#endif /* CONFIG_ARCH_OMAP3430 */ +}; + +/* WARN: read-only registers omitted! */ +struct omap_dss_regs { + u32 sysconfig; + u32 control; +#ifdef CONFIG_ARCH_OMAP3430 + u32 sdi_control; + u32 pll_control; +#endif + struct omap_dispc_regs dispc; +}; + +struct tvlcd_status_t { + int ltype; + int output_dev; + int status; +}; + +/* color space conversion matrices */ +const static short int cc_bt601[3][3] = { {298, 409, 0}, +{298, -208, -100}, +{298, 0, 517} +}; +const static short int cc_bt709[3][3] = { {298, 459, 0}, +{298, -137, -55}, +{298, 0, 541} +}; +const static short int cc_bt601_full[3][3] = { {256, 351, 0}, +{256, -179, -86}, +{256, 0, 443} +}; + +/*----------- following are exposed values and APIs -------------------------*/ + +#define OMAP_GRAPHICS 0 +#define OMAP_VIDEO1 1 +#define OMAP_VIDEO2 2 +#define OMAP_DSS_GENERIC 3 +#define OMAP_DSS_DISPC_GENERIC 4 +#define DSS_CTX_NUMBER (OMAP_DSS_DISPC_GENERIC + 1) + +#define OMAP_OUTPUT_LCD 4 +#define OMAP_OUTPUT_TV 5 + +#define OMAP_DMA_0 0 +#define OMAP_DMA_1 1 + +/* Dithering enable/disable */ +#define DITHERING_ON 28 +#define DITHERING_OFF 29 + +/* TVOUT Definitions */ +enum omap_tvstandard { + PAL_BDGHI = 0, + PAL_NC, + PAL_N, + PAL_M, + PAL_60, + NTSC_M, + NTSC_J, + NTSC_443, +}; + +/* TV ref ON/OFF */ +#define TVREF_ON 30 +#define TVREF_OFF 31 + +/* LCD data lines configuration */ +#define LCD_DATA_LINE_12BIT 32 +#define LCD_DATA_LINE_16BIT 33 +#define LCD_DATA_LINE_18BIT 34 +#define LCD_DATA_LINE_24BIT 35 + +/* transparent color key types */ +#define OMAP_GFX_DESTINATION 100 +#define OMAP_VIDEO_SOURCE 101 + +/* SDRAM page size parameters used for VRFB settings */ +#define PAGE_WIDTH_EXP 5 /* page width = 1 << PAGE_WIDTH_EXP */ +#define PAGE_HEIGHT_EXP 5 /* page height = 1 << PAGE_HEIGHT_EXP */ + +/* 2048 x 2048 is max res supported by OMAP display controller */ +#define MAX_PIXELS_PER_LINE 2048 +#define MAX_LINES 2048 + +#define TV_OFF 0 +#define TV_ON 1 +#define LCD_OFF 0 +#define LCD_ON 1 + +/* States needed for TV-LCD on the fly */ +#define TVLCD_STOP 1 +#define TVLCD_CONTINUE 2 + +/* VRFB offset computation parameters */ +#define SIDE_H 1 +#define SIDE_W 0 + +/* Color Conversion macros */ +#define FULL_COLOR_RANGE 1 +#define CC_BT601 0 +#define CC_BT709 2 +#define CC_BT601_FULL 3 + +/* GFX FIFO thresholds */ +#define RMODE_GFX_FIFO_HIGH_THRES 0x3FC +#define RMODE_GFX_FIFO_LOW_THRES 0x3BC + +/* Data structures to communicate between HAL and driver files. */ +struct omap_video_params { + int video_layer; + unsigned long vid_position; + unsigned long vid_size; + unsigned long vid_picture_size; +}; +struct omap_scaling_params { + int video_layer; + int win_height; + int win_width; + int crop_height; + int crop_width; + int flicker_filter; +}; +struct omap_dma_params { + int video_layer; + int dma_num; + int row_inc_value; + int pixel_inc_value; +}; + +/* Color conversion matrix */ +extern short int current_colorconv_values[2][3][3]; + +/* Encoders and Outputs specific Definitions*/ +#define MAX_CHANNEL 2 /* No of Overlays */ +#define MAX_CHAR 20 +#define MAX_ENCODER_DEVICE 3 +#define MAX_MODE 10 +#define MAX_OUTPUT 3 + +struct omap_encoder_device; + +struct omap_enc_output_ops { + int count; + char *(*enumoutput) (int index, void *data); + int (*setoutput) (int index, char *mode_name, void *data); + int (*getoutput) (void *data); +}; + +struct omap_enc_mode_ops { + int (*setmode) (char *mode_name, void *data); + char *(*getmode) (void *data); +}; + +struct omap_encoder_device { + u8 name[MAX_CHAR]; + int channel_id; + struct omap_enc_output_ops *output_ops; + struct omap_enc_mode_ops *mode_ops; + int current_output; + int no_outputs; + int (*initialize) (void *data); + int (*deinitialize) (void *data); +}; + +struct channel_obj { + int channel_no; + int num_encoders; + struct omap_encoder_device *enc_devices[MAX_ENCODER_DEVICE]; + int current_encoder; + int current_mode; +}; + +struct omap_mode_info { + char name[MAX_CHAR]; + u32 width, height; + u32 clk_rate; + u32 clk_div; + u16 hfp, hbp, hsw; + u16 vfp, vbp, vsw; + void *priv_data; +}; +struct omap_output_info { + char name[MAX_CHAR]; + void *mode; + u8 no_modes; + u8 current_mode; + int data_lines; +}; + +/* input layer APIs */ +int omap_disp_request_layer(int ltype); +void omap_disp_release_layer(int ltype); +void omap_disp_disable_layer(int ltype); +void omap_disp_enable_layer(int ltype); +int omap_disp_reg_sync_bit(int output_dev); + +/* output device APIs */ +void omap_disp_get_panel_size(int output_dev, int *witdth, int *height); +void omap_disp_set_panel_size(int output_dev, int witdth, int height); +void omap_disp_disable_output_dev(int output_dev); +void omap_disp_enable_output_dev(int output_dev); +void omap_disp_set_dssfclk(void); +#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430) +void omap_disp_set_tvref(int tvref_state); +#endif +int omap_disp_get_vrfb_offset(u32, u32, int); + +/* connection of input layers to output devices */ +int omap_disp_get_output_dev(int ltype); +void omap_disp_set_dma_params(int ltype, int output_dev, + u32 ba0, u32 ba1, u32 row_inc, u32 pix_inc); + +/* DSS power management */ +void omap_disp_get_dss(void); +void omap_disp_put_dss(void); + +/* Color conversion */ +void omap_disp_set_default_colorconv(int ltype, int color_space); +void omap_disp_set_colorconv(int v, int full_range_conversion); +/* background color */ +void omap_disp_set_bg_color(int output_dev, int color); +void omap_disp_get_bg_color(int output_dev, int *color); + +/* transparent color key */ +void omap_disp_set_colorkey(int output_dev, int key_type, int key_val); +void omap_disp_get_colorkey(int output_dev, int *key_type, int *key_val); +void omap_disp_enable_colorkey(int output_dev); +void omap_disp_disable_colorkey(int output_dev); + +/* alpha blending */ +int omap_disp_get_alphablend(int output_dev); +void omap_disp_set_alphablend(int output_dev, int value); +unsigned char omap_disp_get_global_alphablend_value(int ltype); +void omap_disp_set_global_alphablend_value(int ltype, int value); + +/* rotation APIs */ +int omap_disp_set_vrfb(int context, u32 phy_addr, + u32 width, u32 height, u32 bytes_per_pixel); + +/* display controller register synchronization */ +void omap_disp_reg_sync(int output_dev); +int omap_disp_reg_sync_done(int output_dev); + +/* disable LCD and TV outputs and sync with next frame */ +void omap_disp_disable(unsigned long timeout_ticks); + +/* interrupt handling */ +typedef void (*omap_disp_isr_t) (void *arg, struct pt_regs *regs, + u32 irqstatus); +int omap_disp_register_isr(omap_disp_isr_t isr, void *arg, + unsigned int mask); +int omap_disp_unregister_isr(omap_disp_isr_t isr); +int omap_disp_irqenable(omap_disp_isr_t isr, unsigned int mask); +int omap_disp_irqdisable(omap_disp_isr_t isr, unsigned int mask); +void omap_disp_save_initstate(int layer); + +/* clk functions */ +void omap_disp_put_all_clks(void); +void omap_disp_get_all_clks(void); +void omap_disp_start_video_layer(int); +void omap_disp_set_addr(int ltype, u32 lcd_phys_addr, u32 tv_phys_addr_f0, + u32 tv_phys_addr_f1); + +/* Video parameters functions */ +void omap_disp_set_vidattributes(unsigned int video_layer, + unsigned int vid_attributes); +void omap_disp_set_fifothreshold(unsigned int video_layer); +void omap_disp_set_scaling(struct omap_scaling_params *scale_params); +void omap_disp_set_vid_params(struct omap_video_params *vid_params); +void set_dma_layer_parameters(int dma_num, int video_layer, + int row_inc_value, int pixel_inc_value); +void omap_disp_set_row_pix_inc_values(int video_layer, int row_inc_value, + int pixel_inc_value); +void set_crop_layer_parameters(int video_layer, int cropwidth, + int cropheight); +void omap_set_crop_layer_parameters(int video_layer, int cropwidth, + int cropheight); + +/* Output and Standard releated functions */ +int omap_disp_set_mode(int ch_no, char *buffer); +char *omap_disp_get_mode(int ch_no); +int omap_disp_set_output(int ch_no, int index); +int omap_disp_get_output(int ch_no, int *index); +int omap_disp_enum_output(int ch_no, int index, char *name); + +/* Register/Unregister encoders */ +int omap_register_encoder(struct omap_encoder_device + *encoder); +int omap_unregister_encoder(struct omap_encoder_device + *encoder); + +/*------------------ end of exposed values and APIs -------------------------*/ + +#endif /* __ASM_ARCH_OMAP_DISP_H */ diff --git a/arch/arm/plat-omap/include/mach/omap-venc.h b/arch/arm/plat-omap/include/mach/omap-venc.h new file mode 100644 index 0000000..5586c22 --- /dev/null +++ b/arch/arm/plat-omap/include/mach/omap-venc.h @@ -0,0 +1,627 @@ +/* + * arch/arm/plat-omap/include/mach/omap-venc.h + * + * Copyright (C) 2004-2005 Texas Instruments, Inc. + * TV Standard configuration for Video Encoder in OMAP24XX + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + * + */ + +/* TV Encoder initialization for PAL and NTSC */ + +/* Typical encoder values for different TV tests */ +#define VENC_HFLTR_CTRL_EN 0x00000000 +#define VENC_X_COLOR_VAL 0x00000000 + +#define VENC_LINE21_VAL 0x00000000 +#define VENC_LN_SEL_VAL 0x00000015 +#define VENC_HTRIGGER_VTRIGGER_VAL 0x00000000 +#define VENC_LN_SEL_VAL_PAL_BDGHI 0x01290015 + +#define VENC_TVDETGP_INT_START_STOP_X_VAL 0x00140001 +#define VENC_TVDETGP_INT_START_STOP_Y_VAL 0x00010001 +#define VENC_GEN_CTRL_VAL 0x00FF0000 +#define VENC_GEN_CTRL_PAL_VAL 0x00F90000 + +/* DAC enable and in normal operation */ +#ifdef CONFIG_ARCH_OMAP2420 +#define VENC_DAC_ENABLE 0x00000002 +#endif + +#ifdef CONFIG_ARCH_OMAP2430 +#define VENC_DAC_ENABLE 0x0000000A +#endif + +#ifdef CONFIG_ARCH_OMAP3430 +#define VENC_DAC_ENABLE 0x0000000D +#endif + +/*Values that are same for NTSC, PAL-M AND PAL-60 */ +#define F_CONTROL_GEN 0x00000000 +#define SYNC_CONTROL_GEN 0x00001040 +#define VENC_LLEN_GEN 0x00000359 +#define VENC_FLENS_GEN 0x0000020C +#define VENC_C_PHASE_GEN 0x00000000 +#define VENC_CC_CARR_WSS_CARR_GEN 0x000025ed +#define VENC_L21_WC_CTL_GEN 0x00170000 +#define VENC_SAVID_EAVID_GEN 0x069300F4 +#define VENC_FLEN_FAL_GEN 0x0016020C +#define VENC_HS_EXT_START_STOP_X_GEN 0x000F0359 +#define VENC_VS_INT_START_X_GEN 0x01A00000 +#define VENC_VS_EXT_STOP_X_VS_EXT_START_Y_GEN 0x020D01AC +#define VENC_VS_EXT_STOP_Y_GEN 0x00000006 +#define VENC_FID_INT_START_X_FID_INT_START_Y_GEN 0x0001008A +#define VENC_FID_INT_OFFSET_Y_FID_EXT_START_X_GEN 0x01AC0106 +#define VENC_FID_EXT_START_Y_FID_EXT_OFFSET_Y_GEN 0x01060006 + +/* Values that are same for PAL-BDGHI, PAL-N, PAL-NC */ + +#define VENC_LLEN_PAL 0x0000035F +#define VENC_FLENS_PAL 0x00000270 + +#define VENC_LLEN_PAL_M 0x00000359 +#define VENC_FLENS_PAL_M 0x0000020C + +#define VENC_C_PHASE_PAL 0x000000F0 /* N */ +#define VENC_C_PHASE_PAL_BDGHI 0x00000000 +#define VENC_C_PHASE_PAL_NC 0x00000000 + +#define VENC_CC_CARR_WSS_CARR_PAL 0x000025ED + +#define VENC_L21_WC_CTL_PAL 0x00000000 +#define VENC_L21_WC_CTL_PAL_BDGHI 0x0000F603 + +#define VENC_SAVID_EAVID_PAL 0x06A70108 +#define VENC_FLEN_FAL_PAL 0x00170270 +#define VENC_FLEN_FAL_PAL_BDGHI 0x00180270 +#define VENC_HS_EXT_START_STOP_X_PAL 0x000F035F +#define VENC_VS_INT_START_X_PAL 0x01A70000 +#define VENC_VS_EXT_STOP_Y_PAL 0x00000005 +#define VENC_VS_EXT_STOP_Y_PAL_BDGHI 0x00000025 +#define VENC_VS_EXT_STOP_X_VS_EXT_START_Y_PAL 0x027101AF +#define VENC_VS_EXT_STOP_X_VS_EXT_START_Y_PAL_BDGHI 0x000101AF + +#define VENC_GAIN_U_PAL_BDGHI 0x00000130 +#define VENC_CC_CARR_WSS_CARR_PAL_BDGHI 0x2F7225ED + +#define VENC_GAIN_U_PAL_N 0x000000FD +#define VENC_GAIN_U_PAL_NC 0x00000130 +#define VENC_GAIN_U_PAL_M 0x00000140 +#define VENC_GAIN_U_PAL_60 0x00000140 + +#define VENC_GAIN_V_PAL_BDGHI 0x000001B0 + +#define VENC_GAIN_V_PAL_N 0x00000165 +#define VENC_GAIN_V_PAL_NC 0x000001B0 +#define VENC_GAIN_V_PAL_M 0x00000190 +#define VENC_GAIN_V_PAL_60 0x00000190 + +#define VENC_GAIN_Y_PAL_BDGHI 0x000001B0 +#define VENC_GAIN_Y_PAL_N 0x00000177 +#define VENC_GAIN_Y_PAL_NC 0x000001B0 +#define VENC_GAIN_Y_PAL_M 0x000001C0 +#define VENC_GAIN_Y_PAL_60 0x000001C0 + +#define VENC_BLACK_LEVEL_PAL_BDGHI 0x0000003B + +#define VENC_BLANK_LEVEL_PAL_BDGHI 0x0000003B +#define VENC_BLACK_LEVEL_PAL_NC 0x00000063 +#define VENC_BLANK_LEVEL_PAL_NC 0x00000063 + +#define VENC_BLACK_LEVEL_PAL_N 0x00000060 +#define VENC_BLANK_LEVEL_PAL_N 0x00000053 + +#define VENC_BLACK_LEVEL_PAL_M 0x00000069 +#define VENC_BLANK_LEVEL_PAL_M 0x0000005C + +#define VENC_BLACK_LEVEL_PAL_60 0x00000069 +#define VENC_BLANK_LEVEL_PAL_60 0x0000005C + +#define VENC_M_CONTROL_PAL 0x00000002 +#define VENC_M_CONTROL_PAL_M 0x00000003 +#define VENC_M_CONTROL_PAL_60 0x00000003 + +#define VENC_BSTAMP_WSS_DATA_PAL_BDGHI 0x00000043 + +#define VENC_BSTAMP_WSS_DATA_PAL_N 0x00000038 +#define VENC_BSTAMP_WSS_DATA_PAL_M 0x0000003F +#define VENC_BSTAMP_WSS_DATA_PAL_NC 0x00000041 +#define VENC_BSTAMP_WSS_DATA_PAL_60 0x0000003F + +#define VENC_S_CARR_PAL_M 0x21E6EFE3 +#define VENC_S_CARR_PAL_NC 0x21E6EFE3 +#define VENC_S_CARR_PAL_BDGHI 0x2A098ACB +#define VENC_S_CARR_PAL_60 0x2A098ACB + +#define VENC_LAL_PHASE_RESET_PAL 0x00040136 /* BDGHI & N */ +#define VENC_LAL_PHASE_RESET_PAL_NC 0x00040135 +#define VENC_LAL_PHASE_RESET_PAL_2 0x00040107 /* PAL-M & PAL-60 */ + +#define VENC_HS_INT_START_STOP_X_PAL 0x00920358 /* BDGHI & N */ +#define VENC_HS_INT_START_STOP_X_NC 0x00880358 +#define VENC_HS_INT_START_STOP_X_PAL_2 0x007e034e /* PAL-M & PAL-60 */ + +#define VENC_VS_INT_STOP_X_VS_INT_START_Y_PAL 0x000601A7 +#define VENC_VS_INT_STOP_X_VS_INT_START_Y_PAL_2 0x020901a0 /* PAL-M & PAL-60*/ +#define VENC_VS_INT_STOP_X_VS_INT_START_Y_PAL_NC 0x026F01A7 +#define VENC_VS_INT_STOP_X_VS_INT_START_Y_PAL_BDGHI 0x000001A7 + +#define VENC_VS_INT_STOP_Y_VS_EXT_START_X_PAL 0x01AF0036 +#define VENC_VS_INT_STOP_Y_VS_EXT_START_X_PAL_2 0x01ac0022 /* PAL-M & PAL-60 */ +#define VENC_VS_INT_STOP_Y_VS_EXT_START_X_PAL_NC 0x01AF002E +#define VENC_VS_INT_STOP_Y_VS_EXT_START_X_PAL_BDGHI 0x01AF0000 + +#define VENC_AVID_START_STOP_X_PAL 0x03530082 /* BDGHI & N */ +#define VENC_AVID_START_STOP_X_PAL_NC 0x03530083 +#define VENC_AVID_START_STOP_X_PAL_2 0x03530082 /* PAL-M & PAL-60 */ + +#define VENC_AVID_START_STOP_Y_PAL 0x0270002E +#define VENC_AVID_START_STOP_Y_PAL_2 0x0270002E /* PAL-M & PAL-60 */ +#define VENC_AVID_START_STOP_Y_PAL_NC 0x026E002E +#define VENC_AVID_START_STOP_Y_PAL_BDGHI 0x026C002E +#define VENC_FID_INT_START_X_FID_INT_START_Y_PAL 0x0005008A + +#define VENC_FID_INT_OFFSET_Y_FID_EXT_START_X_PAL 0x002E0138 +#define VENC_FID_EXT_START_Y_FID_EXT_OFFSET_Y_PAL_BDGHI 0x01380001 + +#define VENC_FID_EXT_START_Y_FID_EXT_OFFSET_Y_PAL 0x01380005 + +/* NTSC */ + +#define VENC_CC_CARR_WSS_CARR_GEN_NTSC_M 0x043F2631 +#define VENC_X_COLOR_VAL_NTSC_M 0x00000007 +#define VENC_LN_SEL_VAL_NTSC_M 0x01310011 +#define VENC_L21_WC_CTL_GEN_NTSC_M 0x0000F003 +#define VENC_HS_INT_START_STOP_X_NTSC_M 0x008E0350 +#define VENC_AVID_START_STOP_Y_NTSC_M 0x02060024 +#define VENC_VS_INT_STOP_X_VS_INT_START_Y_NTSC_M 0x020701A0 +#define VENC_VS_INT_STOP_Y_VS_EXT_START_X_NTSC_M 0x01AC0024 +#define VENC_AVID_START_STOP_X_NTSC_M 0x03480078 +#define VENC_GAIN_U_NTSC_M 0x00000102 +#define VENC_GAIN_U_NTSC_J 0x00000100 +#define VENC_GAIN_U_NTSC_443 0x00000140 + +#define VENC_GAIN_V_NTSC_M 0x0000016C +#define VENC_GAIN_V_NTSC_J 0x0000016D +#define VENC_GAIN_V_NTSC_443 0x00000190 + +#define VENC_GAIN_Y_NTSC_M 0x0000012F +#define VENC_GAIN_Y_NTSC_J 0x00000196 +#define VENC_GAIN_Y_NTSC_443 0x000001C0 + +#define VENC_BLACK_LEVEL_NTSC_443 0x00000069 +#define VENC_BLANK_LEVEL_NTSC_443 0x0000005C + +#define VENC_BLACK_LEVEL_NTSC_M 0x00000043 +#define VENC_BLANK_LEVEL_NTSC_M 0x00000038 + +#define VENC_BLACK_LEVEL_NTSC_J 0x00000053 +#define VENC_BLANK_LEVEL_NTSC_J 0x00000053 + +#define VENC_M_CONTROL_NTSC 0x00000001 + +#define VENC_BSTAMP_WSS_DATA_NTSC 0x00000038 +#define VENC_BSTAMP_WSS_DATA_NTSC_443 0x0000003F + +#define VENC_S_CARR_NTSC_443 0x2A098ACB +#define VENC_S_CARR_NTSC 0x21F07C1F + +#define VENC_HTRIGGER_VTRIGGER_VAL 0x00000000 + +#define VENC_FLEN_FAL_NTSC 0x0001020C + +#define VENC_LAL_PHASE_RESET_NTSC 0x00060107 + +#define VENC_HS_INT_START_STOP_X_NTSC 0x007E034E + +#define VENC_HS_INT_START_STOP_X_443 0x007e034e + +#define VENC_VS_INT_STOP_X_VS_INT_START_Y_NTSC 0x020901A0 +#define VENC_VS_INT_STOP_X_VS_INT_START_Y_NTSC_443 0x020901a0 + +#define VENC_VS_INT_STOP_Y_VS_EXT_START_X_NTSC 0x01AC0022 +#define VENC_VS_INT_STOP_Y_VS_EXT_START_X_NTSC_443 0x01ac0022 + +#define VENC_AVID_START_STOP_X_NTSC 0x032000A0 +#define VENC_AVID_START_STOP_X_NTSC_443 0x03480079 + +#define VENC_AVID_START_STOP_Y_NTSC 0x02060026 +#define VENC_AVID_START_STOP_Y_NTSC_443 0x02040024 + +#define VENC_TVDETGP_INT_START_STOP_X_GEN 0x00140001 +#define VENC_TVDETGP_INT_START_STOP_Y_GEN 0x00010001 + +struct tv_standard_config{ + u8 std_name[25]; + u32 venc_llen; + u32 venc_flens; + u32 venc_hfltr_ctrl; + u32 venc_cc_carr_wss_carr; + u32 venc_c_phase; + u32 venc_gain_u; + u32 venc_gain_v; + u32 venc_gain_y; + u32 venc_black_level; + u32 venc_blank_level; + u32 venc_x_color; + u32 venc_m_control; + u32 venc_bstamp_wss_data; + u32 venc_s_carr; + u32 venc_line21; + u32 venc_ln_sel; + u32 venc_l21_wc_ctl; + u32 venc_htrigger_vtrigger; + u32 venc_savid_eavid; + u32 venc_flen_fal; + u32 venc_lal_phase_reset; + u32 venc_hs_int_start_stop_x; + u32 venc_hs_ext_start_stop_x; + u32 venc_vs_int_start_x; + u32 venc_vs_int_stop_x_vs_int_start_y; + u32 venc_vs_int_stop_y_vs_ext_start_x; + u32 venc_vs_ext_stop_x_vs_ext_start_y; + u32 venc_vs_ext_stop_y; + u32 venc_avid_start_stop_x; + u32 venc_avid_start_stop_y; + u32 venc_fid_int_start_x_fid_int_start_y; + u32 venc_fid_int_offset_y_fid_ext_start_x; + u32 venc_fid_ext_start_y_fid_ext_offset_y; + u32 venc_tvdetgp_int_start_stop_x; + u32 venc_tvdetgp_int_start_stop_y; + u32 venc_gen_ctrl; + u32 venc_dac_tst; +}; + +#ifndef CONFIG_ARCH_OMAP3410 +struct tv_standard_config tv_standards[] = { + { + "pal_bdghi", + VENC_LLEN_PAL, + VENC_FLENS_PAL, + VENC_HFLTR_CTRL_EN, + VENC_CC_CARR_WSS_CARR_PAL_BDGHI, + VENC_C_PHASE_PAL_BDGHI, + VENC_GAIN_U_PAL_BDGHI, + VENC_GAIN_V_PAL_BDGHI, + VENC_GAIN_Y_PAL_BDGHI, + VENC_BLACK_LEVEL_PAL_BDGHI, + VENC_BLANK_LEVEL_PAL_BDGHI, + VENC_X_COLOR_VAL_NTSC_M, + VENC_M_CONTROL_PAL, + VENC_BSTAMP_WSS_DATA_PAL_M, + VENC_S_CARR_PAL_BDGHI, + VENC_LINE21_VAL, + VENC_LN_SEL_VAL_PAL_BDGHI, + VENC_L21_WC_CTL_PAL, + VENC_HTRIGGER_VTRIGGER_VAL, + VENC_SAVID_EAVID_PAL, + VENC_FLEN_FAL_PAL_BDGHI, + VENC_LAL_PHASE_RESET_PAL_NC, + VENC_HS_INT_START_STOP_X_NC, + VENC_HS_EXT_START_STOP_X_PAL, + VENC_VS_INT_START_X_PAL, + VENC_VS_INT_STOP_X_VS_INT_START_Y_PAL_BDGHI, + VENC_VS_INT_STOP_Y_VS_EXT_START_X_PAL_BDGHI, + VENC_VS_EXT_STOP_X_VS_EXT_START_Y_PAL_BDGHI, + VENC_VS_EXT_STOP_Y_PAL, + VENC_AVID_START_STOP_X_PAL_NC, + VENC_AVID_START_STOP_Y_PAL_BDGHI, + VENC_FID_INT_START_X_FID_INT_START_Y_GEN, + VENC_FID_INT_OFFSET_Y_FID_EXT_START_X_PAL, + VENC_FID_EXT_START_Y_FID_EXT_OFFSET_Y_PAL_BDGHI, + VENC_TVDETGP_INT_START_STOP_X_GEN, + VENC_TVDETGP_INT_START_STOP_Y_GEN, + VENC_GEN_CTRL_PAL_VAL, + VENC_DAC_ENABLE + }, + + { + "pal_n", + VENC_LLEN_PAL, + VENC_FLENS_PAL, + VENC_HFLTR_CTRL_EN, + VENC_CC_CARR_WSS_CARR_PAL, + VENC_C_PHASE_PAL, + VENC_GAIN_U_PAL_N, + VENC_GAIN_V_PAL_N, + VENC_GAIN_Y_PAL_N, + VENC_BLACK_LEVEL_PAL_N, + VENC_BLANK_LEVEL_PAL_N, + VENC_X_COLOR_VAL, + VENC_M_CONTROL_PAL, + VENC_BSTAMP_WSS_DATA_PAL_BDGHI, + VENC_S_CARR_PAL_BDGHI, + VENC_LINE21_VAL, + VENC_LN_SEL_VAL, + VENC_L21_WC_CTL_PAL, + VENC_HTRIGGER_VTRIGGER_VAL, + VENC_SAVID_EAVID_PAL, + VENC_FLEN_FAL_PAL, + VENC_LAL_PHASE_RESET_PAL, + VENC_HS_INT_START_STOP_X_PAL, + VENC_HS_EXT_START_STOP_X_PAL, + VENC_VS_INT_START_X_PAL, + VENC_VS_INT_STOP_X_VS_INT_START_Y_PAL, + VENC_VS_INT_STOP_Y_VS_EXT_START_X_PAL, + VENC_VS_EXT_STOP_X_VS_EXT_START_Y_PAL, + VENC_VS_EXT_STOP_Y_PAL, + VENC_AVID_START_STOP_X_PAL, + VENC_AVID_START_STOP_Y_PAL, + VENC_FID_INT_START_X_FID_INT_START_Y_PAL, + VENC_FID_INT_OFFSET_Y_FID_EXT_START_X_PAL, + VENC_FID_EXT_START_Y_FID_EXT_OFFSET_Y_PAL, + VENC_TVDETGP_INT_START_STOP_X_GEN, + VENC_TVDETGP_INT_START_STOP_Y_GEN, + VENC_GEN_CTRL_PAL_VAL, + VENC_DAC_ENABLE + }, + + { + "pal_nc", + VENC_LLEN_PAL, + VENC_FLENS_PAL, + VENC_HFLTR_CTRL_EN, + VENC_CC_CARR_WSS_CARR_PAL, + VENC_C_PHASE_PAL, + VENC_GAIN_U_PAL_NC, + VENC_GAIN_V_PAL_NC, + VENC_GAIN_Y_PAL_NC, + VENC_BLACK_LEVEL_PAL_NC, + VENC_BLANK_LEVEL_PAL_NC, + VENC_X_COLOR_VAL, + VENC_M_CONTROL_PAL, + VENC_BSTAMP_WSS_DATA_PAL_NC, + VENC_S_CARR_PAL_NC, + VENC_LINE21_VAL, + VENC_LN_SEL_VAL, + VENC_L21_WC_CTL_PAL, + VENC_HTRIGGER_VTRIGGER_VAL, + VENC_SAVID_EAVID_PAL, + VENC_FLEN_FAL_PAL, + VENC_LAL_PHASE_RESET_PAL_NC, + VENC_HS_INT_START_STOP_X_NC, + VENC_HS_EXT_START_STOP_X_PAL, + VENC_VS_INT_START_X_PAL, + VENC_VS_INT_STOP_X_VS_INT_START_Y_PAL_NC, + VENC_VS_INT_STOP_Y_VS_EXT_START_X_PAL_NC, + VENC_VS_EXT_STOP_X_VS_EXT_START_Y_PAL, + VENC_VS_EXT_STOP_Y_PAL, + VENC_AVID_START_STOP_X_PAL_NC, + VENC_AVID_START_STOP_Y_PAL_NC, + VENC_FID_INT_START_X_FID_INT_START_Y_PAL, + VENC_FID_INT_OFFSET_Y_FID_EXT_START_X_PAL, + VENC_FID_EXT_START_Y_FID_EXT_OFFSET_Y_PAL, + VENC_TVDETGP_INT_START_STOP_X_GEN, + VENC_TVDETGP_INT_START_STOP_Y_GEN, + VENC_GEN_CTRL_PAL_VAL, + VENC_DAC_ENABLE + }, + + { + "pal_m", + VENC_LLEN_PAL_M, + VENC_FLENS_PAL_M, + VENC_HFLTR_CTRL_EN, + VENC_CC_CARR_WSS_CARR_GEN, + VENC_C_PHASE_GEN, + VENC_GAIN_U_PAL_M, + VENC_GAIN_V_PAL_M, + VENC_GAIN_Y_PAL_M, + VENC_BLACK_LEVEL_PAL_M, + VENC_BLANK_LEVEL_PAL_M, + VENC_X_COLOR_VAL, + VENC_M_CONTROL_PAL_M, + VENC_BSTAMP_WSS_DATA_PAL_M, + VENC_S_CARR_PAL_M, + VENC_LINE21_VAL, + VENC_LN_SEL_VAL, + VENC_L21_WC_CTL_GEN, + VENC_HTRIGGER_VTRIGGER_VAL, + VENC_SAVID_EAVID_GEN, + VENC_FLEN_FAL_GEN, + VENC_LAL_PHASE_RESET_PAL_2, + VENC_HS_INT_START_STOP_X_PAL_2, + VENC_HS_EXT_START_STOP_X_GEN, + VENC_VS_INT_START_X_GEN, + VENC_VS_INT_STOP_X_VS_INT_START_Y_PAL_2, + VENC_VS_INT_STOP_Y_VS_EXT_START_X_PAL_2, + VENC_VS_EXT_STOP_X_VS_EXT_START_Y_GEN, + VENC_VS_EXT_STOP_Y_GEN, + VENC_AVID_START_STOP_X_PAL_2, + VENC_AVID_START_STOP_Y_PAL_2, + VENC_FID_INT_START_X_FID_INT_START_Y_GEN, + VENC_FID_INT_OFFSET_Y_FID_EXT_START_X_GEN, + VENC_FID_EXT_START_Y_FID_EXT_OFFSET_Y_GEN, + VENC_TVDETGP_INT_START_STOP_X_GEN, + VENC_TVDETGP_INT_START_STOP_Y_GEN, + VENC_GEN_CTRL_VAL, + VENC_DAC_ENABLE + }, + + { + "pal_60", + VENC_LLEN_GEN, + VENC_FLENS_GEN, + VENC_HFLTR_CTRL_EN, + VENC_CC_CARR_WSS_CARR_GEN, + VENC_C_PHASE_GEN, + VENC_GAIN_U_PAL_60, + VENC_GAIN_V_PAL_60, + VENC_GAIN_Y_PAL_60, + VENC_BLACK_LEVEL_PAL_60, + VENC_BLANK_LEVEL_PAL_60, + VENC_X_COLOR_VAL, + VENC_M_CONTROL_PAL_60, + VENC_BSTAMP_WSS_DATA_PAL_60, + VENC_S_CARR_PAL_60, + VENC_LINE21_VAL, + VENC_LN_SEL_VAL, + VENC_L21_WC_CTL_GEN, + VENC_HTRIGGER_VTRIGGER_VAL, + VENC_SAVID_EAVID_GEN, + VENC_FLEN_FAL_GEN, + VENC_LAL_PHASE_RESET_PAL_2, + VENC_HS_INT_START_STOP_X_PAL_2, + VENC_HS_EXT_START_STOP_X_GEN, + VENC_VS_INT_START_X_GEN, + VENC_VS_INT_STOP_X_VS_INT_START_Y_PAL_2, + VENC_VS_INT_STOP_Y_VS_EXT_START_X_PAL_2, + VENC_VS_EXT_STOP_X_VS_EXT_START_Y_GEN, + VENC_VS_EXT_STOP_Y_GEN, + VENC_AVID_START_STOP_X_PAL_2, + VENC_AVID_START_STOP_Y_PAL_2, + VENC_FID_INT_START_X_FID_INT_START_Y_GEN, + VENC_FID_INT_OFFSET_Y_FID_EXT_START_X_GEN, + VENC_FID_EXT_START_Y_FID_EXT_OFFSET_Y_GEN, + VENC_TVDETGP_INT_START_STOP_X_GEN, + VENC_TVDETGP_INT_START_STOP_Y_GEN, + VENC_GEN_CTRL_VAL, + VENC_DAC_ENABLE + }, + + { + "ntsc_m", + VENC_LLEN_GEN, + VENC_FLENS_GEN, + VENC_HFLTR_CTRL_EN, + VENC_CC_CARR_WSS_CARR_GEN_NTSC_M, + VENC_C_PHASE_GEN, + VENC_GAIN_U_NTSC_M, + VENC_GAIN_V_NTSC_M, + VENC_GAIN_Y_NTSC_M, + VENC_BLACK_LEVEL_NTSC_M, + VENC_BLANK_LEVEL_NTSC_M, + VENC_X_COLOR_VAL_NTSC_M, + VENC_M_CONTROL_NTSC, + VENC_BSTAMP_WSS_DATA_NTSC, + VENC_S_CARR_NTSC, + VENC_LINE21_VAL, + VENC_LN_SEL_VAL_NTSC_M, + VENC_L21_WC_CTL_GEN_NTSC_M, + VENC_HTRIGGER_VTRIGGER_VAL, + VENC_SAVID_EAVID_GEN, + VENC_FLEN_FAL_GEN, + VENC_LAL_PHASE_RESET_NTSC, + VENC_HS_INT_START_STOP_X_NTSC_M, + VENC_HS_EXT_START_STOP_X_GEN, + VENC_VS_INT_START_X_GEN, + VENC_VS_INT_STOP_X_VS_INT_START_Y_NTSC_M, + VENC_VS_INT_STOP_Y_VS_EXT_START_X_NTSC_M, + VENC_VS_EXT_STOP_X_VS_EXT_START_Y_GEN, + VENC_VS_EXT_STOP_Y_GEN, + VENC_AVID_START_STOP_X_NTSC_M, + VENC_AVID_START_STOP_Y_NTSC_M, + VENC_FID_INT_START_X_FID_INT_START_Y_GEN, + VENC_FID_INT_OFFSET_Y_FID_EXT_START_X_GEN, + VENC_FID_EXT_START_Y_FID_EXT_OFFSET_Y_GEN, + VENC_TVDETGP_INT_START_STOP_X_GEN, + VENC_TVDETGP_INT_START_STOP_Y_GEN, + VENC_GEN_CTRL_PAL_VAL, + VENC_DAC_ENABLE + }, + + { + "ntsc_443", + VENC_LLEN_GEN, + VENC_FLENS_GEN, + VENC_HFLTR_CTRL_EN, + VENC_CC_CARR_WSS_CARR_GEN, + VENC_C_PHASE_GEN, + VENC_GAIN_U_NTSC_443, + VENC_GAIN_V_NTSC_443, + VENC_GAIN_Y_NTSC_443, + VENC_BLACK_LEVEL_NTSC_443, + VENC_BLANK_LEVEL_NTSC_443, + VENC_X_COLOR_VAL, + VENC_M_CONTROL_NTSC, + VENC_BSTAMP_WSS_DATA_NTSC_443, + VENC_S_CARR_NTSC_443, + VENC_LINE21_VAL, + VENC_LN_SEL_VAL, + VENC_L21_WC_CTL_GEN, + VENC_HTRIGGER_VTRIGGER_VAL, + VENC_SAVID_EAVID_GEN, + VENC_FLEN_FAL_GEN, + VENC_LAL_PHASE_RESET_NTSC, + VENC_HS_INT_START_STOP_X_443, + VENC_HS_EXT_START_STOP_X_GEN, + VENC_VS_INT_START_X_GEN, + VENC_VS_INT_STOP_X_VS_INT_START_Y_NTSC_443, + VENC_VS_INT_STOP_Y_VS_EXT_START_X_NTSC_443, + VENC_VS_EXT_STOP_X_VS_EXT_START_Y_GEN, + VENC_VS_EXT_STOP_Y_GEN, + VENC_AVID_START_STOP_X_NTSC_443, + VENC_AVID_START_STOP_Y_NTSC_443, + VENC_FID_INT_START_X_FID_INT_START_Y_GEN, + VENC_FID_INT_OFFSET_Y_FID_EXT_START_X_GEN, + VENC_FID_EXT_START_Y_FID_EXT_OFFSET_Y_GEN, + VENC_TVDETGP_INT_START_STOP_X_GEN, + VENC_TVDETGP_INT_START_STOP_Y_GEN, + VENC_GEN_CTRL_VAL, + VENC_DAC_ENABLE + }, + + { + "ntsc_j", + VENC_LLEN_GEN, + VENC_FLENS_GEN, + VENC_HFLTR_CTRL_EN, + VENC_CC_CARR_WSS_CARR_GEN, + VENC_C_PHASE_GEN, + VENC_GAIN_U_NTSC_J, + VENC_GAIN_V_NTSC_J, + VENC_GAIN_Y_NTSC_J, + VENC_BLACK_LEVEL_NTSC_J, + VENC_BLANK_LEVEL_NTSC_J, + VENC_X_COLOR_VAL, + VENC_M_CONTROL_NTSC, + VENC_BSTAMP_WSS_DATA_NTSC, + VENC_S_CARR_NTSC, + VENC_LINE21_VAL, + VENC_LN_SEL_VAL, + VENC_L21_WC_CTL_GEN, + VENC_HTRIGGER_VTRIGGER_VAL, + VENC_SAVID_EAVID_GEN, + VENC_FLEN_FAL_GEN, + VENC_LAL_PHASE_RESET_NTSC, + VENC_HS_INT_START_STOP_X_NTSC, + VENC_HS_EXT_START_STOP_X_GEN, + VENC_VS_INT_START_X_GEN, + VENC_VS_INT_STOP_X_VS_INT_START_Y_NTSC, + VENC_VS_INT_STOP_Y_VS_EXT_START_X_NTSC, + VENC_VS_EXT_STOP_X_VS_EXT_START_Y_GEN, + VENC_VS_EXT_STOP_Y_GEN, + VENC_AVID_START_STOP_X_NTSC, + VENC_AVID_START_STOP_Y_NTSC, + VENC_FID_INT_START_X_FID_INT_START_Y_GEN, + VENC_FID_INT_OFFSET_Y_FID_EXT_START_X_GEN, + VENC_FID_EXT_START_Y_FID_EXT_OFFSET_Y_GEN, + VENC_TVDETGP_INT_START_STOP_X_GEN, + VENC_TVDETGP_INT_START_STOP_Y_GEN, + VENC_GEN_CTRL_VAL, + VENC_DAC_ENABLE + } +}; + +/* + * Initialization/Deinitialization function declaration + */ +static int tv_initialize(void *data); +static int tv_deinitialize(void *data); + +/* + * Standard get/set function declaration + */ +static int omap_venc_setstd(char *mode_name, void *data); +static char *omap_venc_getstd(void *data); + +/* + * Output set/get/enum function declaration + */ +static int omap_venc_setoutput(int index, char *mode_name, void *data); +static char *omap_venc_enumoutput(int index, void *data); + +#endif diff --git a/arch/arm/plat-omap/omap-dss.c b/arch/arm/plat-omap/omap-dss.c new file mode 100755 index 0000000..06f0ff5 --- /dev/null +++ b/arch/arm/plat-omap/omap-dss.c @@ -0,0 +1,2606 @@ +/* + * arch/arm/plat-omap/omap-dss.c + * + * Copyright (C) 2005-2006 Texas Instruments, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + * + * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + * + * Leveraged code from the OMAP24xx camera driver + * Video-for-Linux (Version 2) camera capture driver for + * the OMAP24xx camera controller. + * + * Author: Andy Lowe (so...@mv...) + * Copyright (C) 2004 MontaVista Software, Inc. + * + * History: + * 20-APR-2006 Khasim Modified VRFB based Rotation equations, + * The image data is always read from 0 degree + * view and written to the virtual space of desired + * rotation angle + * MAY-2008 Brijesh J. Added and Modified the interface for supporting + * Hari N. dynamic registering and de-registering of the + * Hardik S. the encoders to the overlay manager of DSS. + * Vaibhav H. + */ + +#include <linux/module.h> +#include <linux/delay.h> +#include <linux/interrupt.h> +#include <linux/err.h> +#include <asm/system.h> +#include <linux/clk.h> +#include <linux/io.h> +#include <linux/irq.h> +#include <mach/hardware.h> +#include <mach/omap-dss.h> +#include <mach/clock.h> +#ifdef CONFIG_TRACK_RESOURCES +#include <linux/device.h> +#endif + +#undef DEBUG + +#ifdef DEBUG +#define DEBUGP printk +#else +#define DEBUGP(fmt, a...) +#endif + +/* TODO This is a power management macro. Currently not defined */ +#define CONFIG_OMAP34XX_OFFMODE + +/* usage count for DSS power management */ +static int disp_usage; +static spinlock_t dss_lock; +short int current_colorconv_values[2][3][3]; +EXPORT_SYMBOL(current_colorconv_values); +static struct omap_dss_regs dss_ctx; + +static struct clk *dss1f_scale; +static struct clk *dss1f, *dss1i; +static int m_clk_rate = 24000000 * 4; +#if defined(CONFIG_OMAP_USE_DSI_PLL) || defined(CONFIG_OMAP_DSI) +static struct clk *dss2f; +#endif + +struct omap_disp_dma_params { + u32 ba0; + u32 ba1; + int row_inc; + int pix_inc; +}; + +static struct layer_t { + int output_dev; + int in_use; + int ctx_valid; + + /* one set of dma parameters each for LCD and TV */ + struct omap_disp_dma_params dma[2]; + + int size_x; + int size_y; +} layer[DSS_CTX_NUMBER] = { + { + .ctx_valid = 0,}, { + .ctx_valid = 0,}, { + .ctx_valid = 0,}, { + .ctx_valid = 0,}, { +.ctx_valid = 0,},}; + +#define MAX_ISR_NR 8 +static int omap_disp_irq; +static struct { + omap_disp_isr_t isr; + void *arg; + unsigned int mask; +} registered_isr[MAX_ISR_NR]; + +/* Required function delcalarations */ +static void omap_disp_restore_ctx(int ltype); +static void disp_save_ctx(int ltype); + +/* + * Modes and Encoders supported by DSS + */ +struct channel_obj channels[] = { + {0, 0, {NULL, NULL, NULL}, 0, 0}, +#ifndef CONFIG_ARCH_OMAP3410 + {0, 0, {NULL, NULL, NULL}, 0, 3} +#endif +}; + +/* This m... [truncated message content] |
From: <hva...@ti...> - 2008-11-14 06:32:48
|
From: Vaibhav Hiremath <hva...@ti...> Tested LCD, TV, DVI (480P) out on OMAP3EVM board. Please make sure that you change the option CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=7 and apply the Mans Rullgard clock patches to support set_rate and round_rate API. Signed-off-by: Vaibhav Hiremath <hva...@ti...> --- arch/arm/mach-omap2/board-omap3evm.c | 224 ++++++++++++++++++++++++++++++++-- drivers/video/omap2/Kconfig | 5 + drivers/video/omap2/Makefile | 1 + drivers/video/omap2/panel-dvi.c | 54 ++------- drivers/video/omap2/panel-omap3evm.c | 110 +++++++++++++++++ 5 files changed, 341 insertions(+), 53 deletions(-) create mode 100644 drivers/video/omap2/panel-omap3evm.c diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 42ab826..e244fa7 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -37,6 +37,8 @@ #include <mach/usb-ehci.h> #include <mach/common.h> #include <mach/mcspi.h> +#include <mach/omapfb.h> +#include <mach/display.h> #include "sdram-micron-mt46h32m32lf-6.h" #include "twl4030-generic-scripts.h" @@ -161,14 +163,215 @@ static int __init omap3_evm_i2c_init(void) omap_register_i2c_bus(3, 400, NULL, 0); return 0; } +static struct omap_fbmem_config evm_fbmem0_config = { + .size = 480*720*4, + .start = OMAPFB_MEMTYPE_SDRAM, +}; -static struct platform_device omap3_evm_lcd_device = { - .name = "omap3evm_lcd", - .id = -1, +static struct omap_fbmem_config evm_fbmem1_config = { + .size = 480*720*4, + .start = OMAPFB_MEMTYPE_SDRAM, }; -static struct omap_lcd_config omap3_evm_lcd_config __initdata = { - .ctrl_name = "internal", +static struct omap_fbmem_config evm_fbmem2_config = { + .size = 480*720*4, + .start = OMAPFB_MEMTYPE_SDRAM, +}; +#define LCD_PANEL_LR 2 +#define LCD_PANEL_UD 3 +#define LCD_PANEL_INI 152 +#define LCD_PANEL_ENABLE_GPIO 153 +#define LCD_PANEL_QVGA 154 +#define LCD_PANEL_RESB 155 + +#define ENABLE_VDAC_DEDICATED 0x03 +#define ENABLE_VDAC_DEV_GRP 0x20 +#define ENABLE_VPLL2_DEDICATED 0x05 +#define ENABLE_VPLL2_DEV_GRP 0xE0 + +#define TWL4030_GPIODATA_IN3 0x03 +#define TWL4030_GPIODATA_DIR3 0x06 +#define TWL4030_VPLL2_DEV_GRP 0x33 +#define TWL4030_VPLL2_DEDICATED 0x36 + +static int lcd_enabled; +static int dvi_enabled; + +static void __init evm_display_init(void) +{ + int r; + r = gpio_request(LCD_PANEL_LR, "lcd_panel_lr"); + if (r) { + printk(KERN_ERR "failed to get LCD_PANEL_LR\n"); + return; + } + r = gpio_request(LCD_PANEL_UD, "lcd_panel_ud"); + if (r) { + printk(KERN_ERR "failed to get LCD_PANEL_UD\n"); + goto err_1; + } + + r = gpio_request(LCD_PANEL_INI, "lcd_panel_ini"); + if (r) { + printk(KERN_ERR "failed to get LCD_PANEL_INI\n"); + goto err_2; + } + r = gpio_request(LCD_PANEL_RESB, "lcd_panel_resb"); + if (r) { + printk(KERN_ERR "failed to get LCD_PANEL_RESB\n"); + goto err_3; + } + r = gpio_request(LCD_PANEL_QVGA, "lcd_panel_qvga"); + if (r) { + printk(KERN_ERR "failed to get LCD_PANEL_QVGA\n"); + goto err_4; + } + + gpio_direction_output(LCD_PANEL_LR, 0); + gpio_direction_output(LCD_PANEL_UD, 0); + gpio_direction_output(LCD_PANEL_INI, 0); + gpio_direction_output(LCD_PANEL_RESB, 0); + gpio_direction_output(LCD_PANEL_QVGA, 0); + +#define TWL_LED_LEDEN 0x00 +#define TWL_PWMA_PWMAON 0x00 +#define TWL_PWMA_PWMAOFF 0x01 + + twl4030_i2c_write_u8(TWL4030_MODULE_LED, 0x11, TWL_LED_LEDEN); + twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x01, TWL_PWMA_PWMAON); + twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x02, TWL_PWMA_PWMAOFF); + + gpio_direction_output(LCD_PANEL_RESB, 1); + gpio_direction_output(LCD_PANEL_INI, 1); + gpio_direction_output(LCD_PANEL_QVGA, 0); + gpio_direction_output(LCD_PANEL_LR, 1); + gpio_direction_output(LCD_PANEL_UD, 1); + + return; + +err_4: + gpio_free(LCD_PANEL_RESB); +err_3: + gpio_free(LCD_PANEL_INI); +err_2: + gpio_free(LCD_PANEL_UD); +err_1: + gpio_free(LCD_PANEL_LR); + +} + +static int panel_enable_lcd(struct omap_display *display) +{ + if (dvi_enabled) { + printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); + return -EINVAL; + } + if (system_rev > OMAP3430_REV_ES1_0) { + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, + ENABLE_VPLL2_DEDICATED, TWL4030_VPLL2_DEDICATED); + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, + ENABLE_VPLL2_DEV_GRP, TWL4030_VPLL2_DEV_GRP); + } + gpio_direction_output(LCD_PANEL_ENABLE_GPIO, 0); + lcd_enabled = 1; + return 0; +} + +static void panel_disable_lcd(struct omap_display *display) +{ + if (system_rev > OMAP3430_REV_ES1_0) { + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x0, + TWL4030_VPLL2_DEDICATED); + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x0, + TWL4030_VPLL2_DEV_GRP); + } + omap_set_gpio_dataout(LCD_PANEL_ENABLE_GPIO, 1); + lcd_enabled = 0; +} + +static struct omap_display_data evm_display_data = { + .type = OMAP_DISPLAY_TYPE_DPI, + .name = "lcd", + .panel_name = "panel-evm", + .u.dpi.data_lines = 16, + .panel_enable = panel_enable_lcd, + .panel_disable = panel_disable_lcd, +}; + +static int panel_enable_tv(struct omap_display *display) +{ + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, + ENABLE_VDAC_DEDICATED, TWL4030_VDAC_DEDICATED); + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, + ENABLE_VDAC_DEV_GRP, TWL4030_VDAC_DEV_GRP); + return 0; +} + +static void panel_disable_tv(struct omap_display *display) +{ + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00, + TWL4030_VDAC_DEDICATED); + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00, + TWL4030_VDAC_DEV_GRP); +} + +static struct omap_display_data evm_display_data_tv = { + .type = OMAP_DISPLAY_TYPE_VENC, + .name = "tv", + .u.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, + .panel_enable = panel_enable_tv, + .panel_disable = panel_disable_tv, +}; + + +static int panel_enable_dvi(struct omap_display *display) +{ + if (lcd_enabled) { + printk(KERN_ERR "cannot enable DVI, LCD is enabled\n"); + return -EINVAL; + } + twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, + TWL4030_GPIODATA_IN3); + twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, + TWL4030_GPIODATA_DIR3); + dvi_enabled = 1; + + return 0; +} + +static void panel_disable_dvi(struct omap_display *display) +{ + twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x00, + TWL4030_GPIODATA_IN3); + twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x00, + TWL4030_GPIODATA_DIR3); + dvi_enabled = 0; +} + + +static struct omap_display_data evm_display_data_dvi = { + .type = OMAP_DISPLAY_TYPE_DPI, + .name = "dvi", + .panel_name = "panel-dvi", + .u.dpi.data_lines = 24, + .panel_enable = panel_enable_dvi, + .panel_disable = panel_disable_dvi, +}; + +static struct omap_dss_platform_data evm_dss_data = { + .num_displays = 3, + .displays = { + &evm_display_data, + &evm_display_data_dvi, + &evm_display_data_tv, + } +}; +static struct platform_device evm_dss_device = { + .name = "omap-dss", + .id = -1, + .dev = { + .platform_data = &evm_dss_data, + }, }; static void ads7846_dev_init(void) @@ -227,11 +430,13 @@ static void __init omap3_evm_init_irq(void) static struct omap_board_config_kernel omap3_evm_config[] __initdata = { { OMAP_TAG_UART, &omap3_evm_uart_config }, - { OMAP_TAG_LCD, &omap3_evm_lcd_config }, + { OMAP_TAG_FBMEM, &evm_fbmem0_config }, + { OMAP_TAG_FBMEM, &evm_fbmem1_config }, + { OMAP_TAG_FBMEM, &evm_fbmem2_config }, }; static struct platform_device *omap3_evm_devices[] __initdata = { - &omap3_evm_lcd_device, + &evm_dss_device, &omap3evm_smc911x_device, }; @@ -250,8 +455,6 @@ static void __init omap3_evm_init(void) omap3_evm_i2c_init(); platform_add_devices(omap3_evm_devices, ARRAY_SIZE(omap3_evm_devices)); - omap_board_config = omap3_evm_config; - omap_board_config_size = ARRAY_SIZE(omap3_evm_config); spi_register_board_info(omap3evm_spi_board_info, ARRAY_SIZE(omap3evm_spi_board_info)); @@ -262,10 +465,13 @@ static void __init omap3_evm_init(void) usb_ehci_init(); omap3evm_flash_init(); ads7846_dev_init(); + evm_display_init(); } static void __init omap3_evm_map_io(void) { + omap_board_config = omap3_evm_config; + omap_board_config_size = ARRAY_SIZE(omap3_evm_config); omap2_set_globals_343x(); omap2_map_common_io(); } diff --git a/drivers/video/omap2/Kconfig b/drivers/video/omap2/Kconfig index 95691ad..8211ffd 100644 --- a/drivers/video/omap2/Kconfig +++ b/drivers/video/omap2/Kconfig @@ -51,4 +51,9 @@ config PANEL_SDP3430 help SDP3430 LCD +config PANEL_OMAP3EVM + tristate "OMAP3EVM Panel" + depends on OMAP2_DSS + help + OMAP3EVM LCD Panel endmenu diff --git a/drivers/video/omap2/Makefile b/drivers/video/omap2/Makefile index 73ab1c0..668e8c6 100644 --- a/drivers/video/omap2/Makefile +++ b/drivers/video/omap2/Makefile @@ -3,3 +3,4 @@ omapfb-y := omapfb-main.o omapfb-sysfs.o omapfb-ioctl.o obj-$(CONFIG_PANEL_DVI) += panel-dvi.o obj-$(CONFIG_PANEL_SDP3430) += panel-sdp3430.o +obj-$(CONFIG_PANEL_OMAP3EVM) += panel-omap3evm.o diff --git a/drivers/video/omap2/panel-dvi.c b/drivers/video/omap2/panel-dvi.c index 2d053df..2a52897 100644 --- a/drivers/video/omap2/panel-dvi.c +++ b/drivers/video/omap2/panel-dvi.c @@ -52,54 +52,20 @@ static struct omap_panel dvi_panel = { .disable = dvi_panel_disable, /*.set_mode = dvi_set_mode, */ -#if defined(CONFIG_PANEL_DVI_LOWRES) .timings = { - /* 800 x 600 @ 60 Hz Reduced blanking VESA CVT 0.48M3-R */ - .pixel_clock = 35500, - .hfp = 48, - .hsw = 32, - .hbp = 80, - .vfp = 3, - .vsw = 4, - .vbp = 11, + /* 480P */ + .pixel_clock = 30000, + .hfp = 24, + .hsw = 40, + .hbp = 96, + .vfp = 10, + .vsw = 3, + .vbp = 32, }, - .x_res = 800, - .y_res = 600, + .x_res = 480, + .y_res = 720, .bpp = 24, -#elif defined(CONFIG_PANEL_DVI_HIGHRES) - .timings = { - /* 1024 x 768 @ 60 Hz Reduced blanking */ - .pixel_clock = 56000, - .hfp = 48, - .hsw = 32, - .hbp = 80, - .vfp = 3, - .vsw = 4, - .vbp = 15, - }, - - .x_res = 1024, - .y_res = 768, - .bpp = 24, -#elif defined(CONFIG_PANEL_DVI_VERYHIGHRES) - .timings = { - /* 1280 x 1024 @ 57 Hz Reduced blanking */ - .pixel_clock = 86500, - .hfp = 48, - .hsw = 32, - .hbp = 80, - .vfp = 3, - .vsw = 4, - .vbp = 15, - }, - - .x_res = 1280, - .y_res = 1024, - .bpp = 16, -#else -#error Undefined default mode -#endif .config = OMAP_DSS_LCD_TFT, }; diff --git a/drivers/video/omap2/panel-omap3evm.c b/drivers/video/omap2/panel-omap3evm.c new file mode 100644 index 0000000..4a00b02 --- /dev/null +++ b/drivers/video/omap2/panel-omap3evm.c @@ -0,0 +1,110 @@ +/* + * LCD panel support for the TI OMAP3EVM board + * + * Copyright (C) 2008 Texas Instruments, Inc. + * Author: Vaibhav Hiremath <hva...@ti...> + * + * Derived from drivers/video/omap2/panel-sdp3430.c + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include <linux/module.h> +#include <linux/delay.h> + +#include <mach/display.h> + +static int omap3evm_panel_init(struct omap_display *display) +{ + return 0; +} + +static void omap3evm_panel_cleanup(struct omap_display *display) +{ +} + +static int omap3evm_panel_enable(struct omap_display *display) +{ + int r = 0; + + if (display->hw_config.panel_enable) + r = display->hw_config.panel_enable(display); + + return r; +} + +static void omap3evm_panel_disable(struct omap_display *display) +{ + if (display->hw_config.panel_disable) + display->hw_config.panel_disable(display); +} + +static int omap3evm_panel_suspend(struct omap_display *display) +{ + omap3evm_panel_disable(display); + return 0; +} + +static int omap3evm_panel_resume(struct omap_display *display) +{ + return omap3evm_panel_enable(display); +} + +static struct omap_panel omap3evm_panel = { + .owner = THIS_MODULE, + .name = "panel-evm", + .init = omap3evm_panel_init, + .cleanup = omap3evm_panel_cleanup, + .enable = omap3evm_panel_enable, + .disable = omap3evm_panel_disable, + .suspend = omap3evm_panel_suspend, + .resume = omap3evm_panel_resume, + /*.set_mode = omap3evm_set_mode, */ + + .timings = { + .pixel_clock = 26000, + + .hsw = 4, + .hfp = 4, + .hbp = 40, + + .vsw = 2, + .vfp = 2, + .vbp = 7, + }, + + .acb = 0x28, + + .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | + OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IPC, + + .x_res = 480, + .y_res = 640, + .bpp = 18, +}; + + +static int __init omap3evm_panel_drv_init(void) +{ + omap_dss_register_panel(&omap3evm_panel); + return 0; +} + +static void __exit omap3evm_panel_drv_exit(void) +{ + omap_dss_unregister_panel(&omap3evm_panel); +} + +module_init(omap3evm_panel_drv_init); +module_exit(omap3evm_panel_drv_exit); +MODULE_LICENSE("GPL"); -- 1.5.6 |
From: Tomi V. <tom...@no...> - 2008-11-14 10:54:36
|
Hi, On Fri, 2008-11-14 at 12:02 +0530, ext hva...@ti... wrote: > From: Vaibhav Hiremath <hva...@ti...> > > Tested LCD, TV, DVI (480P) out on OMAP3EVM board. > > Please make sure that you change the option > CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=7 and apply the > Mans Rullgard clock patches to support set_rate and round_rate API. > > Signed-off-by: Vaibhav Hiremath <hva...@ti...> I think the LCD panel on SDP and EVM boards are the same, so we should only have one driver. Do you have specifications about the LCD? The manufacturer, model etc?. I didn't find any proper information about the LCD. The #ifdef mode selection in DVI panel is quit hack, I agree. The mode selection should be possible to be done runtime (or with kernel boot option at minimum), but I'm not yet sure how to implement it. But I guess I could at least name the mode config options a bit better. You also set the LCD's bpp to 18, why is that? The bpp in panel driver is currently only used as a default bpp for omapfb, but there's no 18bpp mode in OMAP. For some reason omapfb let's the 18bpp through, but it acts like it is 16bpp. I can't remember why it does that, I think I'll remove it from omapfb. Tomi > --- > arch/arm/mach-omap2/board-omap3evm.c | 224 ++++++++++++++++++++++++++++++++-- > drivers/video/omap2/Kconfig | 5 + > drivers/video/omap2/Makefile | 1 + > drivers/video/omap2/panel-dvi.c | 54 ++------- > drivers/video/omap2/panel-omap3evm.c | 110 +++++++++++++++++ > 5 files changed, 341 insertions(+), 53 deletions(-) > create mode 100644 drivers/video/omap2/panel-omap3evm.c > > diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c > index 42ab826..e244fa7 100644 > --- a/arch/arm/mach-omap2/board-omap3evm.c > +++ b/arch/arm/mach-omap2/board-omap3evm.c > @@ -37,6 +37,8 @@ > #include <mach/usb-ehci.h> > #include <mach/common.h> > #include <mach/mcspi.h> > +#include <mach/omapfb.h> > +#include <mach/display.h> > > #include "sdram-micron-mt46h32m32lf-6.h" > #include "twl4030-generic-scripts.h" > @@ -161,14 +163,215 @@ static int __init omap3_evm_i2c_init(void) > omap_register_i2c_bus(3, 400, NULL, 0); > return 0; > } > +static struct omap_fbmem_config evm_fbmem0_config = { > + .size = 480*720*4, > + .start = OMAPFB_MEMTYPE_SDRAM, > +}; > > -static struct platform_device omap3_evm_lcd_device = { > - .name = "omap3evm_lcd", > - .id = -1, > +static struct omap_fbmem_config evm_fbmem1_config = { > + .size = 480*720*4, > + .start = OMAPFB_MEMTYPE_SDRAM, > }; > > -static struct omap_lcd_config omap3_evm_lcd_config __initdata = { > - .ctrl_name = "internal", > +static struct omap_fbmem_config evm_fbmem2_config = { > + .size = 480*720*4, > + .start = OMAPFB_MEMTYPE_SDRAM, > +}; > +#define LCD_PANEL_LR 2 > +#define LCD_PANEL_UD 3 > +#define LCD_PANEL_INI 152 > +#define LCD_PANEL_ENABLE_GPIO 153 > +#define LCD_PANEL_QVGA 154 > +#define LCD_PANEL_RESB 155 > + > +#define ENABLE_VDAC_DEDICATED 0x03 > +#define ENABLE_VDAC_DEV_GRP 0x20 > +#define ENABLE_VPLL2_DEDICATED 0x05 > +#define ENABLE_VPLL2_DEV_GRP 0xE0 > + > +#define TWL4030_GPIODATA_IN3 0x03 > +#define TWL4030_GPIODATA_DIR3 0x06 > +#define TWL4030_VPLL2_DEV_GRP 0x33 > +#define TWL4030_VPLL2_DEDICATED 0x36 > + > +static int lcd_enabled; > +static int dvi_enabled; > + > +static void __init evm_display_init(void) > +{ > + int r; > + r = gpio_request(LCD_PANEL_LR, "lcd_panel_lr"); > + if (r) { > + printk(KERN_ERR "failed to get LCD_PANEL_LR\n"); > + return; > + } > + r = gpio_request(LCD_PANEL_UD, "lcd_panel_ud"); > + if (r) { > + printk(KERN_ERR "failed to get LCD_PANEL_UD\n"); > + goto err_1; > + } > + > + r = gpio_request(LCD_PANEL_INI, "lcd_panel_ini"); > + if (r) { > + printk(KERN_ERR "failed to get LCD_PANEL_INI\n"); > + goto err_2; > + } > + r = gpio_request(LCD_PANEL_RESB, "lcd_panel_resb"); > + if (r) { > + printk(KERN_ERR "failed to get LCD_PANEL_RESB\n"); > + goto err_3; > + } > + r = gpio_request(LCD_PANEL_QVGA, "lcd_panel_qvga"); > + if (r) { > + printk(KERN_ERR "failed to get LCD_PANEL_QVGA\n"); > + goto err_4; > + } > + > + gpio_direction_output(LCD_PANEL_LR, 0); > + gpio_direction_output(LCD_PANEL_UD, 0); > + gpio_direction_output(LCD_PANEL_INI, 0); > + gpio_direction_output(LCD_PANEL_RESB, 0); > + gpio_direction_output(LCD_PANEL_QVGA, 0); > + > +#define TWL_LED_LEDEN 0x00 > +#define TWL_PWMA_PWMAON 0x00 > +#define TWL_PWMA_PWMAOFF 0x01 > + > + twl4030_i2c_write_u8(TWL4030_MODULE_LED, 0x11, TWL_LED_LEDEN); > + twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x01, TWL_PWMA_PWMAON); > + twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x02, TWL_PWMA_PWMAOFF); > + > + gpio_direction_output(LCD_PANEL_RESB, 1); > + gpio_direction_output(LCD_PANEL_INI, 1); > + gpio_direction_output(LCD_PANEL_QVGA, 0); > + gpio_direction_output(LCD_PANEL_LR, 1); > + gpio_direction_output(LCD_PANEL_UD, 1); > + > + return; > + > +err_4: > + gpio_free(LCD_PANEL_RESB); > +err_3: > + gpio_free(LCD_PANEL_INI); > +err_2: > + gpio_free(LCD_PANEL_UD); > +err_1: > + gpio_free(LCD_PANEL_LR); > + > +} > + > +static int panel_enable_lcd(struct omap_display *display) > +{ > + if (dvi_enabled) { > + printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); > + return -EINVAL; > + } > + if (system_rev > OMAP3430_REV_ES1_0) { > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > + ENABLE_VPLL2_DEDICATED, TWL4030_VPLL2_DEDICATED); > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > + ENABLE_VPLL2_DEV_GRP, TWL4030_VPLL2_DEV_GRP); > + } > + gpio_direction_output(LCD_PANEL_ENABLE_GPIO, 0); > + lcd_enabled = 1; > + return 0; > +} > + > +static void panel_disable_lcd(struct omap_display *display) > +{ > + if (system_rev > OMAP3430_REV_ES1_0) { > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x0, > + TWL4030_VPLL2_DEDICATED); > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x0, > + TWL4030_VPLL2_DEV_GRP); > + } > + omap_set_gpio_dataout(LCD_PANEL_ENABLE_GPIO, 1); > + lcd_enabled = 0; > +} > + > +static struct omap_display_data evm_display_data = { > + .type = OMAP_DISPLAY_TYPE_DPI, > + .name = "lcd", > + .panel_name = "panel-evm", > + .u.dpi.data_lines = 16, > + .panel_enable = panel_enable_lcd, > + .panel_disable = panel_disable_lcd, > +}; > + > +static int panel_enable_tv(struct omap_display *display) > +{ > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > + ENABLE_VDAC_DEDICATED, TWL4030_VDAC_DEDICATED); > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > + ENABLE_VDAC_DEV_GRP, TWL4030_VDAC_DEV_GRP); > + return 0; > +} > + > +static void panel_disable_tv(struct omap_display *display) > +{ > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00, > + TWL4030_VDAC_DEDICATED); > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00, > + TWL4030_VDAC_DEV_GRP); > +} > + > +static struct omap_display_data evm_display_data_tv = { > + .type = OMAP_DISPLAY_TYPE_VENC, > + .name = "tv", > + .u.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, > + .panel_enable = panel_enable_tv, > + .panel_disable = panel_disable_tv, > +}; > + > + > +static int panel_enable_dvi(struct omap_display *display) > +{ > + if (lcd_enabled) { > + printk(KERN_ERR "cannot enable DVI, LCD is enabled\n"); > + return -EINVAL; > + } > + twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, > + TWL4030_GPIODATA_IN3); > + twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, > + TWL4030_GPIODATA_DIR3); > + dvi_enabled = 1; > + > + return 0; > +} > + > +static void panel_disable_dvi(struct omap_display *display) > +{ > + twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x00, > + TWL4030_GPIODATA_IN3); > + twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x00, > + TWL4030_GPIODATA_DIR3); > + dvi_enabled = 0; > +} > + > + > +static struct omap_display_data evm_display_data_dvi = { > + .type = OMAP_DISPLAY_TYPE_DPI, > + .name = "dvi", > + .panel_name = "panel-dvi", > + .u.dpi.data_lines = 24, > + .panel_enable = panel_enable_dvi, > + .panel_disable = panel_disable_dvi, > +}; > + > +static struct omap_dss_platform_data evm_dss_data = { > + .num_displays = 3, > + .displays = { > + &evm_display_data, > + &evm_display_data_dvi, > + &evm_display_data_tv, > + } > +}; > +static struct platform_device evm_dss_device = { > + .name = "omap-dss", > + .id = -1, > + .dev = { > + .platform_data = &evm_dss_data, > + }, > }; > > static void ads7846_dev_init(void) > @@ -227,11 +430,13 @@ static void __init omap3_evm_init_irq(void) > > static struct omap_board_config_kernel omap3_evm_config[] __initdata = { > { OMAP_TAG_UART, &omap3_evm_uart_config }, > - { OMAP_TAG_LCD, &omap3_evm_lcd_config }, > + { OMAP_TAG_FBMEM, &evm_fbmem0_config }, > + { OMAP_TAG_FBMEM, &evm_fbmem1_config }, > + { OMAP_TAG_FBMEM, &evm_fbmem2_config }, > }; > > static struct platform_device *omap3_evm_devices[] __initdata = { > - &omap3_evm_lcd_device, > + &evm_dss_device, > &omap3evm_smc911x_device, > }; > > @@ -250,8 +455,6 @@ static void __init omap3_evm_init(void) > omap3_evm_i2c_init(); > > platform_add_devices(omap3_evm_devices, ARRAY_SIZE(omap3_evm_devices)); > - omap_board_config = omap3_evm_config; > - omap_board_config_size = ARRAY_SIZE(omap3_evm_config); > > spi_register_board_info(omap3evm_spi_board_info, > ARRAY_SIZE(omap3evm_spi_board_info)); > @@ -262,10 +465,13 @@ static void __init omap3_evm_init(void) > usb_ehci_init(); > omap3evm_flash_init(); > ads7846_dev_init(); > + evm_display_init(); > } > > static void __init omap3_evm_map_io(void) > { > + omap_board_config = omap3_evm_config; > + omap_board_config_size = ARRAY_SIZE(omap3_evm_config); > omap2_set_globals_343x(); > omap2_map_common_io(); > } > diff --git a/drivers/video/omap2/Kconfig b/drivers/video/omap2/Kconfig > index 95691ad..8211ffd 100644 > --- a/drivers/video/omap2/Kconfig > +++ b/drivers/video/omap2/Kconfig > @@ -51,4 +51,9 @@ config PANEL_SDP3430 > help > SDP3430 LCD > > +config PANEL_OMAP3EVM > + tristate "OMAP3EVM Panel" > + depends on OMAP2_DSS > + help > + OMAP3EVM LCD Panel > endmenu > diff --git a/drivers/video/omap2/Makefile b/drivers/video/omap2/Makefile > index 73ab1c0..668e8c6 100644 > --- a/drivers/video/omap2/Makefile > +++ b/drivers/video/omap2/Makefile > @@ -3,3 +3,4 @@ omapfb-y := omapfb-main.o omapfb-sysfs.o omapfb-ioctl.o > > obj-$(CONFIG_PANEL_DVI) += panel-dvi.o > obj-$(CONFIG_PANEL_SDP3430) += panel-sdp3430.o > +obj-$(CONFIG_PANEL_OMAP3EVM) += panel-omap3evm.o > diff --git a/drivers/video/omap2/panel-dvi.c b/drivers/video/omap2/panel-dvi.c > index 2d053df..2a52897 100644 > --- a/drivers/video/omap2/panel-dvi.c > +++ b/drivers/video/omap2/panel-dvi.c > @@ -52,54 +52,20 @@ static struct omap_panel dvi_panel = { > .disable = dvi_panel_disable, > /*.set_mode = dvi_set_mode, */ > > -#if defined(CONFIG_PANEL_DVI_LOWRES) > .timings = { > - /* 800 x 600 @ 60 Hz Reduced blanking VESA CVT 0.48M3-R */ > - .pixel_clock = 35500, > - .hfp = 48, > - .hsw = 32, > - .hbp = 80, > - .vfp = 3, > - .vsw = 4, > - .vbp = 11, > + /* 480P */ > + .pixel_clock = 30000, > + .hfp = 24, > + .hsw = 40, > + .hbp = 96, > + .vfp = 10, > + .vsw = 3, > + .vbp = 32, > }, > > - .x_res = 800, > - .y_res = 600, > + .x_res = 480, > + .y_res = 720, > .bpp = 24, > -#elif defined(CONFIG_PANEL_DVI_HIGHRES) > - .timings = { > - /* 1024 x 768 @ 60 Hz Reduced blanking */ > - .pixel_clock = 56000, > - .hfp = 48, > - .hsw = 32, > - .hbp = 80, > - .vfp = 3, > - .vsw = 4, > - .vbp = 15, > - }, > - > - .x_res = 1024, > - .y_res = 768, > - .bpp = 24, > -#elif defined(CONFIG_PANEL_DVI_VERYHIGHRES) > - .timings = { > - /* 1280 x 1024 @ 57 Hz Reduced blanking */ > - .pixel_clock = 86500, > - .hfp = 48, > - .hsw = 32, > - .hbp = 80, > - .vfp = 3, > - .vsw = 4, > - .vbp = 15, > - }, > - > - .x_res = 1280, > - .y_res = 1024, > - .bpp = 16, > -#else > -#error Undefined default mode > -#endif > > .config = OMAP_DSS_LCD_TFT, > }; > diff --git a/drivers/video/omap2/panel-omap3evm.c b/drivers/video/omap2/panel-omap3evm.c > new file mode 100644 > index 0000000..4a00b02 > --- /dev/null > +++ b/drivers/video/omap2/panel-omap3evm.c > @@ -0,0 +1,110 @@ > +/* > + * LCD panel support for the TI OMAP3EVM board > + * > + * Copyright (C) 2008 Texas Instruments, Inc. > + * Author: Vaibhav Hiremath <hva...@ti...> > + * > + * Derived from drivers/video/omap2/panel-sdp3430.c > + * > + * This program is free software; you can redistribute it and/or modify it > + * under the terms of the GNU General Public License version 2 as published by > + * the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, but WITHOUT > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for > + * more details. > + * > + * You should have received a copy of the GNU General Public License along with > + * this program. If not, see <http://www.gnu.org/licenses/>. > + */ > + > +#include <linux/module.h> > +#include <linux/delay.h> > + > +#include <mach/display.h> > + > +static int omap3evm_panel_init(struct omap_display *display) > +{ > + return 0; > +} > + > +static void omap3evm_panel_cleanup(struct omap_display *display) > +{ > +} > + > +static int omap3evm_panel_enable(struct omap_display *display) > +{ > + int r = 0; > + > + if (display->hw_config.panel_enable) > + r = display->hw_config.panel_enable(display); > + > + return r; > +} > + > +static void omap3evm_panel_disable(struct omap_display *display) > +{ > + if (display->hw_config.panel_disable) > + display->hw_config.panel_disable(display); > +} > + > +static int omap3evm_panel_suspend(struct omap_display *display) > +{ > + omap3evm_panel_disable(display); > + return 0; > +} > + > +static int omap3evm_panel_resume(struct omap_display *display) > +{ > + return omap3evm_panel_enable(display); > +} > + > +static struct omap_panel omap3evm_panel = { > + .owner = THIS_MODULE, > + .name = "panel-evm", > + .init = omap3evm_panel_init, > + .cleanup = omap3evm_panel_cleanup, > + .enable = omap3evm_panel_enable, > + .disable = omap3evm_panel_disable, > + .suspend = omap3evm_panel_suspend, > + .resume = omap3evm_panel_resume, > + /*.set_mode = omap3evm_set_mode, */ > + > + .timings = { > + .pixel_clock = 26000, > + > + .hsw = 4, > + .hfp = 4, > + .hbp = 40, > + > + .vsw = 2, > + .vfp = 2, > + .vbp = 7, > + }, > + > + .acb = 0x28, > + > + .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | > + OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IPC, > + > + .x_res = 480, > + .y_res = 640, > + .bpp = 18, > +}; > + > + > +static int __init omap3evm_panel_drv_init(void) > +{ > + omap_dss_register_panel(&omap3evm_panel); > + return 0; > +} > + > +static void __exit omap3evm_panel_drv_exit(void) > +{ > + omap_dss_unregister_panel(&omap3evm_panel); > +} > + > +module_init(omap3evm_panel_drv_init); > +module_exit(omap3evm_panel_drv_exit); > +MODULE_LICENSE("GPL"); > -- > 1.5.6 > > -- > To unsubscribe from this list: send the line "unsubscribe linux-omap" in > the body of a message to maj...@vg... > More majordomo info at http://vger.kernel.org/majordomo-info.html |
From: Hiremath, V. <hva...@ti...> - 2008-11-14 12:35:48
|
Thanks, Vaibhav Hiremath > -----Original Message----- > From: Tomi Valkeinen [mailto:tom...@no...] > Sent: Friday, November 14, 2008 4:24 PM > To: Hiremath, Vaibhav > Cc: lin...@li...; linux- > om...@vg... > Subject: Re: [REVIEW PATCH] Added OMAP3EVM support on Tomis > FBDEV/DSS Patches > > Hi, > > On Fri, 2008-11-14 at 12:02 +0530, ext hva...@ti... wrote: > > From: Vaibhav Hiremath <hva...@ti...> > > > > Tested LCD, TV, DVI (480P) out on OMAP3EVM board. > > > > Please make sure that you change the option > > CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=7 and apply the > > Mans Rullgard clock patches to support set_rate and round_rate > API. > > > > Signed-off-by: Vaibhav Hiremath <hva...@ti...> > > I think the LCD panel on SDP and EVM boards are the same, so we > should > only have one driver. Do you have specifications about the LCD? The > manufacturer, model etc?. I didn't find any proper information about > the > LCD. > [Hiremath, Vaibhav] The LCD on OMAP3EVM is Sharp LCD (Model No. - LS037V7DW01). Koen has already conformed that panel3430sdp.c is working with OMAP3EVM, let me try at my end. If it works properly then we can have same file to build for both SDP and EVM. But in that case it make sense to rename file to panel-lcd.c. > The #ifdef mode selection in DVI panel is quit hack, I agree. The > mode > selection should be possible to be done runtime (or with kernel boot > option at minimum), but I'm not yet sure how to implement it. But I > guess I could at least name the mode config options a bit better. > [Hiremath, Vaibhav] We will also work on this and let you know. > You also set the LCD's bpp to 18, why is that? The bpp in panel > driver > is currently only used as a default bpp for omapfb, but there's no > 18bpp > mode in OMAP. For some reason omapfb let's the 18bpp through, but it > acts like it is 16bpp. I can't remember why it does that, I think > I'll > remove it from omapfb. > [Hiremath, Vaibhav] LCD panel connected to OMAP3EVM is 18 bit LCD, the interface is also 18 bit in schematics. I am not sure about SDP board though. > Tomi > > > > --- > > arch/arm/mach-omap2/board-omap3evm.c | 224 > ++++++++++++++++++++++++++++++++-- > > drivers/video/omap2/Kconfig | 5 + > > drivers/video/omap2/Makefile | 1 + > > drivers/video/omap2/panel-dvi.c | 54 ++------- > > drivers/video/omap2/panel-omap3evm.c | 110 +++++++++++++++++ > > 5 files changed, 341 insertions(+), 53 deletions(-) > > create mode 100644 drivers/video/omap2/panel-omap3evm.c > > > > diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach- > omap2/board-omap3evm.c > > index 42ab826..e244fa7 100644 > > --- a/arch/arm/mach-omap2/board-omap3evm.c > > +++ b/arch/arm/mach-omap2/board-omap3evm.c > > @@ -37,6 +37,8 @@ > > #include <mach/usb-ehci.h> > > #include <mach/common.h> > > #include <mach/mcspi.h> > > +#include <mach/omapfb.h> > > +#include <mach/display.h> > > > > #include "sdram-micron-mt46h32m32lf-6.h" > > #include "twl4030-generic-scripts.h" > > @@ -161,14 +163,215 @@ static int __init omap3_evm_i2c_init(void) > > omap_register_i2c_bus(3, 400, NULL, 0); > > return 0; > > } > > +static struct omap_fbmem_config evm_fbmem0_config = { > > + .size = 480*720*4, > > + .start = OMAPFB_MEMTYPE_SDRAM, > > +}; > > > > -static struct platform_device omap3_evm_lcd_device = { > > - .name = "omap3evm_lcd", > > - .id = -1, > > +static struct omap_fbmem_config evm_fbmem1_config = { > > + .size = 480*720*4, > > + .start = OMAPFB_MEMTYPE_SDRAM, > > }; > > > > -static struct omap_lcd_config omap3_evm_lcd_config __initdata = { > > - .ctrl_name = "internal", > > +static struct omap_fbmem_config evm_fbmem2_config = { > > + .size = 480*720*4, > > + .start = OMAPFB_MEMTYPE_SDRAM, > > +}; > > +#define LCD_PANEL_LR 2 > > +#define LCD_PANEL_UD 3 > > +#define LCD_PANEL_INI 152 > > +#define LCD_PANEL_ENABLE_GPIO 153 > > +#define LCD_PANEL_QVGA 154 > > +#define LCD_PANEL_RESB 155 > > + > > +#define ENABLE_VDAC_DEDICATED 0x03 > > +#define ENABLE_VDAC_DEV_GRP 0x20 > > +#define ENABLE_VPLL2_DEDICATED 0x05 > > +#define ENABLE_VPLL2_DEV_GRP 0xE0 > > + > > +#define TWL4030_GPIODATA_IN3 0x03 > > +#define TWL4030_GPIODATA_DIR3 0x06 > > +#define TWL4030_VPLL2_DEV_GRP 0x33 > > +#define TWL4030_VPLL2_DEDICATED 0x36 > > + > > +static int lcd_enabled; > > +static int dvi_enabled; > > + > > +static void __init evm_display_init(void) > > +{ > > + int r; > > + r = gpio_request(LCD_PANEL_LR, "lcd_panel_lr"); > > + if (r) { > > + printk(KERN_ERR "failed to get LCD_PANEL_LR\n"); > > + return; > > + } > > + r = gpio_request(LCD_PANEL_UD, "lcd_panel_ud"); > > + if (r) { > > + printk(KERN_ERR "failed to get LCD_PANEL_UD\n"); > > + goto err_1; > > + } > > + > > + r = gpio_request(LCD_PANEL_INI, "lcd_panel_ini"); > > + if (r) { > > + printk(KERN_ERR "failed to get LCD_PANEL_INI\n"); > > + goto err_2; > > + } > > + r = gpio_request(LCD_PANEL_RESB, "lcd_panel_resb"); > > + if (r) { > > + printk(KERN_ERR "failed to get LCD_PANEL_RESB\n"); > > + goto err_3; > > + } > > + r = gpio_request(LCD_PANEL_QVGA, "lcd_panel_qvga"); > > + if (r) { > > + printk(KERN_ERR "failed to get LCD_PANEL_QVGA\n"); > > + goto err_4; > > + } > > + > > + gpio_direction_output(LCD_PANEL_LR, 0); > > + gpio_direction_output(LCD_PANEL_UD, 0); > > + gpio_direction_output(LCD_PANEL_INI, 0); > > + gpio_direction_output(LCD_PANEL_RESB, 0); > > + gpio_direction_output(LCD_PANEL_QVGA, 0); > > + > > +#define TWL_LED_LEDEN 0x00 > > +#define TWL_PWMA_PWMAON 0x00 > > +#define TWL_PWMA_PWMAOFF 0x01 > > + > > + twl4030_i2c_write_u8(TWL4030_MODULE_LED, 0x11, TWL_LED_LEDEN); > > + twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x01, > TWL_PWMA_PWMAON); > > + twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x02, > TWL_PWMA_PWMAOFF); > > + > > + gpio_direction_output(LCD_PANEL_RESB, 1); > > + gpio_direction_output(LCD_PANEL_INI, 1); > > + gpio_direction_output(LCD_PANEL_QVGA, 0); > > + gpio_direction_output(LCD_PANEL_LR, 1); > > + gpio_direction_output(LCD_PANEL_UD, 1); > > + > > + return; > > + > > +err_4: > > + gpio_free(LCD_PANEL_RESB); > > +err_3: > > + gpio_free(LCD_PANEL_INI); > > +err_2: > > + gpio_free(LCD_PANEL_UD); > > +err_1: > > + gpio_free(LCD_PANEL_LR); > > + > > +} > > + > > +static int panel_enable_lcd(struct omap_display *display) > > +{ > > + if (dvi_enabled) { > > + printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); > > + return -EINVAL; > > + } > > + if (system_rev > OMAP3430_REV_ES1_0) { > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > > + ENABLE_VPLL2_DEDICATED, TWL4030_VPLL2_DEDICATED); > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > > + ENABLE_VPLL2_DEV_GRP, TWL4030_VPLL2_DEV_GRP); > > + } > > + gpio_direction_output(LCD_PANEL_ENABLE_GPIO, 0); > > + lcd_enabled = 1; > > + return 0; > > +} > > + > > +static void panel_disable_lcd(struct omap_display *display) > > +{ > > + if (system_rev > OMAP3430_REV_ES1_0) { > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x0, > > + TWL4030_VPLL2_DEDICATED); > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x0, > > + TWL4030_VPLL2_DEV_GRP); > > + } > > + omap_set_gpio_dataout(LCD_PANEL_ENABLE_GPIO, 1); > > + lcd_enabled = 0; > > +} > > + > > +static struct omap_display_data evm_display_data = { > > + .type = OMAP_DISPLAY_TYPE_DPI, > > + .name = "lcd", > > + .panel_name = "panel-evm", > > + .u.dpi.data_lines = 16, > > + .panel_enable = panel_enable_lcd, > > + .panel_disable = panel_disable_lcd, > > +}; > > + > > +static int panel_enable_tv(struct omap_display *display) > > +{ > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > > + ENABLE_VDAC_DEDICATED, TWL4030_VDAC_DEDICATED); > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > > + ENABLE_VDAC_DEV_GRP, TWL4030_VDAC_DEV_GRP); > > + return 0; > > +} > > + > > +static void panel_disable_tv(struct omap_display *display) > > +{ > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00, > > + TWL4030_VDAC_DEDICATED); > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00, > > + TWL4030_VDAC_DEV_GRP); > > +} > > + > > +static struct omap_display_data evm_display_data_tv = { > > + .type = OMAP_DISPLAY_TYPE_VENC, > > + .name = "tv", > > + .u.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, > > + .panel_enable = panel_enable_tv, > > + .panel_disable = panel_disable_tv, > > +}; > > + > > + > > +static int panel_enable_dvi(struct omap_display *display) > > +{ > > + if (lcd_enabled) { > > + printk(KERN_ERR "cannot enable DVI, LCD is enabled\n"); > > + return -EINVAL; > > + } > > + twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, > > + TWL4030_GPIODATA_IN3); > > + twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, > > + TWL4030_GPIODATA_DIR3); > > + dvi_enabled = 1; > > + > > + return 0; > > +} > > + > > +static void panel_disable_dvi(struct omap_display *display) > > +{ > > + twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x00, > > + TWL4030_GPIODATA_IN3); > > + twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x00, > > + TWL4030_GPIODATA_DIR3); > > + dvi_enabled = 0; > > +} > > + > > + > > +static struct omap_display_data evm_display_data_dvi = { > > + .type = OMAP_DISPLAY_TYPE_DPI, > > + .name = "dvi", > > + .panel_name = "panel-dvi", > > + .u.dpi.data_lines = 24, > > + .panel_enable = panel_enable_dvi, > > + .panel_disable = panel_disable_dvi, > > +}; > > + > > +static struct omap_dss_platform_data evm_dss_data = { > > + .num_displays = 3, > > + .displays = { > > + &evm_display_data, > > + &evm_display_data_dvi, > > + &evm_display_data_tv, > > + } > > +}; > > +static struct platform_device evm_dss_device = { > > + .name = "omap-dss", > > + .id = -1, > > + .dev = { > > + .platform_data = &evm_dss_data, > > + }, > > }; > > > > static void ads7846_dev_init(void) > > @@ -227,11 +430,13 @@ static void __init omap3_evm_init_irq(void) > > > > static struct omap_board_config_kernel omap3_evm_config[] > __initdata = { > > { OMAP_TAG_UART, &omap3_evm_uart_config }, > > - { OMAP_TAG_LCD, &omap3_evm_lcd_config }, > > + { OMAP_TAG_FBMEM, &evm_fbmem0_config }, > > + { OMAP_TAG_FBMEM, &evm_fbmem1_config }, > > + { OMAP_TAG_FBMEM, &evm_fbmem2_config }, > > }; > > > > static struct platform_device *omap3_evm_devices[] __initdata = { > > - &omap3_evm_lcd_device, > > + &evm_dss_device, > > &omap3evm_smc911x_device, > > }; > > > > @@ -250,8 +455,6 @@ static void __init omap3_evm_init(void) > > omap3_evm_i2c_init(); > > > > platform_add_devices(omap3_evm_devices, > ARRAY_SIZE(omap3_evm_devices)); > > - omap_board_config = omap3_evm_config; > > - omap_board_config_size = ARRAY_SIZE(omap3_evm_config); > > > > spi_register_board_info(omap3evm_spi_board_info, > > ARRAY_SIZE(omap3evm_spi_board_info)); > > @@ -262,10 +465,13 @@ static void __init omap3_evm_init(void) > > usb_ehci_init(); > > omap3evm_flash_init(); > > ads7846_dev_init(); > > + evm_display_init(); > > } > > > > static void __init omap3_evm_map_io(void) > > { > > + omap_board_config = omap3_evm_config; > > + omap_board_config_size = ARRAY_SIZE(omap3_evm_config); > > omap2_set_globals_343x(); > > omap2_map_common_io(); > > } > > diff --git a/drivers/video/omap2/Kconfig > b/drivers/video/omap2/Kconfig > > index 95691ad..8211ffd 100644 > > --- a/drivers/video/omap2/Kconfig > > +++ b/drivers/video/omap2/Kconfig > > @@ -51,4 +51,9 @@ config PANEL_SDP3430 > > help > > SDP3430 LCD > > > > +config PANEL_OMAP3EVM > > + tristate "OMAP3EVM Panel" > > + depends on OMAP2_DSS > > + help > > + OMAP3EVM LCD Panel > > endmenu > > diff --git a/drivers/video/omap2/Makefile > b/drivers/video/omap2/Makefile > > index 73ab1c0..668e8c6 100644 > > --- a/drivers/video/omap2/Makefile > > +++ b/drivers/video/omap2/Makefile > > @@ -3,3 +3,4 @@ omapfb-y := omapfb-main.o omapfb-sysfs.o omapfb- > ioctl.o > > > > obj-$(CONFIG_PANEL_DVI) += panel-dvi.o > > obj-$(CONFIG_PANEL_SDP3430) += panel-sdp3430.o > > +obj-$(CONFIG_PANEL_OMAP3EVM) += panel-omap3evm.o > > diff --git a/drivers/video/omap2/panel-dvi.c > b/drivers/video/omap2/panel-dvi.c > > index 2d053df..2a52897 100644 > > --- a/drivers/video/omap2/panel-dvi.c > > +++ b/drivers/video/omap2/panel-dvi.c > > @@ -52,54 +52,20 @@ static struct omap_panel dvi_panel = { > > .disable = dvi_panel_disable, > > /*.set_mode = dvi_set_mode, */ > > > > -#if defined(CONFIG_PANEL_DVI_LOWRES) > > .timings = { > > - /* 800 x 600 @ 60 Hz Reduced blanking VESA CVT 0.48M3-R > */ > > - .pixel_clock = 35500, > > - .hfp = 48, > > - .hsw = 32, > > - .hbp = 80, > > - .vfp = 3, > > - .vsw = 4, > > - .vbp = 11, > > + /* 480P */ > > + .pixel_clock = 30000, > > + .hfp = 24, > > + .hsw = 40, > > + .hbp = 96, > > + .vfp = 10, > > + .vsw = 3, > > + .vbp = 32, > > }, > > > > - .x_res = 800, > > - .y_res = 600, > > + .x_res = 480, > > + .y_res = 720, > > .bpp = 24, > > -#elif defined(CONFIG_PANEL_DVI_HIGHRES) > > - .timings = { > > - /* 1024 x 768 @ 60 Hz Reduced blanking */ > > - .pixel_clock = 56000, > > - .hfp = 48, > > - .hsw = 32, > > - .hbp = 80, > > - .vfp = 3, > > - .vsw = 4, > > - .vbp = 15, > > - }, > > - > > - .x_res = 1024, > > - .y_res = 768, > > - .bpp = 24, > > -#elif defined(CONFIG_PANEL_DVI_VERYHIGHRES) > > - .timings = { > > - /* 1280 x 1024 @ 57 Hz Reduced blanking */ > > - .pixel_clock = 86500, > > - .hfp = 48, > > - .hsw = 32, > > - .hbp = 80, > > - .vfp = 3, > > - .vsw = 4, > > - .vbp = 15, > > - }, > > - > > - .x_res = 1280, > > - .y_res = 1024, > > - .bpp = 16, > > -#else > > -#error Undefined default mode > > -#endif > > > > .config = OMAP_DSS_LCD_TFT, > > }; > > diff --git a/drivers/video/omap2/panel-omap3evm.c > b/drivers/video/omap2/panel-omap3evm.c > > new file mode 100644 > > index 0000000..4a00b02 > > --- /dev/null > > +++ b/drivers/video/omap2/panel-omap3evm.c > > @@ -0,0 +1,110 @@ > > +/* > > + * LCD panel support for the TI OMAP3EVM board > > + * > > + * Copyright (C) 2008 Texas Instruments, Inc. > > + * Author: Vaibhav Hiremath <hva...@ti...> > > + * > > + * Derived from drivers/video/omap2/panel-sdp3430.c > > + * > > + * This program is free software; you can redistribute it and/or > modify it > > + * under the terms of the GNU General Public License version 2 as > published by > > + * the Free Software Foundation. > > + * > > + * This program is distributed in the hope that it will be > useful, but WITHOUT > > + * ANY WARRANTY; without even the implied warranty of > MERCHANTABILITY or > > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public > License for > > + * more details. > > + * > > + * You should have received a copy of the GNU General Public > License along with > > + * this program. If not, see <http://www.gnu.org/licenses/>. > > + */ > > + > > +#include <linux/module.h> > > +#include <linux/delay.h> > > + > > +#include <mach/display.h> > > + > > +static int omap3evm_panel_init(struct omap_display *display) > > +{ > > + return 0; > > +} > > + > > +static void omap3evm_panel_cleanup(struct omap_display *display) > > +{ > > +} > > + > > +static int omap3evm_panel_enable(struct omap_display *display) > > +{ > > + int r = 0; > > + > > + if (display->hw_config.panel_enable) > > + r = display->hw_config.panel_enable(display); > > + > > + return r; > > +} > > + > > +static void omap3evm_panel_disable(struct omap_display *display) > > +{ > > + if (display->hw_config.panel_disable) > > + display->hw_config.panel_disable(display); > > +} > > + > > +static int omap3evm_panel_suspend(struct omap_display *display) > > +{ > > + omap3evm_panel_disable(display); > > + return 0; > > +} > > + > > +static int omap3evm_panel_resume(struct omap_display *display) > > +{ > > + return omap3evm_panel_enable(display); > > +} > > + > > +static struct omap_panel omap3evm_panel = { > > + .owner = THIS_MODULE, > > + .name = "panel-evm", > > + .init = omap3evm_panel_init, > > + .cleanup = omap3evm_panel_cleanup, > > + .enable = omap3evm_panel_enable, > > + .disable = omap3evm_panel_disable, > > + .suspend = omap3evm_panel_suspend, > > + .resume = omap3evm_panel_resume, > > + /*.set_mode = omap3evm_set_mode, */ > > + > > + .timings = { > > + .pixel_clock = 26000, > > + > > + .hsw = 4, > > + .hfp = 4, > > + .hbp = 40, > > + > > + .vsw = 2, > > + .vfp = 2, > > + .vbp = 7, > > + }, > > + > > + .acb = 0x28, > > + > > + .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | > > + OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IPC, > > + > > + .x_res = 480, > > + .y_res = 640, > > + .bpp = 18, > > +}; > > + > > + > > +static int __init omap3evm_panel_drv_init(void) > > +{ > > + omap_dss_register_panel(&omap3evm_panel); > > + return 0; > > +} > > + > > +static void __exit omap3evm_panel_drv_exit(void) > > +{ > > + omap_dss_unregister_panel(&omap3evm_panel); > > +} > > + > > +module_init(omap3evm_panel_drv_init); > > +module_exit(omap3evm_panel_drv_exit); > > +MODULE_LICENSE("GPL"); > > -- > > 1.5.6 > > > > -- > > To unsubscribe from this list: send the line "unsubscribe linux- > omap" in > > the body of a message to maj...@vg... > > More majordomo info at http://vger.kernel.org/majordomo-info.html > |
From: Hiremath, V. <hva...@ti...> - 2008-11-14 13:53:58
|
Thanks, Vaibhav Hiremath > -----Original Message----- > From: lin...@vg... [mailto:linux-omap- > ow...@vg...] On Behalf Of Hiremath, Vaibhav > Sent: Friday, November 14, 2008 6:06 PM > To: Tomi Valkeinen > Cc: lin...@li...; linux- > om...@vg... > Subject: RE: [REVIEW PATCH] Added OMAP3EVM support on Tomis > FBDEV/DSS Patches > > > > Thanks, > Vaibhav Hiremath > > > -----Original Message----- > > From: Tomi Valkeinen [mailto:tom...@no...] > > Sent: Friday, November 14, 2008 4:24 PM > > To: Hiremath, Vaibhav > > Cc: lin...@li...; linux- > > om...@vg... > > Subject: Re: [REVIEW PATCH] Added OMAP3EVM support on Tomis > > FBDEV/DSS Patches > > > > Hi, > > > > On Fri, 2008-11-14 at 12:02 +0530, ext hva...@ti... wrote: > > > From: Vaibhav Hiremath <hva...@ti...> > > > > > > Tested LCD, TV, DVI (480P) out on OMAP3EVM board. > > > > > > Please make sure that you change the option > > > CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=7 and apply the > > > Mans Rullgard clock patches to support set_rate and round_rate > > API. > > > > > > Signed-off-by: Vaibhav Hiremath <hva...@ti...> > > > > I think the LCD panel on SDP and EVM boards are the same, so we > > should > > only have one driver. Do you have specifications about the LCD? > The > > manufacturer, model etc?. I didn't find any proper information > about > > the > > LCD. > > > [Hiremath, Vaibhav] The LCD on OMAP3EVM is Sharp LCD (Model No. - > LS037V7DW01). > Koen has already conformed that panel3430sdp.c is working with > OMAP3EVM, let me try at my end. If it works properly then we can > have same file to build for both SDP and EVM. But in that case it > make sense to rename file to panel-lcd.c. > [Hiremath, Vaibhav] I have tested the panel-sdp3430.c file with OMAP3EVM file and it is working for me. No need to add one more file here. Let me check the bpp part of it, I am not sure at this moment. > > The #ifdef mode selection in DVI panel is quit hack, I agree. The > > mode > > selection should be possible to be done runtime (or with kernel > boot > > option at minimum), but I'm not yet sure how to implement it. But > I > > guess I could at least name the mode config options a bit better. > > > [Hiremath, Vaibhav] We will also work on this and let you know. > > > You also set the LCD's bpp to 18, why is that? The bpp in panel > > driver > > is currently only used as a default bpp for omapfb, but there's no > > 18bpp > > mode in OMAP. For some reason omapfb let's the 18bpp through, but > it > > acts like it is 16bpp. I can't remember why it does that, I think > > I'll > > remove it from omapfb. > > > [Hiremath, Vaibhav] LCD panel connected to OMAP3EVM is 18 bit LCD, > the interface is also 18 bit in schematics. I am not sure about SDP > board though. > > > Tomi > > > > > > > --- > > > arch/arm/mach-omap2/board-omap3evm.c | 224 > > ++++++++++++++++++++++++++++++++-- > > > drivers/video/omap2/Kconfig | 5 + > > > drivers/video/omap2/Makefile | 1 + > > > drivers/video/omap2/panel-dvi.c | 54 ++------- > > > drivers/video/omap2/panel-omap3evm.c | 110 +++++++++++++++++ > > > 5 files changed, 341 insertions(+), 53 deletions(-) > > > create mode 100644 drivers/video/omap2/panel-omap3evm.c > > > > > > diff --git a/arch/arm/mach-omap2/board-omap3evm.c > b/arch/arm/mach- > > omap2/board-omap3evm.c > > > index 42ab826..e244fa7 100644 > > > --- a/arch/arm/mach-omap2/board-omap3evm.c > > > +++ b/arch/arm/mach-omap2/board-omap3evm.c > > > @@ -37,6 +37,8 @@ > > > #include <mach/usb-ehci.h> > > > #include <mach/common.h> > > > #include <mach/mcspi.h> > > > +#include <mach/omapfb.h> > > > +#include <mach/display.h> > > > > > > #include "sdram-micron-mt46h32m32lf-6.h" > > > #include "twl4030-generic-scripts.h" > > > @@ -161,14 +163,215 @@ static int __init > omap3_evm_i2c_init(void) > > > omap_register_i2c_bus(3, 400, NULL, 0); > > > return 0; > > > } > > > +static struct omap_fbmem_config evm_fbmem0_config = { > > > + .size = 480*720*4, > > > + .start = OMAPFB_MEMTYPE_SDRAM, > > > +}; > > > > > > -static struct platform_device omap3_evm_lcd_device = { > > > - .name = "omap3evm_lcd", > > > - .id = -1, > > > +static struct omap_fbmem_config evm_fbmem1_config = { > > > + .size = 480*720*4, > > > + .start = OMAPFB_MEMTYPE_SDRAM, > > > }; > > > > > > -static struct omap_lcd_config omap3_evm_lcd_config __initdata = > { > > > - .ctrl_name = "internal", > > > +static struct omap_fbmem_config evm_fbmem2_config = { > > > + .size = 480*720*4, > > > + .start = OMAPFB_MEMTYPE_SDRAM, > > > +}; > > > +#define LCD_PANEL_LR 2 > > > +#define LCD_PANEL_UD 3 > > > +#define LCD_PANEL_INI 152 > > > +#define LCD_PANEL_ENABLE_GPIO 153 > > > +#define LCD_PANEL_QVGA 154 > > > +#define LCD_PANEL_RESB 155 > > > + > > > +#define ENABLE_VDAC_DEDICATED 0x03 > > > +#define ENABLE_VDAC_DEV_GRP 0x20 > > > +#define ENABLE_VPLL2_DEDICATED 0x05 > > > +#define ENABLE_VPLL2_DEV_GRP 0xE0 > > > + > > > +#define TWL4030_GPIODATA_IN3 0x03 > > > +#define TWL4030_GPIODATA_DIR3 0x06 > > > +#define TWL4030_VPLL2_DEV_GRP 0x33 > > > +#define TWL4030_VPLL2_DEDICATED 0x36 > > > + > > > +static int lcd_enabled; > > > +static int dvi_enabled; > > > + > > > +static void __init evm_display_init(void) > > > +{ > > > + int r; > > > + r = gpio_request(LCD_PANEL_LR, "lcd_panel_lr"); > > > + if (r) { > > > + printk(KERN_ERR "failed to get LCD_PANEL_LR\n"); > > > + return; > > > + } > > > + r = gpio_request(LCD_PANEL_UD, "lcd_panel_ud"); > > > + if (r) { > > > + printk(KERN_ERR "failed to get LCD_PANEL_UD\n"); > > > + goto err_1; > > > + } > > > + > > > + r = gpio_request(LCD_PANEL_INI, "lcd_panel_ini"); > > > + if (r) { > > > + printk(KERN_ERR "failed to get LCD_PANEL_INI\n"); > > > + goto err_2; > > > + } > > > + r = gpio_request(LCD_PANEL_RESB, "lcd_panel_resb"); > > > + if (r) { > > > + printk(KERN_ERR "failed to get LCD_PANEL_RESB\n"); > > > + goto err_3; > > > + } > > > + r = gpio_request(LCD_PANEL_QVGA, "lcd_panel_qvga"); > > > + if (r) { > > > + printk(KERN_ERR "failed to get LCD_PANEL_QVGA\n"); > > > + goto err_4; > > > + } > > > + > > > + gpio_direction_output(LCD_PANEL_LR, 0); > > > + gpio_direction_output(LCD_PANEL_UD, 0); > > > + gpio_direction_output(LCD_PANEL_INI, 0); > > > + gpio_direction_output(LCD_PANEL_RESB, 0); > > > + gpio_direction_output(LCD_PANEL_QVGA, 0); > > > + > > > +#define TWL_LED_LEDEN 0x00 > > > +#define TWL_PWMA_PWMAON 0x00 > > > +#define TWL_PWMA_PWMAOFF 0x01 > > > + > > > + twl4030_i2c_write_u8(TWL4030_MODULE_LED, 0x11, > TWL_LED_LEDEN); > > > + twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x01, > > TWL_PWMA_PWMAON); > > > + twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x02, > > TWL_PWMA_PWMAOFF); > > > + > > > + gpio_direction_output(LCD_PANEL_RESB, 1); > > > + gpio_direction_output(LCD_PANEL_INI, 1); > > > + gpio_direction_output(LCD_PANEL_QVGA, 0); > > > + gpio_direction_output(LCD_PANEL_LR, 1); > > > + gpio_direction_output(LCD_PANEL_UD, 1); > > > + > > > + return; > > > + > > > +err_4: > > > + gpio_free(LCD_PANEL_RESB); > > > +err_3: > > > + gpio_free(LCD_PANEL_INI); > > > +err_2: > > > + gpio_free(LCD_PANEL_UD); > > > +err_1: > > > + gpio_free(LCD_PANEL_LR); > > > + > > > +} > > > + > > > +static int panel_enable_lcd(struct omap_display *display) > > > +{ > > > + if (dvi_enabled) { > > > + printk(KERN_ERR "cannot enable LCD, DVI is > enabled\n"); > > > + return -EINVAL; > > > + } > > > + if (system_rev > OMAP3430_REV_ES1_0) { > > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > > > + ENABLE_VPLL2_DEDICATED, > TWL4030_VPLL2_DEDICATED); > > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > > > + ENABLE_VPLL2_DEV_GRP, > TWL4030_VPLL2_DEV_GRP); > > > + } > > > + gpio_direction_output(LCD_PANEL_ENABLE_GPIO, 0); > > > + lcd_enabled = 1; > > > + return 0; > > > +} > > > + > > > +static void panel_disable_lcd(struct omap_display *display) > > > +{ > > > + if (system_rev > OMAP3430_REV_ES1_0) { > > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > 0x0, > > > + TWL4030_VPLL2_DEDICATED); > > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > 0x0, > > > + TWL4030_VPLL2_DEV_GRP); > > > + } > > > + omap_set_gpio_dataout(LCD_PANEL_ENABLE_GPIO, 1); > > > + lcd_enabled = 0; > > > +} > > > + > > > +static struct omap_display_data evm_display_data = { > > > + .type = OMAP_DISPLAY_TYPE_DPI, > > > + .name = "lcd", > > > + .panel_name = "panel-evm", > > > + .u.dpi.data_lines = 16, > > > + .panel_enable = panel_enable_lcd, > > > + .panel_disable = panel_disable_lcd, > > > +}; > > > + > > > +static int panel_enable_tv(struct omap_display *display) > > > +{ > > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > > > + ENABLE_VDAC_DEDICATED, > TWL4030_VDAC_DEDICATED); > > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > > > + ENABLE_VDAC_DEV_GRP, TWL4030_VDAC_DEV_GRP); > > > + return 0; > > > +} > > > + > > > +static void panel_disable_tv(struct omap_display *display) > > > +{ > > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00, > > > + TWL4030_VDAC_DEDICATED); > > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00, > > > + TWL4030_VDAC_DEV_GRP); > > > +} > > > + > > > +static struct omap_display_data evm_display_data_tv = { > > > + .type = OMAP_DISPLAY_TYPE_VENC, > > > + .name = "tv", > > > + .u.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, > > > + .panel_enable = panel_enable_tv, > > > + .panel_disable = panel_disable_tv, > > > +}; > > > + > > > + > > > +static int panel_enable_dvi(struct omap_display *display) > > > +{ > > > + if (lcd_enabled) { > > > + printk(KERN_ERR "cannot enable DVI, LCD is > enabled\n"); > > > + return -EINVAL; > > > + } > > > + twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, > > > + TWL4030_GPIODATA_IN3); > > > + twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, > > > + TWL4030_GPIODATA_DIR3); > > > + dvi_enabled = 1; > > > + > > > + return 0; > > > +} > > > + > > > +static void panel_disable_dvi(struct omap_display *display) > > > +{ > > > + twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x00, > > > + TWL4030_GPIODATA_IN3); > > > + twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x00, > > > + TWL4030_GPIODATA_DIR3); > > > + dvi_enabled = 0; > > > +} > > > + > > > + > > > +static struct omap_display_data evm_display_data_dvi = { > > > + .type = OMAP_DISPLAY_TYPE_DPI, > > > + .name = "dvi", > > > + .panel_name = "panel-dvi", > > > + .u.dpi.data_lines = 24, > > > + .panel_enable = panel_enable_dvi, > > > + .panel_disable = panel_disable_dvi, > > > +}; > > > + > > > +static struct omap_dss_platform_data evm_dss_data = { > > > + .num_displays = 3, > > > + .displays = { > > > + &evm_display_data, > > > + &evm_display_data_dvi, > > > + &evm_display_data_tv, > > > + } > > > +}; > > > +static struct platform_device evm_dss_device = { > > > + .name = "omap-dss", > > > + .id = -1, > > > + .dev = { > > > + .platform_data = &evm_dss_data, > > > + }, > > > }; > > > > > > static void ads7846_dev_init(void) > > > @@ -227,11 +430,13 @@ static void __init > omap3_evm_init_irq(void) > > > > > > static struct omap_board_config_kernel omap3_evm_config[] > > __initdata = { > > > { OMAP_TAG_UART, &omap3_evm_uart_config }, > > > - { OMAP_TAG_LCD, &omap3_evm_lcd_config }, > > > + { OMAP_TAG_FBMEM, &evm_fbmem0_config }, > > > + { OMAP_TAG_FBMEM, &evm_fbmem1_config }, > > > + { OMAP_TAG_FBMEM, &evm_fbmem2_config }, > > > }; > > > > > > static struct platform_device *omap3_evm_devices[] __initdata = > { > > > - &omap3_evm_lcd_device, > > > + &evm_dss_device, > > > &omap3evm_smc911x_device, > > > }; > > > > > > @@ -250,8 +455,6 @@ static void __init omap3_evm_init(void) > > > omap3_evm_i2c_init(); > > > > > > platform_add_devices(omap3_evm_devices, > > ARRAY_SIZE(omap3_evm_devices)); > > > - omap_board_config = omap3_evm_config; > > > - omap_board_config_size = ARRAY_SIZE(omap3_evm_config); > > > > > > spi_register_board_info(omap3evm_spi_board_info, > > > > ARRAY_SIZE(omap3evm_spi_board_info)); > > > @@ -262,10 +465,13 @@ static void __init omap3_evm_init(void) > > > usb_ehci_init(); > > > omap3evm_flash_init(); > > > ads7846_dev_init(); > > > + evm_display_init(); > > > } > > > > > > static void __init omap3_evm_map_io(void) > > > { > > > + omap_board_config = omap3_evm_config; > > > + omap_board_config_size = ARRAY_SIZE(omap3_evm_config); > > > omap2_set_globals_343x(); > > > omap2_map_common_io(); > > > } > > > diff --git a/drivers/video/omap2/Kconfig > > b/drivers/video/omap2/Kconfig > > > index 95691ad..8211ffd 100644 > > > --- a/drivers/video/omap2/Kconfig > > > +++ b/drivers/video/omap2/Kconfig > > > @@ -51,4 +51,9 @@ config PANEL_SDP3430 > > > help > > > SDP3430 LCD > > > > > > +config PANEL_OMAP3EVM > > > + tristate "OMAP3EVM Panel" > > > + depends on OMAP2_DSS > > > + help > > > + OMAP3EVM LCD Panel > > > endmenu > > > diff --git a/drivers/video/omap2/Makefile > > b/drivers/video/omap2/Makefile > > > index 73ab1c0..668e8c6 100644 > > > --- a/drivers/video/omap2/Makefile > > > +++ b/drivers/video/omap2/Makefile > > > @@ -3,3 +3,4 @@ omapfb-y := omapfb-main.o omapfb-sysfs.o omapfb- > > ioctl.o > > > > > > obj-$(CONFIG_PANEL_DVI) += panel-dvi.o > > > obj-$(CONFIG_PANEL_SDP3430) += panel-sdp3430.o > > > +obj-$(CONFIG_PANEL_OMAP3EVM) += panel-omap3evm.o > > > diff --git a/drivers/video/omap2/panel-dvi.c > > b/drivers/video/omap2/panel-dvi.c > > > index 2d053df..2a52897 100644 > > > --- a/drivers/video/omap2/panel-dvi.c > > > +++ b/drivers/video/omap2/panel-dvi.c > > > @@ -52,54 +52,20 @@ static struct omap_panel dvi_panel = { > > > .disable = dvi_panel_disable, > > > /*.set_mode = dvi_set_mode, */ > > > > > > -#if defined(CONFIG_PANEL_DVI_LOWRES) > > > .timings = { > > > - /* 800 x 600 @ 60 Hz Reduced blanking VESA CVT > 0.48M3-R > > */ > > > - .pixel_clock = 35500, > > > - .hfp = 48, > > > - .hsw = 32, > > > - .hbp = 80, > > > - .vfp = 3, > > > - .vsw = 4, > > > - .vbp = 11, > > > + /* 480P */ > > > + .pixel_clock = 30000, > > > + .hfp = 24, > > > + .hsw = 40, > > > + .hbp = 96, > > > + .vfp = 10, > > > + .vsw = 3, > > > + .vbp = 32, > > > }, > > > > > > - .x_res = 800, > > > - .y_res = 600, > > > + .x_res = 480, > > > + .y_res = 720, > > > .bpp = 24, > > > -#elif defined(CONFIG_PANEL_DVI_HIGHRES) > > > - .timings = { > > > - /* 1024 x 768 @ 60 Hz Reduced blanking */ > > > - .pixel_clock = 56000, > > > - .hfp = 48, > > > - .hsw = 32, > > > - .hbp = 80, > > > - .vfp = 3, > > > - .vsw = 4, > > > - .vbp = 15, > > > - }, > > > - > > > - .x_res = 1024, > > > - .y_res = 768, > > > - .bpp = 24, > > > -#elif defined(CONFIG_PANEL_DVI_VERYHIGHRES) > > > - .timings = { > > > - /* 1280 x 1024 @ 57 Hz Reduced blanking */ > > > - .pixel_clock = 86500, > > > - .hfp = 48, > > > - .hsw = 32, > > > - .hbp = 80, > > > - .vfp = 3, > > > - .vsw = 4, > > > - .vbp = 15, > > > - }, > > > - > > > - .x_res = 1280, > > > - .y_res = 1024, > > > - .bpp = 16, > > > -#else > > > -#error Undefined default mode > > > -#endif > > > > > > .config = OMAP_DSS_LCD_TFT, > > > }; > > > diff --git a/drivers/video/omap2/panel-omap3evm.c > > b/drivers/video/omap2/panel-omap3evm.c > > > new file mode 100644 > > > index 0000000..4a00b02 > > > --- /dev/null > > > +++ b/drivers/video/omap2/panel-omap3evm.c > > > @@ -0,0 +1,110 @@ > > > +/* > > > + * LCD panel support for the TI OMAP3EVM board > > > + * > > > + * Copyright (C) 2008 Texas Instruments, Inc. > > > + * Author: Vaibhav Hiremath <hva...@ti...> > > > + * > > > + * Derived from drivers/video/omap2/panel-sdp3430.c > > > + * > > > + * This program is free software; you can redistribute it > and/or > > modify it > > > + * under the terms of the GNU General Public License version 2 > as > > published by > > > + * the Free Software Foundation. > > > + * > > > + * This program is distributed in the hope that it will be > > useful, but WITHOUT > > > + * ANY WARRANTY; without even the implied warranty of > > MERCHANTABILITY or > > > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General > Public > > License for > > > + * more details. > > > + * > > > + * You should have received a copy of the GNU General Public > > License along with > > > + * this program. If not, see <http://www.gnu.org/licenses/>. > > > + */ > > > + > > > +#include <linux/module.h> > > > +#include <linux/delay.h> > > > + > > > +#include <mach/display.h> > > > + > > > +static int omap3evm_panel_init(struct omap_display *display) > > > +{ > > > + return 0; > > > +} > > > + > > > +static void omap3evm_panel_cleanup(struct omap_display > *display) > > > +{ > > > +} > > > + > > > +static int omap3evm_panel_enable(struct omap_display *display) > > > +{ > > > + int r = 0; > > > + > > > + if (display->hw_config.panel_enable) > > > + r = display->hw_config.panel_enable(display); > > > + > > > + return r; > > > +} > > > + > > > +static void omap3evm_panel_disable(struct omap_display > *display) > > > +{ > > > + if (display->hw_config.panel_disable) > > > + display->hw_config.panel_disable(display); > > > +} > > > + > > > +static int omap3evm_panel_suspend(struct omap_display *display) > > > +{ > > > + omap3evm_panel_disable(display); > > > + return 0; > > > +} > > > + > > > +static int omap3evm_panel_resume(struct omap_display *display) > > > +{ > > > + return omap3evm_panel_enable(display); > > > +} > > > + > > > +static struct omap_panel omap3evm_panel = { > > > + .owner = THIS_MODULE, > > > + .name = "panel-evm", > > > + .init = omap3evm_panel_init, > > > + .cleanup = omap3evm_panel_cleanup, > > > + .enable = omap3evm_panel_enable, > > > + .disable = omap3evm_panel_disable, > > > + .suspend = omap3evm_panel_suspend, > > > + .resume = omap3evm_panel_resume, > > > + /*.set_mode = omap3evm_set_mode, */ > > > + > > > + .timings = { > > > + .pixel_clock = 26000, > > > + > > > + .hsw = 4, > > > + .hfp = 4, > > > + .hbp = 40, > > > + > > > + .vsw = 2, > > > + .vfp = 2, > > > + .vbp = 7, > > > + }, > > > + > > > + .acb = 0x28, > > > + > > > + .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | > > > + OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IPC, > > > + > > > + .x_res = 480, > > > + .y_res = 640, > > > + .bpp = 18, > > > +}; > > > + > > > + > > > +static int __init omap3evm_panel_drv_init(void) > > > +{ > > > + omap_dss_register_panel(&omap3evm_panel); > > > + return 0; > > > +} > > > + > > > +static void __exit omap3evm_panel_drv_exit(void) > > > +{ > > > + omap_dss_unregister_panel(&omap3evm_panel); > > > +} > > > + > > > +module_init(omap3evm_panel_drv_init); > > > +module_exit(omap3evm_panel_drv_exit); > > > +MODULE_LICENSE("GPL"); > > > -- > > > 1.5.6 > > > > > > -- > > > To unsubscribe from this list: send the line "unsubscribe linux- > > omap" in > > > the body of a message to maj...@vg... > > > More majordomo info at http://vger.kernel.org/majordomo- > info.html > > > > -- > To unsubscribe from this list: send the line "unsubscribe linux- > omap" in > the body of a message to maj...@vg... > More majordomo info at http://vger.kernel.org/majordomo-info.html |
From: Tomi V. <tom...@no...> - 2008-11-14 15:54:33
|
Hi, On Fri, 2008-11-14 at 18:05 +0530, ext Hiremath, Vaibhav wrote: > > > > I think the LCD panel on SDP and EVM boards are the same, so we > > should > > only have one driver. Do you have specifications about the LCD? The > > manufacturer, model etc?. I didn't find any proper information about > > the > > LCD. > > > [Hiremath, Vaibhav] The LCD on OMAP3EVM is Sharp LCD (Model No. - LS037V7DW01). > Koen has already conformed that panel3430sdp.c is working with OMAP3EVM, let me try at my end. If it works properly then we can have same file to build for both SDP and EVM. But in that case it make sense to rename file to panel-lcd.c. > I took the liberty to add you EVM changes to my tree, with a comment about the origin. I also changed the SDP panel name to sharp panel, and made both EVM and SDP use that. But I can't test the EVM, as I don't have one. > > The #ifdef mode selection in DVI panel is quit hack, I agree. The > > mode > > selection should be possible to be done runtime (or with kernel boot > > option at minimum), but I'm not yet sure how to implement it. But I > > guess I could at least name the mode config options a bit better. > > > [Hiremath, Vaibhav] We will also work on this and let you know. > > > You also set the LCD's bpp to 18, why is that? The bpp in panel > > driver > > is currently only used as a default bpp for omapfb, but there's no > > 18bpp > > mode in OMAP. For some reason omapfb let's the 18bpp through, but it > > acts like it is 16bpp. I can't remember why it does that, I think > > I'll > > remove it from omapfb. > > > [Hiremath, Vaibhav] LCD panel connected to OMAP3EVM is 18 bit LCD, the interface is also 18 bit in schematics. I am not sure about SDP board though. Then you should change the dpi.data_lines from 16 to 18. On SDP it seems that a dip-switch controls if there are 16 or 18 lines going to the LCD. Although I'm not quite sure what 18bit LCD helps. If you use 16 bit color mode, it doesn't help anything. With 24bit color mode I guess it helps a bit, but is that enough reason use more memory for the framebuffer... Tomi > > Tomi > > > > > > > --- > > > arch/arm/mach-omap2/board-omap3evm.c | 224 > > ++++++++++++++++++++++++++++++++-- > > > drivers/video/omap2/Kconfig | 5 + > > > drivers/video/omap2/Makefile | 1 + > > > drivers/video/omap2/panel-dvi.c | 54 ++------- > > > drivers/video/omap2/panel-omap3evm.c | 110 +++++++++++++++++ > > > 5 files changed, 341 insertions(+), 53 deletions(-) > > > create mode 100644 drivers/video/omap2/panel-omap3evm.c > > > > > > diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach- > > omap2/board-omap3evm.c > > > index 42ab826..e244fa7 100644 > > > --- a/arch/arm/mach-omap2/board-omap3evm.c > > > +++ b/arch/arm/mach-omap2/board-omap3evm.c > > > @@ -37,6 +37,8 @@ > > > #include <mach/usb-ehci.h> > > > #include <mach/common.h> > > > #include <mach/mcspi.h> > > > +#include <mach/omapfb.h> > > > +#include <mach/display.h> > > > > > > #include "sdram-micron-mt46h32m32lf-6.h" > > > #include "twl4030-generic-scripts.h" > > > @@ -161,14 +163,215 @@ static int __init omap3_evm_i2c_init(void) > > > omap_register_i2c_bus(3, 400, NULL, 0); > > > return 0; > > > } > > > +static struct omap_fbmem_config evm_fbmem0_config = { > > > + .size = 480*720*4, > > > + .start = OMAPFB_MEMTYPE_SDRAM, > > > +}; > > > > > > -static struct platform_device omap3_evm_lcd_device = { > > > - .name = "omap3evm_lcd", > > > - .id = -1, > > > +static struct omap_fbmem_config evm_fbmem1_config = { > > > + .size = 480*720*4, > > > + .start = OMAPFB_MEMTYPE_SDRAM, > > > }; > > > > > > -static struct omap_lcd_config omap3_evm_lcd_config __initdata = { > > > - .ctrl_name = "internal", > > > +static struct omap_fbmem_config evm_fbmem2_config = { > > > + .size = 480*720*4, > > > + .start = OMAPFB_MEMTYPE_SDRAM, > > > +}; > > > +#define LCD_PANEL_LR 2 > > > +#define LCD_PANEL_UD 3 > > > +#define LCD_PANEL_INI 152 > > > +#define LCD_PANEL_ENABLE_GPIO 153 > > > +#define LCD_PANEL_QVGA 154 > > > +#define LCD_PANEL_RESB 155 > > > + > > > +#define ENABLE_VDAC_DEDICATED 0x03 > > > +#define ENABLE_VDAC_DEV_GRP 0x20 > > > +#define ENABLE_VPLL2_DEDICATED 0x05 > > > +#define ENABLE_VPLL2_DEV_GRP 0xE0 > > > + > > > +#define TWL4030_GPIODATA_IN3 0x03 > > > +#define TWL4030_GPIODATA_DIR3 0x06 > > > +#define TWL4030_VPLL2_DEV_GRP 0x33 > > > +#define TWL4030_VPLL2_DEDICATED 0x36 > > > + > > > +static int lcd_enabled; > > > +static int dvi_enabled; > > > + > > > +static void __init evm_display_init(void) > > > +{ > > > + int r; > > > + r = gpio_request(LCD_PANEL_LR, "lcd_panel_lr"); > > > + if (r) { > > > + printk(KERN_ERR "failed to get LCD_PANEL_LR\n"); > > > + return; > > > + } > > > + r = gpio_request(LCD_PANEL_UD, "lcd_panel_ud"); > > > + if (r) { > > > + printk(KERN_ERR "failed to get LCD_PANEL_UD\n"); > > > + goto err_1; > > > + } > > > + > > > + r = gpio_request(LCD_PANEL_INI, "lcd_panel_ini"); > > > + if (r) { > > > + printk(KERN_ERR "failed to get LCD_PANEL_INI\n"); > > > + goto err_2; > > > + } > > > + r = gpio_request(LCD_PANEL_RESB, "lcd_panel_resb"); > > > + if (r) { > > > + printk(KERN_ERR "failed to get LCD_PANEL_RESB\n"); > > > + goto err_3; > > > + } > > > + r = gpio_request(LCD_PANEL_QVGA, "lcd_panel_qvga"); > > > + if (r) { > > > + printk(KERN_ERR "failed to get LCD_PANEL_QVGA\n"); > > > + goto err_4; > > > + } > > > + > > > + gpio_direction_output(LCD_PANEL_LR, 0); > > > + gpio_direction_output(LCD_PANEL_UD, 0); > > > + gpio_direction_output(LCD_PANEL_INI, 0); > > > + gpio_direction_output(LCD_PANEL_RESB, 0); > > > + gpio_direction_output(LCD_PANEL_QVGA, 0); > > > + > > > +#define TWL_LED_LEDEN 0x00 > > > +#define TWL_PWMA_PWMAON 0x00 > > > +#define TWL_PWMA_PWMAOFF 0x01 > > > + > > > + twl4030_i2c_write_u8(TWL4030_MODULE_LED, 0x11, TWL_LED_LEDEN); > > > + twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x01, > > TWL_PWMA_PWMAON); > > > + twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x02, > > TWL_PWMA_PWMAOFF); > > > + > > > + gpio_direction_output(LCD_PANEL_RESB, 1); > > > + gpio_direction_output(LCD_PANEL_INI, 1); > > > + gpio_direction_output(LCD_PANEL_QVGA, 0); > > > + gpio_direction_output(LCD_PANEL_LR, 1); > > > + gpio_direction_output(LCD_PANEL_UD, 1); > > > + > > > + return; > > > + > > > +err_4: > > > + gpio_free(LCD_PANEL_RESB); > > > +err_3: > > > + gpio_free(LCD_PANEL_INI); > > > +err_2: > > > + gpio_free(LCD_PANEL_UD); > > > +err_1: > > > + gpio_free(LCD_PANEL_LR); > > > + > > > +} > > > + > > > +static int panel_enable_lcd(struct omap_display *display) > > > +{ > > > + if (dvi_enabled) { > > > + printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); > > > + return -EINVAL; > > > + } > > > + if (system_rev > OMAP3430_REV_ES1_0) { > > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > > > + ENABLE_VPLL2_DEDICATED, TWL4030_VPLL2_DEDICATED); > > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > > > + ENABLE_VPLL2_DEV_GRP, TWL4030_VPLL2_DEV_GRP); > > > + } > > > + gpio_direction_output(LCD_PANEL_ENABLE_GPIO, 0); > > > + lcd_enabled = 1; > > > + return 0; > > > +} > > > + > > > +static void panel_disable_lcd(struct omap_display *display) > > > +{ > > > + if (system_rev > OMAP3430_REV_ES1_0) { > > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x0, > > > + TWL4030_VPLL2_DEDICATED); > > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x0, > > > + TWL4030_VPLL2_DEV_GRP); > > > + } > > > + omap_set_gpio_dataout(LCD_PANEL_ENABLE_GPIO, 1); > > > + lcd_enabled = 0; > > > +} > > > + > > > +static struct omap_display_data evm_display_data = { > > > + .type = OMAP_DISPLAY_TYPE_DPI, > > > + .name = "lcd", > > > + .panel_name = "panel-evm", > > > + .u.dpi.data_lines = 16, > > > + .panel_enable = panel_enable_lcd, > > > + .panel_disable = panel_disable_lcd, > > > +}; > > > + > > > +static int panel_enable_tv(struct omap_display *display) > > > +{ > > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > > > + ENABLE_VDAC_DEDICATED, TWL4030_VDAC_DEDICATED); > > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > > > + ENABLE_VDAC_DEV_GRP, TWL4030_VDAC_DEV_GRP); > > > + return 0; > > > +} > > > + > > > +static void panel_disable_tv(struct omap_display *display) > > > +{ > > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00, > > > + TWL4030_VDAC_DEDICATED); > > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00, > > > + TWL4030_VDAC_DEV_GRP); > > > +} > > > + > > > +static struct omap_display_data evm_display_data_tv = { > > > + .type = OMAP_DISPLAY_TYPE_VENC, > > > + .name = "tv", > > > + .u.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, > > > + .panel_enable = panel_enable_tv, > > > + .panel_disable = panel_disable_tv, > > > +}; > > > + > > > + > > > +static int panel_enable_dvi(struct omap_display *display) > > > +{ > > > + if (lcd_enabled) { > > > + printk(KERN_ERR "cannot enable DVI, LCD is enabled\n"); > > > + return -EINVAL; > > > + } > > > + twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, > > > + TWL4030_GPIODATA_IN3); > > > + twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, > > > + TWL4030_GPIODATA_DIR3); > > > + dvi_enabled = 1; > > > + > > > + return 0; > > > +} > > > + > > > +static void panel_disable_dvi(struct omap_display *display) > > > +{ > > > + twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x00, > > > + TWL4030_GPIODATA_IN3); > > > + twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x00, > > > + TWL4030_GPIODATA_DIR3); > > > + dvi_enabled = 0; > > > +} > > > + > > > + > > > +static struct omap_display_data evm_display_data_dvi = { > > > + .type = OMAP_DISPLAY_TYPE_DPI, > > > + .name = "dvi", > > > + .panel_name = "panel-dvi", > > > + .u.dpi.data_lines = 24, > > > + .panel_enable = panel_enable_dvi, > > > + .panel_disable = panel_disable_dvi, > > > +}; > > > + > > > +static struct omap_dss_platform_data evm_dss_data = { > > > + .num_displays = 3, > > > + .displays = { > > > + &evm_display_data, > > > + &evm_display_data_dvi, > > > + &evm_display_data_tv, > > > + } > > > +}; > > > +static struct platform_device evm_dss_device = { > > > + .name = "omap-dss", > > > + .id = -1, > > > + .dev = { > > > + .platform_data = &evm_dss_data, > > > + }, > > > }; > > > > > > static void ads7846_dev_init(void) > > > @@ -227,11 +430,13 @@ static void __init omap3_evm_init_irq(void) > > > > > > static struct omap_board_config_kernel omap3_evm_config[] > > __initdata = { > > > { OMAP_TAG_UART, &omap3_evm_uart_config }, > > > - { OMAP_TAG_LCD, &omap3_evm_lcd_config }, > > > + { OMAP_TAG_FBMEM, &evm_fbmem0_config }, > > > + { OMAP_TAG_FBMEM, &evm_fbmem1_config }, > > > + { OMAP_TAG_FBMEM, &evm_fbmem2_config }, > > > }; > > > > > > static struct platform_device *omap3_evm_devices[] __initdata = { > > > - &omap3_evm_lcd_device, > > > + &evm_dss_device, > > > &omap3evm_smc911x_device, > > > }; > > > > > > @@ -250,8 +455,6 @@ static void __init omap3_evm_init(void) > > > omap3_evm_i2c_init(); > > > > > > platform_add_devices(omap3_evm_devices, > > ARRAY_SIZE(omap3_evm_devices)); > > > - omap_board_config = omap3_evm_config; > > > - omap_board_config_size = ARRAY_SIZE(omap3_evm_config); > > > > > > spi_register_board_info(omap3evm_spi_board_info, > > > ARRAY_SIZE(omap3evm_spi_board_info)); > > > @@ -262,10 +465,13 @@ static void __init omap3_evm_init(void) > > > usb_ehci_init(); > > > omap3evm_flash_init(); > > > ads7846_dev_init(); > > > + evm_display_init(); > > > } > > > > > > static void __init omap3_evm_map_io(void) > > > { > > > + omap_board_config = omap3_evm_config; > > > + omap_board_config_size = ARRAY_SIZE(omap3_evm_config); > > > omap2_set_globals_343x(); > > > omap2_map_common_io(); > > > } > > > diff --git a/drivers/video/omap2/Kconfig > > b/drivers/video/omap2/Kconfig > > > index 95691ad..8211ffd 100644 > > > --- a/drivers/video/omap2/Kconfig > > > +++ b/drivers/video/omap2/Kconfig > > > @@ -51,4 +51,9 @@ config PANEL_SDP3430 > > > help > > > SDP3430 LCD > > > > > > +config PANEL_OMAP3EVM > > > + tristate "OMAP3EVM Panel" > > > + depends on OMAP2_DSS > > > + help > > > + OMAP3EVM LCD Panel > > > endmenu > > > diff --git a/drivers/video/omap2/Makefile > > b/drivers/video/omap2/Makefile > > > index 73ab1c0..668e8c6 100644 > > > --- a/drivers/video/omap2/Makefile > > > +++ b/drivers/video/omap2/Makefile > > > @@ -3,3 +3,4 @@ omapfb-y := omapfb-main.o omapfb-sysfs.o omapfb- > > ioctl.o > > > > > > obj-$(CONFIG_PANEL_DVI) += panel-dvi.o > > > obj-$(CONFIG_PANEL_SDP3430) += panel-sdp3430.o > > > +obj-$(CONFIG_PANEL_OMAP3EVM) += panel-omap3evm.o > > > diff --git a/drivers/video/omap2/panel-dvi.c > > b/drivers/video/omap2/panel-dvi.c > > > index 2d053df..2a52897 100644 > > > --- a/drivers/video/omap2/panel-dvi.c > > > +++ b/drivers/video/omap2/panel-dvi.c > > > @@ -52,54 +52,20 @@ static struct omap_panel dvi_panel = { > > > .disable = dvi_panel_disable, > > > /*.set_mode = dvi_set_mode, */ > > > > > > -#if defined(CONFIG_PANEL_DVI_LOWRES) > > > .timings = { > > > - /* 800 x 600 @ 60 Hz Reduced blanking VESA CVT 0.48M3-R > > */ > > > - .pixel_clock = 35500, > > > - .hfp = 48, > > > - .hsw = 32, > > > - .hbp = 80, > > > - .vfp = 3, > > > - .vsw = 4, > > > - .vbp = 11, > > > + /* 480P */ > > > + .pixel_clock = 30000, > > > + .hfp = 24, > > > + .hsw = 40, > > > + .hbp = 96, > > > + .vfp = 10, > > > + .vsw = 3, > > > + .vbp = 32, > > > }, > > > > > > - .x_res = 800, > > > - .y_res = 600, > > > + .x_res = 480, > > > + .y_res = 720, > > > .bpp = 24, > > > -#elif defined(CONFIG_PANEL_DVI_HIGHRES) > > > - .timings = { > > > - /* 1024 x 768 @ 60 Hz Reduced blanking */ > > > - .pixel_clock = 56000, > > > - .hfp = 48, > > > - .hsw = 32, > > > - .hbp = 80, > > > - .vfp = 3, > > > - .vsw = 4, > > > - .vbp = 15, > > > - }, > > > - > > > - .x_res = 1024, > > > - .y_res = 768, > > > - .bpp = 24, > > > -#elif defined(CONFIG_PANEL_DVI_VERYHIGHRES) > > > - .timings = { > > > - /* 1280 x 1024 @ 57 Hz Reduced blanking */ > > > - .pixel_clock = 86500, > > > - .hfp = 48, > > > - .hsw = 32, > > > - .hbp = 80, > > > - .vfp = 3, > > > - .vsw = 4, > > > - .vbp = 15, > > > - }, > > > - > > > - .x_res = 1280, > > > - .y_res = 1024, > > > - .bpp = 16, > > > -#else > > > -#error Undefined default mode > > > -#endif > > > > > > .config = OMAP_DSS_LCD_TFT, > > > }; > > > diff --git a/drivers/video/omap2/panel-omap3evm.c > > b/drivers/video/omap2/panel-omap3evm.c > > > new file mode 100644 > > > index 0000000..4a00b02 > > > --- /dev/null > > > +++ b/drivers/video/omap2/panel-omap3evm.c > > > @@ -0,0 +1,110 @@ > > > +/* > > > + * LCD panel support for the TI OMAP3EVM board > > > + * > > > + * Copyright (C) 2008 Texas Instruments, Inc. > > > + * Author: Vaibhav Hiremath <hva...@ti...> > > > + * > > > + * Derived from drivers/video/omap2/panel-sdp3430.c > > > + * > > > + * This program is free software; you can redistribute it and/or > > modify it > > > + * under the terms of the GNU General Public License version 2 as > > published by > > > + * the Free Software Foundation. > > > + * > > > + * This program is distributed in the hope that it will be > > useful, but WITHOUT > > > + * ANY WARRANTY; without even the implied warranty of > > MERCHANTABILITY or > > > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public > > License for > > > + * more details. > > > + * > > > + * You should have received a copy of the GNU General Public > > License along with > > > + * this program. If not, see <http://www.gnu.org/licenses/>. > > > + */ > > > + > > > +#include <linux/module.h> > > > +#include <linux/delay.h> > > > + > > > +#include <mach/display.h> > > > + > > > +static int omap3evm_panel_init(struct omap_display *display) > > > +{ > > > + return 0; > > > +} > > > + > > > +static void omap3evm_panel_cleanup(struct omap_display *display) > > > +{ > > > +} > > > + > > > +static int omap3evm_panel_enable(struct omap_display *display) > > > +{ > > > + int r = 0; > > > + > > > + if (display->hw_config.panel_enable) > > > + r = display->hw_config.panel_enable(display); > > > + > > > + return r; > > > +} > > > + > > > +static void omap3evm_panel_disable(struct omap_display *display) > > > +{ > > > + if (display->hw_config.panel_disable) > > > + display->hw_config.panel_disable(display); > > > +} > > > + > > > +static int omap3evm_panel_suspend(struct omap_display *display) > > > +{ > > > + omap3evm_panel_disable(display); > > > + return 0; > > > +} > > > + > > > +static int omap3evm_panel_resume(struct omap_display *display) > > > +{ > > > + return omap3evm_panel_enable(display); > > > +} > > > + > > > +static struct omap_panel omap3evm_panel = { > > > + .owner = THIS_MODULE, > > > + .name = "panel-evm", > > > + .init = omap3evm_panel_init, > > > + .cleanup = omap3evm_panel_cleanup, > > > + .enable = omap3evm_panel_enable, > > > + .disable = omap3evm_panel_disable, > > > + .suspend = omap3evm_panel_suspend, > > > + .resume = omap3evm_panel_resume, > > > + /*.set_mode = omap3evm_set_mode, */ > > > + > > > + .timings = { > > > + .pixel_clock = 26000, > > > + > > > + .hsw = 4, > > > + .hfp = 4, > > > + .hbp = 40, > > > + > > > + .vsw = 2, > > > + .vfp = 2, > > > + .vbp = 7, > > > + }, > > > + > > > + .acb = 0x28, > > > + > > > + .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | > > > + OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IPC, > > > + > > > + .x_res = 480, > > > + .y_res = 640, > > > + .bpp = 18, > > > +}; > > > + > > > + > > > +static int __init omap3evm_panel_drv_init(void) > > > +{ > > > + omap_dss_register_panel(&omap3evm_panel); > > > + return 0; > > > +} > > > + > > > +static void __exit omap3evm_panel_drv_exit(void) > > > +{ > > > + omap_dss_unregister_panel(&omap3evm_panel); > > > +} > > > + > > > +module_init(omap3evm_panel_drv_init); > > > +module_exit(omap3evm_panel_drv_exit); > > > +MODULE_LICENSE("GPL"); > > > -- > > > 1.5.6 > > > > > > -- > > > To unsubscribe from this list: send the line "unsubscribe linux- > > omap" in > > > the body of a message to maj...@vg... > > > More majordomo info at http://vger.kernel.org/majordomo-info.html > > > |
From: Koen K. <k....@st...> - 2008-11-14 19:45:02
Attachments:
PGP.sig
|
Op 14 nov 2008, om 16:53 heeft Tomi Valkeinen het volgende geschreven: > Hi, > On Fri, 2008-11-14 at 18:05 +0530, ext Hiremath, Vaibhav wrote: > >>> >>> I think the LCD panel on SDP and EVM boards are the same, so we >>> should >>> only have one driver. Do you have specifications about the LCD? The >>> manufacturer, model etc?. I didn't find any proper information about >>> the >>> LCD. >>> >> [Hiremath, Vaibhav] The LCD on OMAP3EVM is Sharp LCD (Model No. - >> LS037V7DW01). >> Koen has already conformed that panel3430sdp.c is working with >> OMAP3EVM, let me try at my end. If it works properly then we can >> have same file to build for both SDP and EVM. But in that case it >> make sense to rename file to panel-lcd.c. >> > > I took the liberty to add you EVM changes to my tree, with a comment > about the origin. I also changed the SDP panel name to sharp panel, > and > made both EVM and SDP use that. But I can't test the EVM, as I don't > have one. I finally got rc4 working on evm and with your latest patches I get: udevd version 124 started eth0: link down eth0: link up, 100Mbps, full-duplex, lpa 0x8DE1 DSS2 debug: best_ld is 1, best_pd is 3 DSS2 debug: best_ld is 1, best_pd is 3 DSS2 debug: best.lck_div is 1, best.pck_div is 3 omap-dss DISPLAY: omap_dss_mgr_apply(lcd) omap-dss DISPC: dispc_setup_plane 0, 87200000, sw 480, 0,0, 480x640 -> 480x640, (ilace 0) omap-dss DISPC: dispc_enable_plane 0, 1 omap-dss DISPC: dispc_enable_plane 1, 0 omap-dss DISPC: dispc_enable_plane 2, 0 omap-dss DISPC: GO LCD Division by zero in kernel. [<c0033a60>] (dump_stack+0x0/0x14) from [<c0033a8c>] (__div0+0x18/0x20) [<c0033a74>] (__div0+0x0/0x20) from [<c01a235c>] (Ldiv0+0x8/0x10) [<c01c7f08>] (check_fb_var+0x0/0x35c) from [<c01c8280>] (omapfb_check_var+0x1c/0x20) r7:c6711e08 r6:c708bc00 r5:00004601 r4:c01c8264 [<c01c8264>] (omapfb_check_var+0x0/0x20) from [<c01b55dc>] (fb_set_var +0xd4/0x254) [<c01b5508>] (fb_set_var+0x0/0x254) from [<c01b59c0>] (fb_ioctl +0x170/0x4f0) [<c01b5850>] (fb_ioctl+0x0/0x4f0) from [<c00c59c8>] (vfs_ioctl +0x34/0x94) r8:c0030004 r7:c7b4e6c0 r6:03d7ca30 r5:00004601 r4:c7b4e6c0 [<c00c5994>] (vfs_ioctl+0x0/0x94) from [<c00c5fc8>] (do_vfs_ioctl +0x4a4/0x4e4) r7:c7b4e6c0 r6:03d7ca30 r5:c7b4e6c0 r4:c70f9290 [<c00c5b24>] (do_vfs_ioctl+0x0/0x4e4) from [<c00c6048>] (sys_ioctl +0x40/0x64) r9:c6710000 r8:c0030004 r6:00004601 r5:03d7ca30 r4:00000006 [<c00c6008>] (sys_ioctl+0x0/0x64) from [<c002fe80>] (ret_fast_syscall +0x0/0x2c) r7:00000036 r6:00000281 r5:000001fc r4:00000000 DSS2 debug: best_ld is 255, best_pd is 255 DSS2 debug: best_ld is 255, best_pd is 255 DSS2 debug: best_ld is 255, best_pd is 255 DSS2 debug: best_ld is 255, best_pd is 255 DSS2 debug: best_ld is 255, best_pd is 255 DSS2 debug: best_ld is 255, best_pd is 255 DSS2 debug: best_ld is 255, best_pd is 255 DSS2 debug: best_ld is 255, best_pd is 255 DSS2 debug: best_ld is 255, best_pd is 255 DSS2 debug: best_ld is 255, best_pd is 255 DSS2 debug: best_ld is 255, best_pd is 255 DSS2 debug: best_ld is 255, best_pd is 255 DSS2 debug: best.lck_div is 0, best.pck_div is 0 Division by zero in kernel. [<c0033a60>] (dump_stack+0x0/0x14) from [<c0033a8c>] (__div0+0x18/0x20) [<c0033a74>] (__div0+0x0/0x20) from [<c01a235c>] (Ldiv0+0x8/0x10) [<c01c7f08>] (check_fb_var+0x0/0x35c) from [<c01c8280>] (omapfb_check_var+0x1c/0x20) r7:c6711e08 r6:c708bc00 r5:00004601 r4:c01c8264 [<c01c8264>] (omapfb_check_var+0x0/0x20) from [<c01b55dc>] (fb_set_var +0xd4/0x254) [<c01b5508>] (fb_set_var+0x0/0x254) from [<c01b59c0>] (fb_ioctl +0x170/0x4f0) [<c01b5850>] (fb_ioctl+0x0/0x4f0) from [<c00c59c8>] (vfs_ioctl +0x34/0x94) r8:c0030004 r7:c7b4e6c0 r6:03d7ca30 r5:00004601 r4:c7b4e6c0 [<c00c5994>] (vfs_ioctl+0x0/0x94) from [<c00c5fc8>] (do_vfs_ioctl +0x4a4/0x4e4) r7:c7b4e6c0 r6:03d7ca30 r5:c7b4e6c0 r4:c70f9290 [<c00c5b24>] (do_vfs_ioctl+0x0/0x4e4) from [<c00c6048>] (sys_ioctl +0x40/0x64) r9:c6710000 r8:c0030004 r6:00004601 r5:03d7ca30 r4:00000006 [<c00c6008>] (sys_ioctl+0x0/0x64) from [<c002fe80>] (ret_fast_syscall +0x0/0x2c) r7:00000036 r6:00000281 r5:000001fc r4:00000000 omap-dss DISPLAY: omap_dss_mgr_apply(lcd) omap-dss DISPC: dispc_setup_plane 0, 87200000, sw 480, 0,0, 480x640 -> 480x640, (ilace 0) omap-dss DISPC: dispc_enable_plane 0, 1 omap-dss DISPC: dispc_enable_plane 1, 0 omap-dss DISPC: dispc_enable_plane 2, 0 omap-dss DISPC: GO LCD omap-dss DISPLAY: omap_dss_mgr_apply(lcd) omap-dss DISPC: dispc_setup_plane 0, 87200000, sw 480, 0,0, 480x640 -> 480x640, (ilace 0) omap-dss DISPC: dispc_enable_plane 0, 1 omap-dss DISPC: dispc_enable_plane 1, 0 omap-dss DISPC: dispc_enable_plane 2, 0 omap-dss DISPC: GO LCD omap-dss DISPLAY: omap_dss_mgr_apply(lcd) omap-dss DISPC: dispc_setup_plane 0, 87200000, sw 480, 0,0, 480x640 -> 480x640, (ilace 0) omap-dss DISPC: dispc_enable_plane 0, 1 omap-dss DISPC: dispc_enable_plane 1, 0 omap-dss DISPC: dispc_enable_plane 2, 0 omap-dss DISPC: GO LCD the DSS2 printks are at the end of find_lck_pck_divs() and dispc_calc_clock_div() in dispc.c. regards, Koen |
From: Hiremath, V. <hva...@ti...> - 2008-11-15 08:45:40
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Thanks, Vaibhav Hiremath > -----Original Message----- > From: Koen Kooi [mailto:k....@st...] > Sent: Saturday, November 15, 2008 1:14 AM > To: Tomi Valkeinen > Cc: Hiremath, Vaibhav; lin...@li...; > lin...@vg... > Subject: Re: [REVIEW PATCH] Added OMAP3EVM support on Tomis > FBDEV/DSS Patches > > > Op 14 nov 2008, om 16:53 heeft Tomi Valkeinen het volgende > geschreven: > > > Hi, > > On Fri, 2008-11-14 at 18:05 +0530, ext Hiremath, Vaibhav wrote: > > > >>> > >>> I think the LCD panel on SDP and EVM boards are the same, so we > >>> should > >>> only have one driver. Do you have specifications about the LCD? > The > >>> manufacturer, model etc?. I didn't find any proper information > about > >>> the > >>> LCD. > >>> > >> [Hiremath, Vaibhav] The LCD on OMAP3EVM is Sharp LCD (Model No. - > >> LS037V7DW01). > >> Koen has already conformed that panel3430sdp.c is working with > >> OMAP3EVM, let me try at my end. If it works properly then we can > >> have same file to build for both SDP and EVM. But in that case it > >> make sense to rename file to panel-lcd.c. > >> > > > > I took the liberty to add you EVM changes to my tree, with a > comment > > about the origin. I also changed the SDP panel name to sharp > panel, > > and > > made both EVM and SDP use that. But I can't test the EVM, as I > don't > > have one. > > I finally got rc4 working on evm and with your latest patches I get: > [Hiremath, Vaibhav] What was the issue you figured out? > udevd version 124 started > eth0: link down > eth0: link up, 100Mbps, full-duplex, lpa 0x8DE1 > DSS2 debug: best_ld is 1, best_pd is 3 > DSS2 debug: best_ld is 1, best_pd is 3 > DSS2 debug: best.lck_div is 1, best.pck_div is 3 > omap-dss DISPLAY: omap_dss_mgr_apply(lcd) > omap-dss DISPC: dispc_setup_plane 0, 87200000, sw 480, 0,0, 480x640 > -> > 480x640, (ilace 0) > omap-dss DISPC: dispc_enable_plane 0, 1 > omap-dss DISPC: dispc_enable_plane 1, 0 > omap-dss DISPC: dispc_enable_plane 2, 0 > omap-dss DISPC: GO LCD > Division by zero in kernel. [Hiremath, Vaibhav] Are you using the patch I submitted or the merged code from Tomi? > [<c0033a60>] (dump_stack+0x0/0x14) from [<c0033a8c>] > (__div0+0x18/0x20) > [<c0033a74>] (__div0+0x0/0x20) from [<c01a235c>] (Ldiv0+0x8/0x10) > [<c01c7f08>] (check_fb_var+0x0/0x35c) from [<c01c8280>] > (omapfb_check_var+0x1c/0x20) > r7:c6711e08 r6:c708bc00 r5:00004601 r4:c01c8264 > [<c01c8264>] (omapfb_check_var+0x0/0x20) from [<c01b55dc>] > (fb_set_var > +0xd4/0x254) > [<c01b5508>] (fb_set_var+0x0/0x254) from [<c01b59c0>] (fb_ioctl > +0x170/0x4f0) > [<c01b5850>] (fb_ioctl+0x0/0x4f0) from [<c00c59c8>] (vfs_ioctl > +0x34/0x94) > r8:c0030004 r7:c7b4e6c0 r6:03d7ca30 r5:00004601 r4:c7b4e6c0 > [<c00c5994>] (vfs_ioctl+0x0/0x94) from [<c00c5fc8>] (do_vfs_ioctl > +0x4a4/0x4e4) > r7:c7b4e6c0 r6:03d7ca30 r5:c7b4e6c0 r4:c70f9290 > [<c00c5b24>] (do_vfs_ioctl+0x0/0x4e4) from [<c00c6048>] (sys_ioctl > +0x40/0x64) > r9:c6710000 r8:c0030004 r6:00004601 r5:03d7ca30 r4:00000006 > [<c00c6008>] (sys_ioctl+0x0/0x64) from [<c002fe80>] > (ret_fast_syscall > +0x0/0x2c) > r7:00000036 r6:00000281 r5:000001fc r4:00000000 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best.lck_div is 0, best.pck_div is 0 > Division by zero in kernel. > [<c0033a60>] (dump_stack+0x0/0x14) from [<c0033a8c>] > (__div0+0x18/0x20) > [<c0033a74>] (__div0+0x0/0x20) from [<c01a235c>] (Ldiv0+0x8/0x10) > [<c01c7f08>] (check_fb_var+0x0/0x35c) from [<c01c8280>] > (omapfb_check_var+0x1c/0x20) > r7:c6711e08 r6:c708bc00 r5:00004601 r4:c01c8264 > [<c01c8264>] (omapfb_check_var+0x0/0x20) from [<c01b55dc>] > (fb_set_var > +0xd4/0x254) > [<c01b5508>] (fb_set_var+0x0/0x254) from [<c01b59c0>] (fb_ioctl > +0x170/0x4f0) > [<c01b5850>] (fb_ioctl+0x0/0x4f0) from [<c00c59c8>] (vfs_ioctl > +0x34/0x94) > r8:c0030004 r7:c7b4e6c0 r6:03d7ca30 r5:00004601 r4:c7b4e6c0 > [<c00c5994>] (vfs_ioctl+0x0/0x94) from [<c00c5fc8>] (do_vfs_ioctl > +0x4a4/0x4e4) > r7:c7b4e6c0 r6:03d7ca30 r5:c7b4e6c0 r4:c70f9290 > [<c00c5b24>] (do_vfs_ioctl+0x0/0x4e4) from [<c00c6048>] (sys_ioctl > +0x40/0x64) > r9:c6710000 r8:c0030004 r6:00004601 r5:03d7ca30 r4:00000006 > [<c00c6008>] (sys_ioctl+0x0/0x64) from [<c002fe80>] > (ret_fast_syscall > +0x0/0x2c) > r7:00000036 r6:00000281 r5:000001fc r4:00000000 > omap-dss DISPLAY: omap_dss_mgr_apply(lcd) > omap-dss DISPC: dispc_setup_plane 0, 87200000, sw 480, 0,0, 480x640 > -> > 480x640, (ilace 0) > omap-dss DISPC: dispc_enable_plane 0, 1 > omap-dss DISPC: dispc_enable_plane 1, 0 > omap-dss DISPC: dispc_enable_plane 2, 0 > omap-dss DISPC: GO LCD > omap-dss DISPLAY: omap_dss_mgr_apply(lcd) > omap-dss DISPC: dispc_setup_plane 0, 87200000, sw 480, 0,0, 480x640 > -> > 480x640, (ilace 0) > omap-dss DISPC: dispc_enable_plane 0, 1 > omap-dss DISPC: dispc_enable_plane 1, 0 > omap-dss DISPC: dispc_enable_plane 2, 0 > omap-dss DISPC: GO LCD > omap-dss DISPLAY: omap_dss_mgr_apply(lcd) > omap-dss DISPC: dispc_setup_plane 0, 87200000, sw 480, 0,0, 480x640 > -> > 480x640, (ilace 0) > omap-dss DISPC: dispc_enable_plane 0, 1 > omap-dss DISPC: dispc_enable_plane 1, 0 > omap-dss DISPC: dispc_enable_plane 2, 0 > omap-dss DISPC: GO LCD > > the DSS2 printks are at the end of find_lck_pck_divs() and > dispc_calc_clock_div() in dispc.c. > > regards, > > Koen |
From: Hiremath, V. <hva...@ti...> - 2008-11-18 12:09:52
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Thanks, Vaibhav Hiremath > -----Original Message----- > From: Koen Kooi [mailto:k....@st...] > Sent: Saturday, November 15, 2008 1:14 AM > To: Tomi Valkeinen > Cc: Hiremath, Vaibhav; lin...@li...; > lin...@vg... > Subject: Re: [REVIEW PATCH] Added OMAP3EVM support on Tomis > FBDEV/DSS Patches > > > Op 14 nov 2008, om 16:53 heeft Tomi Valkeinen het volgende > geschreven: > > > Hi, > > On Fri, 2008-11-14 at 18:05 +0530, ext Hiremath, Vaibhav wrote: > > > >>> > >>> I think the LCD panel on SDP and EVM boards are the same, so we > >>> should > >>> only have one driver. Do you have specifications about the LCD? > The > >>> manufacturer, model etc?. I didn't find any proper information > about > >>> the > >>> LCD. > >>> > >> [Hiremath, Vaibhav] The LCD on OMAP3EVM is Sharp LCD (Model No. - > >> LS037V7DW01). > >> Koen has already conformed that panel3430sdp.c is working with > >> OMAP3EVM, let me try at my end. If it works properly then we can > >> have same file to build for both SDP and EVM. But in that case it > >> make sense to rename file to panel-lcd.c. > >> > > > > I took the liberty to add you EVM changes to my tree, with a > comment > > about the origin. I also changed the SDP panel name to sharp > panel, > > and > > made both EVM and SDP use that. But I can't test the EVM, as I > don't > > have one. > > I finally got rc4 working on evm and with your latest patches I get: > [Hiremath, Vaibhav] Probably you missed to apply the clock set_rate and round_rate patches by Mans Rullgard. > udevd version 124 started > eth0: link down > eth0: link up, 100Mbps, full-duplex, lpa 0x8DE1 > DSS2 debug: best_ld is 1, best_pd is 3 > DSS2 debug: best_ld is 1, best_pd is 3 > DSS2 debug: best.lck_div is 1, best.pck_div is 3 > omap-dss DISPLAY: omap_dss_mgr_apply(lcd) > omap-dss DISPC: dispc_setup_plane 0, 87200000, sw 480, 0,0, 480x640 > -> > 480x640, (ilace 0) > omap-dss DISPC: dispc_enable_plane 0, 1 > omap-dss DISPC: dispc_enable_plane 1, 0 > omap-dss DISPC: dispc_enable_plane 2, 0 > omap-dss DISPC: GO LCD > Division by zero in kernel. > [<c0033a60>] (dump_stack+0x0/0x14) from [<c0033a8c>] > (__div0+0x18/0x20) > [<c0033a74>] (__div0+0x0/0x20) from [<c01a235c>] (Ldiv0+0x8/0x10) > [<c01c7f08>] (check_fb_var+0x0/0x35c) from [<c01c8280>] > (omapfb_check_var+0x1c/0x20) > r7:c6711e08 r6:c708bc00 r5:00004601 r4:c01c8264 > [<c01c8264>] (omapfb_check_var+0x0/0x20) from [<c01b55dc>] > (fb_set_var > +0xd4/0x254) > [<c01b5508>] (fb_set_var+0x0/0x254) from [<c01b59c0>] (fb_ioctl > +0x170/0x4f0) > [<c01b5850>] (fb_ioctl+0x0/0x4f0) from [<c00c59c8>] (vfs_ioctl > +0x34/0x94) > r8:c0030004 r7:c7b4e6c0 r6:03d7ca30 r5:00004601 r4:c7b4e6c0 > [<c00c5994>] (vfs_ioctl+0x0/0x94) from [<c00c5fc8>] (do_vfs_ioctl > +0x4a4/0x4e4) > r7:c7b4e6c0 r6:03d7ca30 r5:c7b4e6c0 r4:c70f9290 > [<c00c5b24>] (do_vfs_ioctl+0x0/0x4e4) from [<c00c6048>] (sys_ioctl > +0x40/0x64) > r9:c6710000 r8:c0030004 r6:00004601 r5:03d7ca30 r4:00000006 > [<c00c6008>] (sys_ioctl+0x0/0x64) from [<c002fe80>] > (ret_fast_syscall > +0x0/0x2c) > r7:00000036 r6:00000281 r5:000001fc r4:00000000 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best_ld is 255, best_pd is 255 > DSS2 debug: best.lck_div is 0, best.pck_div is 0 > Division by zero in kernel. > [<c0033a60>] (dump_stack+0x0/0x14) from [<c0033a8c>] > (__div0+0x18/0x20) > [<c0033a74>] (__div0+0x0/0x20) from [<c01a235c>] (Ldiv0+0x8/0x10) > [<c01c7f08>] (check_fb_var+0x0/0x35c) from [<c01c8280>] > (omapfb_check_var+0x1c/0x20) > r7:c6711e08 r6:c708bc00 r5:00004601 r4:c01c8264 > [<c01c8264>] (omapfb_check_var+0x0/0x20) from [<c01b55dc>] > (fb_set_var > +0xd4/0x254) > [<c01b5508>] (fb_set_var+0x0/0x254) from [<c01b59c0>] (fb_ioctl > +0x170/0x4f0) > [<c01b5850>] (fb_ioctl+0x0/0x4f0) from [<c00c59c8>] (vfs_ioctl > +0x34/0x94) > r8:c0030004 r7:c7b4e6c0 r6:03d7ca30 r5:00004601 r4:c7b4e6c0 > [<c00c5994>] (vfs_ioctl+0x0/0x94) from [<c00c5fc8>] (do_vfs_ioctl > +0x4a4/0x4e4) > r7:c7b4e6c0 r6:03d7ca30 r5:c7b4e6c0 r4:c70f9290 > [<c00c5b24>] (do_vfs_ioctl+0x0/0x4e4) from [<c00c6048>] (sys_ioctl > +0x40/0x64) > r9:c6710000 r8:c0030004 r6:00004601 r5:03d7ca30 r4:00000006 > [<c00c6008>] (sys_ioctl+0x0/0x64) from [<c002fe80>] > (ret_fast_syscall > +0x0/0x2c) > r7:00000036 r6:00000281 r5:000001fc r4:00000000 > omap-dss DISPLAY: omap_dss_mgr_apply(lcd) > omap-dss DISPC: dispc_setup_plane 0, 87200000, sw 480, 0,0, 480x640 > -> > 480x640, (ilace 0) > omap-dss DISPC: dispc_enable_plane 0, 1 > omap-dss DISPC: dispc_enable_plane 1, 0 > omap-dss DISPC: dispc_enable_plane 2, 0 > omap-dss DISPC: GO LCD > omap-dss DISPLAY: omap_dss_mgr_apply(lcd) > omap-dss DISPC: dispc_setup_plane 0, 87200000, sw 480, 0,0, 480x640 > -> > 480x640, (ilace 0) > omap-dss DISPC: dispc_enable_plane 0, 1 > omap-dss DISPC: dispc_enable_plane 1, 0 > omap-dss DISPC: dispc_enable_plane 2, 0 > omap-dss DISPC: GO LCD > omap-dss DISPLAY: omap_dss_mgr_apply(lcd) > omap-dss DISPC: dispc_setup_plane 0, 87200000, sw 480, 0,0, 480x640 > -> > 480x640, (ilace 0) > omap-dss DISPC: dispc_enable_plane 0, 1 > omap-dss DISPC: dispc_enable_plane 1, 0 > omap-dss DISPC: dispc_enable_plane 2, 0 > omap-dss DISPC: GO LCD > > the DSS2 printks are at the end of find_lck_pck_divs() and > dispc_calc_clock_div() in dispc.c. > > regards, > > Koen |
From: Koen K. <k....@st...> - 2008-11-18 12:21:22
Attachments:
PGP.sig
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Op 18 nov 2008, om 13:09 heeft Hiremath, Vaibhav het volgende geschreven: >> >> I finally got rc4 working on evm and with your latest patches I get: >> > [Hiremath, Vaibhav] Probably you missed to apply the clock set_rate > and round_rate patches by Mans Rullgard. I already have those, the problem was fixed by: From d90a851b63f2593d02ae306a91c36ea059f67014 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen <tom...@no...> Date: Mon, 17 Nov 2008 13:40:55 +0200 Subject: [PATCH] DSS: OMAPFB: Check that var->pixclock is not zero --- drivers/video/omap2/omapfb-main.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/drivers/video/omap2/omapfb-main.c b/drivers/video/omap2/ omapfb-main.c index c0f1664..add65e4 100644 --- a/drivers/video/omap2/omapfb-main.c +++ b/drivers/video/omap2/omapfb-main.c @@ -342,6 +342,12 @@ static int check_fb_var(struct fb_info *fbi, struct fb_var_screeninfo *var) if (display && display->check_timings) { struct omap_video_timings timings; + + if (var->pixclock == 0) { + DBG("Pixclock can't be zero.\n"); + return -EINVAL; + } + timings.pixel_clock = PICOS2KHZ(var->pixclock); timings.hfp = var->left_margin; timings.hbp = var->right_margin; -- 1.6.0.3 |
From: Hiremath, V. <hva...@ti...> - 2008-11-15 08:42:18
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Thanks, Vaibhav Hiremath > -----Original Message----- > From: Tomi Valkeinen [mailto:tom...@no...] > Sent: Friday, November 14, 2008 9:24 PM > To: Hiremath, Vaibhav > Cc: lin...@li...; linux- > om...@vg... > Subject: RE: [REVIEW PATCH] Added OMAP3EVM support on Tomis > FBDEV/DSS Patches > > Hi, > On Fri, 2008-11-14 at 18:05 +0530, ext Hiremath, Vaibhav wrote: > > > > > > > I think the LCD panel on SDP and EVM boards are the same, so we > > > should > > > only have one driver. Do you have specifications about the LCD? > The > > > manufacturer, model etc?. I didn't find any proper information > about > > > the > > > LCD. > > > > > [Hiremath, Vaibhav] The LCD on OMAP3EVM is Sharp LCD (Model No. - > LS037V7DW01). > > Koen has already conformed that panel3430sdp.c is working with > OMAP3EVM, let me try at my end. If it works properly then we can > have same file to build for both SDP and EVM. But in that case it > make sense to rename file to panel-lcd.c. > > > > I took the liberty to add you EVM changes to my tree, with a comment > about the origin. I also changed the SDP panel name to sharp panel, > and > made both EVM and SDP use that. But I can't test the EVM, as I don't > have one. > [Hiremath, Vaibhav] It's ok; you can incorporate required changes from my patches, no issues at all. Please share the code base which you merged from my patch so that I can validate it on EVM, since you don't have EVM to test. > > > The #ifdef mode selection in DVI panel is quit hack, I agree. > The > > > mode > > > selection should be possible to be done runtime (or with kernel |
From: Tomi V. <tom...@no...> - 2008-11-17 09:50:09
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On Sat, 2008-11-15 at 14:12 +0530, ext Hiremath, Vaibhav wrote: > > Thanks, > Vaibhav Hiremath > > > -----Original Message----- > > From: Tomi Valkeinen [mailto:tom...@no...] > > Sent: Friday, November 14, 2008 9:24 PM > > To: Hiremath, Vaibhav > > Cc: lin...@li...; linux- > > om...@vg... > > Subject: RE: [REVIEW PATCH] Added OMAP3EVM support on Tomis > > FBDEV/DSS Patches > > > > Hi, > > On Fri, 2008-11-14 at 18:05 +0530, ext Hiremath, Vaibhav wrote: > > > > > > > > > > I think the LCD panel on SDP and EVM boards are the same, so we > > > > should > > > > only have one driver. Do you have specifications about the LCD? > > The > > > > manufacturer, model etc?. I didn't find any proper information > > about > > > > the > > > > LCD. > > > > > > > [Hiremath, Vaibhav] The LCD on OMAP3EVM is Sharp LCD (Model No. - > > LS037V7DW01). > > > Koen has already conformed that panel3430sdp.c is working with > > OMAP3EVM, let me try at my end. If it works properly then we can > > have same file to build for both SDP and EVM. But in that case it > > make sense to rename file to panel-lcd.c. > > > > > > > I took the liberty to add you EVM changes to my tree, with a comment > > about the origin. I also changed the SDP panel name to sharp panel, > > and > > made both EVM and SDP use that. But I can't test the EVM, as I don't > > have one. > > > [Hiremath, Vaibhav] It's ok; you can incorporate required changes from my patches, no issues at all. Please share the code base which you merged from my patch so that I can validate it on EVM, since you don't have EVM to test. > My current version is available in master branch on http://www.bat.org/~tomba/git/linux-omap-dss.git/ I will be keeping the master branch up to date with my changes and linux-omap. And I will be rebasing the branch. pub1 branch has the version that I emailed to mailing lists some time ago. You can diff master and pub1 branches to see what's changed. Tomi |
From: Koen K. <k....@st...> - 2008-11-14 11:42:59
Attachments:
PGP.sig
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Op 14 nov 2008, om 07:32 heeft hva...@ti... het volgende geschreven: > > diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach- > omap2/board-omap3evm.c > > + if (system_rev > OMAP3430_REV_ES1_0) { > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > + ENABLE_VPLL2_DEDICATED, TWL4030_VPLL2_DEDICATED); > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > + ENABLE_VPLL2_DEV_GRP, TWL4030_VPLL2_DEV_GRP); > + } > + gpio_direction_output(LCD_PANEL_ENABLE_GPIO, 0); > + lcd_enabled = 1; > + return 0; > +} > + > +static void panel_disable_lcd(struct omap_display *display) > +{ > + if (system_rev > OMAP3430_REV_ES1_0) { > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x0, > + TWL4030_VPLL2_DEDICATED); > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x0, > + TWL4030_VPLL2_DEV_GRP); > + } > + omap_set_gpio_dataout(LCD_PANEL_ENABLE_GPIO, 1); > + lcd_enabled = 0; > +} system_rev() is now omap_rev(), you'll get a really green picture without that change :) I can confirm that the panel-sdp3430 works on the evm. regards, Koen |
From: Shah, H. <har...@ti...> - 2008-11-14 11:49:21
|
> -----Original Message----- > From: lin...@vg... [mailto:linux-omap- > ow...@vg...] On Behalf Of Koen Kooi > Sent: Friday, November 14, 2008 5:09 PM > To: Hiremath, Vaibhav > Cc: lin...@li...; lin...@vg... > Subject: Re: [REVIEW PATCH] Added OMAP3EVM support on Tomis FBDEV/DSS Patches > > > Op 14 nov 2008, om 07:32 heeft hva...@ti... het volgende geschreven: > > > > > diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach- > > omap2/board-omap3evm.c > > > > + if (system_rev > OMAP3430_REV_ES1_0) { > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > > + ENABLE_VPLL2_DEDICATED, TWL4030_VPLL2_DEDICATED); > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > > + ENABLE_VPLL2_DEV_GRP, TWL4030_VPLL2_DEV_GRP); > > + } > > + gpio_direction_output(LCD_PANEL_ENABLE_GPIO, 0); > > + lcd_enabled = 1; > > + return 0; > > +} > > + > > +static void panel_disable_lcd(struct omap_display *display) > > +{ > > + if (system_rev > OMAP3430_REV_ES1_0) { > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x0, > > + TWL4030_VPLL2_DEDICATED); > > + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x0, > > + TWL4030_VPLL2_DEV_GRP); > > + } > > + omap_set_gpio_dataout(LCD_PANEL_ENABLE_GPIO, 1); > > + lcd_enabled = 0; > > +} > > system_rev() is now omap_rev(), you'll get a really green picture > without that change :) > > I can confirm that the panel-sdp3430 works on the evm. [Shah, Hardik] Hi panel-omap3evm.c is working fine. We tested that. And we were getting the green picture. Thanks for pointing that out. We will change this also in our next patch. > > regards, > > Koen |
From: Tony L. <to...@at...> - 2008-11-14 21:50:45
|
* hva...@ti... <hva...@ti...> [081113 22:33]: > From: Vaibhav Hiremath <hva...@ti...> > > Tested LCD, TV, DVI (480P) out on OMAP3EVM board. > > Please make sure that you change the option > CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=7 and apply the > Mans Rullgard clock patches to support set_rate and round_rate API. > > --- a/arch/arm/mach-omap2/board-omap3evm.c > +++ b/arch/arm/mach-omap2/board-omap3evm.c > @@ -227,11 +430,13 @@ static void __init omap3_evm_init_irq(void) > > static struct omap_board_config_kernel omap3_evm_config[] __initdata = { > { OMAP_TAG_UART, &omap3_evm_uart_config }, > - { OMAP_TAG_LCD, &omap3_evm_lcd_config }, > + { OMAP_TAG_FBMEM, &evm_fbmem0_config }, > + { OMAP_TAG_FBMEM, &evm_fbmem1_config }, > + { OMAP_TAG_FBMEM, &evm_fbmem2_config }, > }; > Guys, please update your patches to remove the OMAP_TAG_FBMEM stuff and rely on just platform_data. All the OMAP_TAGs will be disappearing real soon now. Tony |
From: <hva...@ti...> - 2008-12-15 08:02:15
|
From: Vaibhav Hiremath <hva...@ti...> Refreshed and Cleaned up as per the latest Tomi's DSS2 code-base - http://www.bat.org/~tomba/git/linux-omap-dss.git Tomi, Can you please merge this patch to your repository, so that it will be available as part of your HEAD? Signed-off-by: Brijesh Jadav <bri...@ti...> Signed-off-by: Hardik Shah <har...@ti...> Signed-off-by: Manjunath Hadli <mr...@ti...> Signed-off-by: R Sivaraj <si...@ti...> Signed-off-by: Vaibhav Hiremath <hva...@ti...> --- arch/arm/mach-omap2/board-omap3evm.c | 69 +++++++++++++--------------------- 1 files changed, 26 insertions(+), 43 deletions(-) diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 0a722d7..cf0a6b3 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -36,7 +36,6 @@ #include <mach/usb-ehci.h> #include <mach/common.h> #include <mach/mcspi.h> -#include <mach/omapfb.h> #include <mach/display.h> #include "sdram-micron-mt46h32m32lf-6.h" @@ -161,20 +160,7 @@ static int __init omap3_evm_i2c_init(void) omap_register_i2c_bus(3, 400, NULL, 0); return 0; } -static struct omap_fbmem_config evm_fbmem0_config = { - .size = 480*720*4, - .start = OMAPFB_MEMTYPE_SDRAM, -}; - -static struct omap_fbmem_config evm_fbmem1_config = { - .size = 480*720*4, - .start = OMAPFB_MEMTYPE_SDRAM, -}; -static struct omap_fbmem_config evm_fbmem2_config = { - .size = 480*720*4, - .start = OMAPFB_MEMTYPE_SDRAM, -}; #define LCD_PANEL_LR 2 #define LCD_PANEL_UD 3 #define LCD_PANEL_INI 152 @@ -195,7 +181,7 @@ static struct omap_fbmem_config evm_fbmem2_config = { static int lcd_enabled; static int dvi_enabled; -static void __init evm_display_init(void) +static void __init omap3_evm_display_init(void) { int r; r = gpio_request(LCD_PANEL_LR, "lcd_panel_lr"); @@ -258,7 +244,7 @@ err_1: } -static int evm_panel_enable_lcd(struct omap_display *display) +static int omap3_evm_panel_enable_lcd(struct omap_display *display) { if (dvi_enabled) { printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); @@ -275,7 +261,7 @@ static int evm_panel_enable_lcd(struct omap_display *display) return 0; } -static void evm_panel_disable_lcd(struct omap_display *display) +static void omap3_evm_panel_disable_lcd(struct omap_display *display) { if (omap_rev() > OMAP3430_REV_ES1_0) { twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x0, @@ -287,16 +273,16 @@ static void evm_panel_disable_lcd(struct omap_display *display) lcd_enabled = 0; } -static struct omap_display_data evm_display_data = { +static struct omap_display_data omap3_evm_display_data = { .type = OMAP_DISPLAY_TYPE_DPI, .name = "lcd", .panel_name = "sharp-ls037v7dw01", .u.dpi.data_lines = 18, - .panel_enable = evm_panel_enable_lcd, - .panel_disable = evm_panel_disable_lcd, + .panel_enable = omap3_evm_panel_enable_lcd, + .panel_disable = omap3_evm_panel_disable_lcd, }; -static int evm_panel_enable_tv(struct omap_display *display) +static int omap3_evm_panel_enable_tv(struct omap_display *display) { twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, ENABLE_VDAC_DEDICATED, TWL4030_VDAC_DEDICATED); @@ -305,7 +291,7 @@ static int evm_panel_enable_tv(struct omap_display *display) return 0; } -static void evm_panel_disable_tv(struct omap_display *display) +static void omap3_evm_panel_disable_tv(struct omap_display *display) { twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00, TWL4030_VDAC_DEDICATED); @@ -313,16 +299,16 @@ static void evm_panel_disable_tv(struct omap_display *display) TWL4030_VDAC_DEV_GRP); } -static struct omap_display_data evm_display_data_tv = { +static struct omap_display_data omap3_evm_display_data_tv = { .type = OMAP_DISPLAY_TYPE_VENC, .name = "tv", .u.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, - .panel_enable = evm_panel_enable_tv, - .panel_disable = evm_panel_disable_tv, + .panel_enable = omap3_evm_panel_enable_tv, + .panel_disable = omap3_evm_panel_disable_tv, }; -static int evm_panel_enable_dvi(struct omap_display *display) +static int omap3_evm_panel_enable_dvi(struct omap_display *display) { if (lcd_enabled) { printk(KERN_ERR "cannot enable DVI, LCD is enabled\n"); @@ -337,7 +323,7 @@ static int evm_panel_enable_dvi(struct omap_display *display) return 0; } -static void evm_panel_disable_dvi(struct omap_display *display) +static void omap3_evm_panel_disable_dvi(struct omap_display *display) { twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x00, TWL4030_GPIODATA_IN3); @@ -347,28 +333,28 @@ static void evm_panel_disable_dvi(struct omap_display *display) } -static struct omap_display_data evm_display_data_dvi = { +static struct omap_display_data omap3_evm_display_data_dvi = { .type = OMAP_DISPLAY_TYPE_DPI, .name = "dvi", .panel_name = "panel-dvi", .u.dpi.data_lines = 24, - .panel_enable = evm_panel_enable_dvi, - .panel_disable = evm_panel_disable_dvi, + .panel_enable = omap3_evm_panel_enable_dvi, + .panel_disable = omap3_evm_panel_disable_dvi, }; -static struct omap_dss_platform_data evm_dss_data = { +static struct omap_dss_platform_data omap3_evm_dss_data = { .num_displays = 3, .displays = { - &evm_display_data, - &evm_display_data_dvi, - &evm_display_data_tv, + &omap3_evm_display_data, + &omap3_evm_display_data_dvi, + &omap3_evm_display_data_tv, } }; -static struct platform_device evm_dss_device = { +static struct platform_device omap3_evm_dss_device = { .name = "omap-dss", .id = -1, .dev = { - .platform_data = &evm_dss_data, + .platform_data = &omap3_evm_dss_data, }, }; @@ -428,13 +414,10 @@ static void __init omap3_evm_init_irq(void) static struct omap_board_config_kernel omap3_evm_config[] __initdata = { { OMAP_TAG_UART, &omap3_evm_uart_config }, - { OMAP_TAG_FBMEM, &evm_fbmem0_config }, - { OMAP_TAG_FBMEM, &evm_fbmem1_config }, - { OMAP_TAG_FBMEM, &evm_fbmem2_config }, }; static struct platform_device *omap3_evm_devices[] __initdata = { - &evm_dss_device, + &omap3_evm_dss_device, &omap3evm_smc911x_device, }; @@ -453,6 +436,8 @@ static void __init omap3_evm_init(void) omap3_evm_i2c_init(); platform_add_devices(omap3_evm_devices, ARRAY_SIZE(omap3_evm_devices)); + omap_board_config = omap3_evm_config; + omap_board_config_size = ARRAY_SIZE(omap3_evm_config); spi_register_board_info(omap3evm_spi_board_info, ARRAY_SIZE(omap3evm_spi_board_info)); @@ -463,13 +448,11 @@ static void __init omap3_evm_init(void) usb_ehci_init(); omap3evm_flash_init(); ads7846_dev_init(); - evm_display_init(); + omap3_evm_display_init(); } static void __init omap3_evm_map_io(void) { - omap_board_config = omap3_evm_config; - omap_board_config_size = ARRAY_SIZE(omap3_evm_config); omap2_set_globals_343x(); omap2_map_common_io(); } -- 1.5.6 |
Re: [Linux-fbdev-devel] [REVIEW PATCH 1/1] OMAP3EVM
support-Refreshed against latest Tomis code-base
From: Tomi V. <tom...@no...> - 2008-12-15 12:55:44
|
Hi, Thanks, applied. Tomi On Mon, 2008-12-15 at 10:01 +0200, hva...@ti... wrote: > From: Vaibhav Hiremath <hva...@ti...> > > Refreshed and Cleaned up as per the latest Tomi's DSS2 > code-base - > > http://www.bat.org/~tomba/git/linux-omap-dss.git > > Tomi, > > Can you please merge this patch to your repository, so > that it will be available as part of your HEAD? > > Signed-off-by: Brijesh Jadav <bri...@ti...> > Signed-off-by: Hardik Shah <har...@ti...> > Signed-off-by: Manjunath Hadli <mr...@ti...> > Signed-off-by: R Sivaraj <si...@ti...> > Signed-off-by: Vaibhav Hiremath <hva...@ti...> > --- > arch/arm/mach-omap2/board-omap3evm.c | 69 > +++++++++++++--------------------- > 1 files changed, 26 insertions(+), 43 deletions(-) > > diff --git a/arch/arm/mach-omap2/board-omap3evm.c > b/arch/arm/mach-omap2/board-omap3evm.c > index 0a722d7..cf0a6b3 100644 > --- a/arch/arm/mach-omap2/board-omap3evm.c > +++ b/arch/arm/mach-omap2/board-omap3evm.c > @@ -36,7 +36,6 @@ > #include <mach/usb-ehci.h> > #include <mach/common.h> > #include <mach/mcspi.h> > -#include <mach/omapfb.h> > #include <mach/display.h> > > #include "sdram-micron-mt46h32m32lf-6.h" > @@ -161,20 +160,7 @@ static int __init omap3_evm_i2c_init(void) > omap_register_i2c_bus(3, 400, NULL, 0); > return 0; > } > -static struct omap_fbmem_config evm_fbmem0_config = { > - .size = 480*720*4, > - .start = OMAPFB_MEMTYPE_SDRAM, > -}; > - > -static struct omap_fbmem_config evm_fbmem1_config = { > - .size = 480*720*4, > - .start = OMAPFB_MEMTYPE_SDRAM, > -}; > > -static struct omap_fbmem_config evm_fbmem2_config = { > - .size = 480*720*4, > - .start = OMAPFB_MEMTYPE_SDRAM, > -}; > #define LCD_PANEL_LR 2 > #define LCD_PANEL_UD 3 > #define LCD_PANEL_INI 152 > @@ -195,7 +181,7 @@ static struct omap_fbmem_config evm_fbmem2_config > = { > static int lcd_enabled; > static int dvi_enabled; > > -static void __init evm_display_init(void) > +static void __init omap3_evm_display_init(void) > { > int r; > r = gpio_request(LCD_PANEL_LR, "lcd_panel_lr"); > @@ -258,7 +244,7 @@ err_1: > > } > > -static int evm_panel_enable_lcd(struct omap_display *display) > +static int omap3_evm_panel_enable_lcd(struct omap_display *display) > { > if (dvi_enabled) { > printk(KERN_ERR "cannot enable LCD, DVI is enabled > \n"); > @@ -275,7 +261,7 @@ static int evm_panel_enable_lcd(struct > omap_display *display) > return 0; > } > > -static void evm_panel_disable_lcd(struct omap_display *display) > +static void omap3_evm_panel_disable_lcd(struct omap_display *display) > { > if (omap_rev() > OMAP3430_REV_ES1_0) { > twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x0, > @@ -287,16 +273,16 @@ static void evm_panel_disable_lcd(struct > omap_display *display) > lcd_enabled = 0; > } > > -static struct omap_display_data evm_display_data = { > +static struct omap_display_data omap3_evm_display_data = { > .type = OMAP_DISPLAY_TYPE_DPI, > .name = "lcd", > .panel_name = "sharp-ls037v7dw01", > .u.dpi.data_lines = 18, > - .panel_enable = evm_panel_enable_lcd, > - .panel_disable = evm_panel_disable_lcd, > + .panel_enable = omap3_evm_panel_enable_lcd, > + .panel_disable = omap3_evm_panel_disable_lcd, > }; > > -static int evm_panel_enable_tv(struct omap_display *display) > +static int omap3_evm_panel_enable_tv(struct omap_display *display) > { > twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > ENABLE_VDAC_DEDICATED, > TWL4030_VDAC_DEDICATED); > @@ -305,7 +291,7 @@ static int evm_panel_enable_tv(struct omap_display > *display) > return 0; > } > > -static void evm_panel_disable_tv(struct omap_display *display) > +static void omap3_evm_panel_disable_tv(struct omap_display *display) > { > twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00, > TWL4030_VDAC_DEDICATED); > @@ -313,16 +299,16 @@ static void evm_panel_disable_tv(struct > omap_display *display) > TWL4030_VDAC_DEV_GRP); > } > > -static struct omap_display_data evm_display_data_tv = { > +static struct omap_display_data omap3_evm_display_data_tv = { > .type = OMAP_DISPLAY_TYPE_VENC, > .name = "tv", > .u.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, > - .panel_enable = evm_panel_enable_tv, > - .panel_disable = evm_panel_disable_tv, > + .panel_enable = omap3_evm_panel_enable_tv, > + .panel_disable = omap3_evm_panel_disable_tv, > }; > > > -static int evm_panel_enable_dvi(struct omap_display *display) > +static int omap3_evm_panel_enable_dvi(struct omap_display *display) > { > if (lcd_enabled) { > printk(KERN_ERR "cannot enable DVI, LCD is enabled > \n"); > @@ -337,7 +323,7 @@ static int evm_panel_enable_dvi(struct > omap_display *display) > return 0; > } > > -static void evm_panel_disable_dvi(struct omap_display *display) > +static void omap3_evm_panel_disable_dvi(struct omap_display *display) > { > twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0x00, > TWL4030_GPIODATA_IN3); > @@ -347,28 +333,28 @@ static void evm_panel_disable_dvi(struct > omap_display *display) > } > > > -static struct omap_display_data evm_display_data_dvi = { > +static struct omap_display_data omap3_evm_display_data_dvi = { > .type = OMAP_DISPLAY_TYPE_DPI, > .name = "dvi", > .panel_name = "panel-dvi", > .u.dpi.data_lines = 24, > - .panel_enable = evm_panel_enable_dvi, > - .panel_disable = evm_panel_disable_dvi, > + .panel_enable = omap3_evm_panel_enable_dvi, > + .panel_disable = omap3_evm_panel_disable_dvi, > }; > > -static struct omap_dss_platform_data evm_dss_data = { > +static struct omap_dss_platform_data omap3_evm_dss_data = { > .num_displays = 3, > .displays = { > - &evm_display_data, > - &evm_display_data_dvi, > - &evm_display_data_tv, > + &omap3_evm_display_data, > + &omap3_evm_display_data_dvi, > + &omap3_evm_display_data_tv, > } > }; > -static struct platform_device evm_dss_device = { > +static struct platform_device omap3_evm_dss_device = { > .name = "omap-dss", > .id = -1, > .dev = { > - .platform_data = &evm_dss_data, > + .platform_data = &omap3_evm_dss_data, > }, > }; > > @@ -428,13 +414,10 @@ static void __init omap3_evm_init_irq(void) > > static struct omap_board_config_kernel omap3_evm_config[] __initdata > = { > { OMAP_TAG_UART, &omap3_evm_uart_config }, > - { OMAP_TAG_FBMEM, &evm_fbmem0_config }, > - { OMAP_TAG_FBMEM, &evm_fbmem1_config }, > - { OMAP_TAG_FBMEM, &evm_fbmem2_config }, > }; > > static struct platform_device *omap3_evm_devices[] __initdata = { > - &evm_dss_device, > + &omap3_evm_dss_device, > &omap3evm_smc911x_device, > }; > > @@ -453,6 +436,8 @@ static void __init omap3_evm_init(void) > omap3_evm_i2c_init(); > > platform_add_devices(omap3_evm_devices, > ARRAY_SIZE(omap3_evm_devices)); > + omap_board_config = omap3_evm_config; > + omap_board_config_size = ARRAY_SIZE(omap3_evm_config); > > spi_register_board_info(omap3evm_spi_board_info, > ARRAY_SIZE(omap3evm_spi_board_info)); > @@ -463,13 +448,11 @@ static void __init omap3_evm_init(void) > usb_ehci_init(); > omap3evm_flash_init(); > ads7846_dev_init(); > - evm_display_init(); > + omap3_evm_display_init(); > } > > static void __init omap3_evm_map_io(void) > { > - omap_board_config = omap3_evm_config; > - omap_board_config_size = ARRAY_SIZE(omap3_evm_config); > omap2_set_globals_343x(); > omap2_map_common_io(); > } > -- > 1.5.6 > > > |
From: <hva...@ti...> - 2009-03-18 14:17:59
|
From: Vaibhav Hiremath <hva...@ti...> Till now OMAPFB driver was handling back-light interface through it's own custom SYSFS entries. Earliear there was a discussion where we decided to add support for OMAP back-light into Generic class driver. Also Sanjeev has submitted patch supporting back-light class driver. This patch addresses review comments from 'Richard Purdie', and adds support for OMAP3EVM. NOTE: I am not sure whether back-light class driver interface still holds this implementation, since not a single platform I could found in kernel tree which follows this implementation. Since this implementation has been suggested by 'Richard Purdie', and I was readily having this patch so I am submitting it for review. The next version of patch will be devided into 3 seperate patches - twl4030 related changes - OMAPFB related changes - board-omap3evm.c related changes. TODO: - Need to add simillar support for other platforms and development boards. - Merge it to DSS2 and OMAP2FB Signed-off-by: Brijesh Jadav <bri...@ti...> Signed-off-by: Hardik Shah <har...@ti...> Signed-off-by: Vaibhav Hiremath <hva...@ti...> --- arch/arm/mach-omap2/board-omap3evm.c | 37 ++++++++++++++++++++ arch/arm/plat-omap/include/mach/omapfb.h | 4 -- drivers/video/omap/lcd_omap3evm.c | 27 --------------- drivers/video/omap/omapfb_main.c | 54 ------------------------------ include/linux/i2c/twl4030.h | 14 ++++++++ 5 files changed, 51 insertions(+), 85 deletions(-) diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 024d7c4..c749604 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -20,6 +20,7 @@ #include <linux/clk.h> #include <linux/input.h> #include <linux/leds.h> +#include <linux/backlight.h> #include <linux/spi/spi.h> #include <linux/spi/ads7846.h> @@ -225,6 +226,41 @@ static struct omap_lcd_config omap3_evm_lcd_config __initdata = { .ctrl_name = "internal", }; +#define TWL_PWMA_PWMAOFF 0x01 + +static void omap3_set_bl_intensity(int intensity) +{ + unsigned char c; + + if (intensity > 100) + return; + + c = ((125 * (100 - intensity)) / 100) + 2; + +#if defined(CONFIG_TWL4030_CORE) + twl4030_i2c_write_u8(TWL4030_MODULE_LED, 0x11, TWL4030_LED_EN); + twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, c, TWL_PWMA_PWMAOFF); +#endif + +} +static struct generic_bl_info omap3_bl_platform_data = { + .name = "omap3-bklight", + .max_intensity = 100, + .default_intensity = 70, + .limit_mask = 0, + .set_bl_intensity = omap3_set_bl_intensity, + .kick_battery = NULL, +}; + +static struct platform_device omap3_bklight_device = { + .name = "generic-bl", + .id = -1, + .dev = { + .parent = &omap3_evm_lcd_device.dev, + .platform_data = &omap3_bl_platform_data, + }, +}; + static void ads7846_dev_init(void) { if (gpio_request(OMAP3_EVM_TS_GPIO, "ADS7846 pendown") < 0) @@ -286,6 +322,7 @@ static struct omap_board_config_kernel omap3_evm_config[] __initdata = { static struct platform_device *omap3_evm_devices[] __initdata = { &omap3_evm_lcd_device, + &omap3_bklight_device, &omap3evm_smc911x_device, }; diff --git a/arch/arm/plat-omap/include/mach/omapfb.h b/arch/arm/plat-omap/include/mach/omapfb.h index b226bdf..b87466b 100644 --- a/arch/arm/plat-omap/include/mach/omapfb.h +++ b/arch/arm/plat-omap/include/mach/omapfb.h @@ -218,10 +218,6 @@ struct lcd_panel { int (*enable) (struct lcd_panel *panel); void (*disable) (struct lcd_panel *panel); unsigned long (*get_caps) (struct lcd_panel *panel); - int (*set_bklight_level)(struct lcd_panel *panel, - unsigned int level); - unsigned int (*get_bklight_level)(struct lcd_panel *panel); - unsigned int (*get_bklight_max) (struct lcd_panel *panel); int (*run_test) (struct lcd_panel *panel, int test_num); }; diff --git a/drivers/video/omap/lcd_omap3evm.c b/drivers/video/omap/lcd_omap3evm.c index 1c3d814..23238ae 100644 --- a/drivers/video/omap/lcd_omap3evm.c +++ b/drivers/video/omap/lcd_omap3evm.c @@ -49,7 +49,6 @@ #define TWL_PWMA_PWMAON 0x00 #define TWL_PWMA_PWMAOFF 0x01 -static unsigned int bklight_level; static int omap3evm_panel_init(struct lcd_panel *panel, struct omapfb_device *fbdev) @@ -69,7 +68,6 @@ static int omap3evm_panel_init(struct lcd_panel *panel, twl4030_i2c_write_u8(TWL4030_MODULE_LED, 0x11, TWL_LED_LEDEN); twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x01, TWL_PWMA_PWMAON); twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x02, TWL_PWMA_PWMAOFF); - bklight_level = 100; return 0; } @@ -94,28 +92,6 @@ static unsigned long omap3evm_panel_get_caps(struct lcd_panel *panel) return 0; } -static int omap3evm_bklight_setlevel(struct lcd_panel *panel, - unsigned int level) -{ - u8 c; - if ((level >= 0) && (level <= 100)) { - c = (125 * (100 - level)) / 100 + 2; - twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, c, TWL_PWMA_PWMAOFF); - bklight_level = level; - } - return 0; -} - -static unsigned int omap3evm_bklight_getlevel(struct lcd_panel *panel) -{ - return bklight_level; -} - -static unsigned int omap3evm_bklight_getmaxlevel(struct lcd_panel *panel) -{ - return 100; -} - struct lcd_panel omap3evm_panel = { .name = "omap3evm", .config = OMAP_LCDC_PANEL_TFT | OMAP_LCDC_INV_VSYNC | @@ -139,9 +115,6 @@ struct lcd_panel omap3evm_panel = { .enable = omap3evm_panel_enable, .disable = omap3evm_panel_disable, .get_caps = omap3evm_panel_get_caps, - .set_bklight_level = omap3evm_bklight_setlevel, - .get_bklight_level = omap3evm_bklight_getlevel, - .get_bklight_max = omap3evm_bklight_getmaxlevel, }; static int omap3evm_panel_probe(struct platform_device *pdev) diff --git a/drivers/video/omap/omapfb_main.c b/drivers/video/omap/omapfb_main.c index 3bb4247..2d1dcfb 100644 --- a/drivers/video/omap/omapfb_main.c +++ b/drivers/video/omap/omapfb_main.c @@ -1345,65 +1345,11 @@ static ssize_t omapfb_show_panel_name(struct device *dev, return snprintf(buf, PAGE_SIZE, "%s\n", fbdev->panel->name); } -static ssize_t omapfb_show_bklight_level(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct omapfb_device *fbdev = (struct omapfb_device *)dev->driver_data; - int r; - - if (fbdev->panel->get_bklight_level) { - r = snprintf(buf, PAGE_SIZE, "%d\n", - fbdev->panel->get_bklight_level(fbdev->panel)); - } else - r = -ENODEV; - return r; -} - -static ssize_t omapfb_store_bklight_level(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - struct omapfb_device *fbdev = (struct omapfb_device *)dev->driver_data; - int r; - - if (fbdev->panel->set_bklight_level) { - unsigned int level; - - if (sscanf(buf, "%10d", &level) == 1) { - r = fbdev->panel->set_bklight_level(fbdev->panel, - level); - } else - r = -EINVAL; - } else - r = -ENODEV; - return r ? r : size; -} - -static ssize_t omapfb_show_bklight_max(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct omapfb_device *fbdev = (struct omapfb_device *)dev->driver_data; - int r; - - if (fbdev->panel->get_bklight_level) { - r = snprintf(buf, PAGE_SIZE, "%d\n", - fbdev->panel->get_bklight_max(fbdev->panel)); - } else - r = -ENODEV; - return r; -} - static struct device_attribute dev_attr_panel_name = __ATTR(name, 0444, omapfb_show_panel_name, NULL); -static DEVICE_ATTR(backlight_level, 0664, - omapfb_show_bklight_level, omapfb_store_bklight_level); -static DEVICE_ATTR(backlight_max, 0444, omapfb_show_bklight_max, NULL); static struct attribute *panel_attrs[] = { &dev_attr_panel_name.attr, - &dev_attr_backlight_level.attr, - &dev_attr_backlight_max.attr, NULL, }; diff --git a/include/linux/i2c/twl4030.h b/include/linux/i2c/twl4030.h index c89d33b..48063ba 100644 --- a/include/linux/i2c/twl4030.h +++ b/include/linux/i2c/twl4030.h @@ -84,6 +84,20 @@ int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes); /*----------------------------------------------------------------------*/ /* + * LED Module register offsets (use TWL4030_MODULE_LED) + */ +#define TWL4030_LED_EN 0x0 + +/*----------------------------------------------------------------------*/ + +/* + * PWMA/B register offsets (use TWL4030_MODULE_PWMA/TWL4030_MODULE_PWMB) + */ +#define TWL4030_LED_PWMON 0x0 +#define TWL4030_LED_PWMOFF 0x1 + + +/* * NOTE: at up to 1024 registers, this is a big chip. * * Avoid putting register declarations in this file, instead of into -- 1.5.6 |
From: David B. <da...@pa...> - 2009-03-19 22:00:45
|
On Wednesday 18 March 2009, hva...@ti... wrote: > + > +#if defined(CONFIG_TWL4030_CORE) > + twl4030_i2c_write_u8(TWL4030_MODULE_LED, 0x11, TWL4030_LED_EN); > + twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, c, TWL_PWMA_PWMAOFF); > +#endif Hmm, I think I'm going to have to get off my butt and send in the PWM patches I have ... they work for the PWMs on the two LED outputs, but not yet for the two other PWM-equipped pins (GPIO-6, GPIO-7) - Dave |
From: <hva...@ti...> - 2009-08-11 10:41:06
|
From: Vaibhav Hiremath <hva...@ti...> Tested - - Validated all three outut interfaces (LCD, DVI and TV) TODO: - Support for Backlight control range (0 - 100) - Enable selection for both S-Video and Composite TV out - DVI color (VPLL2_DEV_GRP should be equal to 0x7) Signed-off-by: Vaibhav Hiremath <hva...@ti...> --- arch/arm/configs/omap3_evm_defconfig | 51 +++++++- arch/arm/mach-omap2/board-omap3evm.c | 234 ++++++++++++++++++++++++++++++++-- 2 files changed, 273 insertions(+), 12 deletions(-) diff --git a/arch/arm/configs/omap3_evm_defconfig b/arch/arm/configs/omap3_evm_defconfig index 28be17f..c9cc935 100644 --- a/arch/arm/configs/omap3_evm_defconfig +++ b/arch/arm/configs/omap3_evm_defconfig @@ -903,7 +903,56 @@ CONFIG_DAB=y # # CONFIG_VGASTATE is not set CONFIG_VIDEO_OUTPUT_CONTROL=m -# CONFIG_FB is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set +CONFIG_OMAP2_VRAM=y +CONFIG_OMAP2_VRFB=y +CONFIG_OMAP2_DSS=y +CONFIG_OMAP2_VRAM_SIZE=4 +# CONFIG_OMAP2_DSS_DEBUG_SUPPORT is not set +# CONFIG_OMAP2_DSS_RFBI is not set +CONFIG_OMAP2_DSS_VENC=y +# CONFIG_OMAP2_DSS_SDI is not set +# CONFIG_OMAP2_DSS_DSI is not set +# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set +CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 +CONFIG_FB_OMAP2=y +# CONFIG_FB_OMAP2_DEBUG_SUPPORT is not set +# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set +CONFIG_FB_OMAP2_NUM_FBS=3 + +# +# OMAP2/3 Display Device Drivers +# +CONFIG_PANEL_GENERIC=y +# CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C is not set +CONFIG_PANEL_SHARP_LS037V7DW01=y # CONFIG_BACKLIGHT_LCD_SUPPORT is not set # diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 595beac..d488e29 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -22,6 +22,7 @@ #include <linux/input.h> #include <linux/leds.h> +#include <linux/regulator/machine.h> #include <linux/spi/spi.h> #include <linux/spi/ads7846.h> #include <linux/i2c/twl4030.h> @@ -37,6 +38,7 @@ #include <mach/common.h> #include <mach/mcspi.h> #include <mach/keypad.h> +#include <mach/display.h> #include "sdram-micron-mt46h32m32lf-6.h" #include "mmc-twl4030.h" @@ -90,6 +92,174 @@ static inline void __init omap3evm_init_smc911x(void) gpio_direction_input(OMAP3EVM_ETHR_GPIO_IRQ); } +/* + * OMAP3EVM LCD Panel control signals + */ +#define OMAP3EVM_LCD_PANEL_LR 2 +#define OMAP3EVM_LCD_PANEL_UD 3 +#define OMAP3EVM_LCD_PANEL_INI 152 +#define OMAP3EVM_LCD_PANEL_ENVDD 153 +#define OMAP3EVM_LCD_PANEL_QVGA 154 +#define OMAP3EVM_LCD_PANEL_RESB 155 +#define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210 +#define OMAP3EVM_DVI_PANEL_EN_GPIO 199 + +static int lcd_enabled; +static int dvi_enabled; + +static void __init omap3_evm_display_init(void) +{ + int r; + r = gpio_request(OMAP3EVM_LCD_PANEL_RESB, "lcd_panel_resb"); + if (r) { + printk(KERN_ERR "failed to get lcd_panel_resb\n"); + return; + } + gpio_direction_output(OMAP3EVM_LCD_PANEL_RESB, 1); + + r = gpio_request(OMAP3EVM_LCD_PANEL_INI, "lcd_panel_ini"); + if (r) { + printk(KERN_ERR "failed to get lcd_panel_ini\n"); + goto err_1; + } + gpio_direction_output(OMAP3EVM_LCD_PANEL_INI, 1); + + r = gpio_request(OMAP3EVM_LCD_PANEL_QVGA, "lcd_panel_qvga"); + if (r) { + printk(KERN_ERR "failed to get lcd_panel_qvga\n"); + goto err_2; + } + gpio_direction_output(OMAP3EVM_LCD_PANEL_QVGA, 0); + + r = gpio_request(OMAP3EVM_LCD_PANEL_LR, "lcd_panel_lr"); + if (r) { + printk(KERN_ERR "failed to get lcd_panel_lr\n"); + goto err_3; + } + gpio_direction_output(OMAP3EVM_LCD_PANEL_LR, 1); + + r = gpio_request(OMAP3EVM_LCD_PANEL_UD, "lcd_panel_ud"); + if (r) { + printk(KERN_ERR "failed to get lcd_panel_ud\n"); + goto err_4; + } + gpio_direction_output(OMAP3EVM_LCD_PANEL_UD, 1); + + r = gpio_request(OMAP3EVM_LCD_PANEL_ENVDD, "lcd_panel_envdd"); + if (r) { + printk(KERN_ERR "failed to get lcd_panel_envdd\n"); + goto err_5; + } + + return; + +err_5: + gpio_free(OMAP3EVM_LCD_PANEL_UD); +err_4: + gpio_free(OMAP3EVM_LCD_PANEL_LR); +err_3: + gpio_free(OMAP3EVM_LCD_PANEL_QVGA); +err_2: + gpio_free(OMAP3EVM_LCD_PANEL_INI); +err_1: + gpio_free(OMAP3EVM_LCD_PANEL_RESB); + +} + +static int omap3_evm_enable_lcd(struct omap_dss_device *dssdev) +{ + if (dvi_enabled) { + printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); + return -EINVAL; + } + + gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 0); + gpio_set_value(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1); + lcd_enabled = 1; + return 0; +} + +static void omap3_evm_disable_lcd(struct omap_dss_device *dssdev) +{ + gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 1); + gpio_set_value(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0); + lcd_enabled = 0; +} + +static struct omap_dss_device omap3_evm_lcd_device = { + .type = OMAP_DISPLAY_TYPE_DPI, + .name = "lcd", + .driver_name = "sharp_ls_panel", + .phy.dpi.data_lines = 18, + .platform_enable = omap3_evm_enable_lcd, + .platform_disable = omap3_evm_disable_lcd, +}; + +static int omap3_evm_enable_tv(struct omap_dss_device *dssdev) +{ + return 0; +} + +static void omap3_evm_disable_tv(struct omap_dss_device *dssdev) +{ +} + +static struct omap_dss_device omap3_evm_tv_device = { + .type = OMAP_DISPLAY_TYPE_VENC, + .name = "tv", + .driver_name = "venc", + .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, + .platform_enable = omap3_evm_enable_tv, + .platform_disable = omap3_evm_disable_tv, +}; + +static int omap3_evm_enable_dvi(struct omap_dss_device *dssdev) +{ + if (lcd_enabled) { + printk(KERN_ERR "cannot enable DVI, LCD is enabled\n"); + return -EINVAL; + } + + gpio_set_value(OMAP3EVM_DVI_PANEL_EN_GPIO, 1); + dvi_enabled = 1; + + return 0; +} + +static void omap3_evm_disable_dvi(struct omap_dss_device *dssdev) +{ + gpio_set_value(OMAP3EVM_DVI_PANEL_EN_GPIO, 0); + dvi_enabled = 0; +} + +static struct omap_dss_device omap3_evm_dvi_device = { + .type = OMAP_DISPLAY_TYPE_DPI, + .name = "dvi", + .driver_name = "generic_panel", + .phy.dpi.data_lines = 24, + .platform_enable = omap3_evm_enable_dvi, + .platform_disable = omap3_evm_disable_dvi, +}; + +static struct omap_dss_device *omap3_evm_dss_devices[] = { + &omap3_evm_lcd_device, + &omap3_evm_tv_device, + &omap3_evm_dvi_device, +}; + +static struct omap_dss_board_info omap3_evm_dss_data = { + .num_devices = ARRAY_SIZE(omap3_evm_dss_devices), + .devices = omap3_evm_dss_devices, + .default_device = &omap3_evm_lcd_device, +}; + +static struct platform_device omap3_evm_dss_device = { + .name = "omapdss", + .id = -1, + .dev = { + .platform_data = &omap3_evm_dss_data, + }, +}; static struct omap_uart_config omap3_evm_uart_config __initdata = { .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), @@ -142,6 +312,14 @@ static int omap3evm_twl_gpio_setup(struct device *dev, * the P2 connector; notably LEDA for the LCD backlight. */ + /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */ + gpio_request(gpio + TWL4030_GPIO_MAX, "EN_LCD_BKL"); + gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0); + + /* gpio + 7 == DVI Enable */ + gpio_request(gpio + 7, "EN_DVI"); + gpio_direction_output(gpio + 7, 0); + /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */ gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; @@ -193,6 +371,47 @@ static struct twl4030_madc_platform_data omap3evm_madc_data = { .irq_line = 1, }; +static struct regulator_consumer_supply omap3_evm_vdda_dac_supply = { + .supply = "vdda_dac", + .dev = &omap3_evm_dss_device.dev, +}; + +/* VDAC for DSS driving S-Video */ +static struct regulator_init_data omap3_evm_vdac = { + .constraints = { + .min_uV = 1800000, + .max_uV = 1800000, + .apply_uV = true, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = 1, + .consumer_supplies = &omap3_evm_vdda_dac_supply, +}; + +/* VPLL2 for digital video outputs */ +static struct regulator_consumer_supply omap3_evm_vpll2_supply = { + .supply = "vdvi", + .dev = &omap3_evm_lcd_device.dev, +}; + +static struct regulator_init_data omap3_evm_vpll2 = { + .constraints = { + .name = "VDVI", + .min_uV = 1800000, + .max_uV = 1800000, + .apply_uV = true, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = 1, + .consumer_supplies = &omap3_evm_vpll2_supply, +}; + static struct twl4030_platform_data omap3evm_twldata = { .irq_base = TWL4030_IRQ_BASE, .irq_end = TWL4030_IRQ_END, @@ -202,6 +421,8 @@ static struct twl4030_platform_data omap3evm_twldata = { .madc = &omap3evm_madc_data, .usb = &omap3evm_usb_data, .gpio = &omap3evm_gpio_data, + .vdac = &omap3_evm_vdac, + .vpll2 = &omap3_evm_vpll2, }; static struct i2c_board_info __initdata omap3evm_i2c_boardinfo[] = { @@ -222,15 +443,6 @@ static int __init omap3_evm_i2c_init(void) return 0; } -static struct platform_device omap3_evm_lcd_device = { - .name = "omap3evm_lcd", - .id = -1, -}; - -static struct omap_lcd_config omap3_evm_lcd_config __initdata = { - .ctrl_name = "internal", -}; - static void ads7846_dev_init(void) { if (gpio_request(OMAP3_EVM_TS_GPIO, "ADS7846 pendown") < 0) @@ -287,11 +499,10 @@ static void __init omap3_evm_init_irq(void) static struct omap_board_config_kernel omap3_evm_config[] __initdata = { { OMAP_TAG_UART, &omap3_evm_uart_config }, - { OMAP_TAG_LCD, &omap3_evm_lcd_config }, }; static struct platform_device *omap3_evm_devices[] __initdata = { - &omap3_evm_lcd_device, + &omap3_evm_dss_device, &omap3evm_smc911x_device, }; @@ -310,6 +521,7 @@ static void __init omap3_evm_init(void) usb_musb_init(); usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, true, true, 57, 61); ads7846_dev_init(); + omap3_evm_display_init(); } static void __init omap3_evm_map_io(void) -- 1.6.2.4 |
From: Randy D. <ran...@or...> - 2009-12-17 16:44:13
|
On Thu, 17 Dec 2009 20:49:36 +0530 hva...@ti... wrote: > From: Vaibhav Hiremath <hva...@ti...> > > Config option added to arch/arm/plat-omap/Kconfig for selection > of S-Video and Composite output interfaces. The default configuration would > be S-Video. > > Signed-off-by: Vaibhav Hiremath <hva...@ti...> > --- > arch/arm/mach-omap2/board-omap3evm.c | 4 ++++ > drivers/video/omap2/dss/Kconfig | 15 +++++++++++++++ > 2 files changed, 19 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c > index e615254..549e58e 100644 > --- a/arch/arm/mach-omap2/board-omap3evm.c > +++ b/arch/arm/mach-omap2/board-omap3evm.c > @@ -275,7 +275,11 @@ static struct omap_dss_device omap3_evm_tv_device = { > .name = "tv", > .driver_name = "venc", > .type = OMAP_DISPLAY_TYPE_VENC, > +#if defined(CONFIG_OMAP2_VENC_OUT_TYPE_SVIDEO) > .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, > +#elif defined(CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE) > + .u.venc.type = OMAP_DSS_VENC_TYPE_COMPOSITE, .u or .phy ? > +#endif > .platform_enable = omap3_evm_enable_tv, > .platform_disable = omap3_evm_disable_tv, > }; --- ~Randy |