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From: Toralf F. <tor...@gm...> - 2009-07-28 16:31:47
|
Resend after checkpatch.pl doesn't complained about it : Signed-off-by: Toralf Foerster <tor...@gm...> --- drivers/video/fbmon.c | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/video/fbmon.c b/drivers/video/fbmon.c index 9ae9cd3..e1b7073 100644 --- a/drivers/video/fbmon.c +++ b/drivers/video/fbmon.c @@ -277,17 +277,17 @@ static int edid_checksum(unsigned char *edid) static int edid_check_header(unsigned char *edid) { - int i, err = 1, fix = check_edid(edid); + int i, fix = check_edid(edid); if (fix) fix_edid(edid, fix); for (i = 0; i < 8; i++) { if (edid[i] != edid_v1_header[i]) - err = 0; + return 0; } - return err; + return 1; } static void parse_vendor_block(unsigned char *block, struct fb_monspecs *specs) -- MfG/Sincerely Toralf Förster pgp finger print: 7B1A 07F4 EC82 0F90 D4C2 8936 872A E508 7DB6 9DA3 |
From: Andrew M. <ak...@li...> - 2009-07-27 23:34:02
|
(cc linux-fbdev-devel) (un-cc adaplas - he hasn't been heard from for over a year) On Fri, 24 Jul 2009 21:23:46 +0200 Stefani Seibold <st...@se...> wrote: > Attached is a bug fix for the frame console. > > The current frame buffer console upside down functionality will crash > using a font which has not a width of multiple by 8. > > The following 1 liner will fix the rotate_ud() function, > > fbcon_rotate.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > --- linux-2.6.31-rc4/drivers/video/console/fbcon_rotate.h 2009-07-24 > 20:37:31.000000000 +0200 > +++ linux-2.6.31-rc4.orig/drivers/video/console/fbcon_rotate.h > 2009-06-10 05:05:27.000000000 +0200 > @@ -45,7 +45,7 @@ > width = (width + 7) & ~7; > > for (i = 0; i < height; i++) { > - for (j = 0; j < width - shift; j++) { > + for (j = 0; j < width; j++) { > if (pattern_test_bit(j, i, width, in)) > pattern_set_bit(width - (1 + j + shift), > height - (1 + i), > I suspect that the patch was reversed, and that you intended this: - for (j = 0; j < width; j++) { + for (j = 0; j < width - shift; j++) { yes? The patch was wordwrapped too - please fix the email client. If/when resending, please add to the changelog a bit of an explanation about the change - what was wrong with the old code and how does the new code fix it, thanks. |
From: GnuCash A. <adm...@gm...> - 2009-07-27 13:19:40
|
Hello to All. I need to rotate the framebuffer console on a keyboard event inside the keyboard driver itself. What for functions and header files ared needed to be included and started to get this to work in the driver. In the file fbcon.c exist functions like "fbcon_rotate_all" but i dont know if it is possible and how it is possible to call this function from the keyboard driver. Thanks in advance for the start help. Greetings |
From: Sudhakar R. <sud...@ti...> - 2009-07-27 12:55:20
|
Hi, On Sat, Jul 25, 2009 at 02:53:36, Andrew Morton wrote: > On Wed, 22 Jul 2009 00:47:00 -0400 > Sudhakar Rajashekhara <sud...@ti...> wrote: > > > Adds LCD controller (LCDC) driver for TI's DA8xx/OMAP-L1xx > > architecture. LCDC specifications can be found at > > http://www.ti.com/litv/pdf/sprufm0a. > > > > LCDC on DA8xx consists of two independent controllers, the > > Raster Controller and the LCD Interface Display Driver (LIDD) > > controller. LIDD further supports character and graphic displays. > > > > This patch adds support for the graphic display (Sharp LQ035Q3DG01) > > found on the DA830 based EVM. The EVM details can be found at: > > http://support.spectrumdigital.com/boards/dskda830/revc/. > > > > Signed-off-by: Sudhakar Rajashekhara <sud...@ti...> > > Signed-off-by: Pavel Kiryukhin <pki...@ru...> > > Signed-off-by: Steve Chen <sc...@mv...> > > Acked-by: Krzysztof Helt <krz...@wp...> > > --- > > This patch applies to Linus's Kernel tree. > > > > Since the previous version, return values in ioctl() > > function have been modified. > > That wasn't the only change in version 4: > I missed documenting all the modifications. I'll take care of it. > --- a/drivers/video/da8xx-fb.c~davinci-fb-frame-buffer-driver-for-ti-da8xx-omap-l1xx-v4 > +++ a/drivers/video/da8xx-fb.c > @@ -201,14 +201,13 @@ static int lcd_disable_raster(struct da8 > ret = wait_event_interruptible_timeout(par->da8xx_wq, > !lcdc_read(LCD_STAT_REG) & > LCD_END_OF_FRAME0, WSI_TIMEOUT); > + if (ret < 0) > + return ret; > + if (ret == 0) > + ret = -ETIMEDOUT; > } > > - if (ret < 0) > - return ret; > - if (ret == 0) > - return -ETIMEDOUT; > - > - return 0; > + return ret; > } > > static void lcd_blit(int load_mode, struct da8xx_fb_par *par) > @@ -634,11 +633,11 @@ static int fb_ioctl(struct fb_info *info > case FBIPUT_BRIGHTNESS: > case FBIGET_COLOR: > case FBIPUT_COLOR: > - return -EINVAL; > + return -ENOTTY; > case FBIPUT_HSYNC: > if (copy_from_user(&sync_arg, (char *)arg, > sizeof(struct lcd_sync_arg))) > - return -EINVAL; > + return -EFAULT; > lcd_cfg_horizontal_sync(sync_arg.back_porch, > sync_arg.pulse_width, > sync_arg.front_porch); > @@ -646,7 +645,7 @@ static int fb_ioctl(struct fb_info *info > case FBIPUT_VSYNC: > if (copy_from_user(&sync_arg, (char *)arg, > sizeof(struct lcd_sync_arg))) > - return -EINVAL; > + return -EFAULT; > lcd_cfg_vertical_sync(sync_arg.back_porch, > sync_arg.pulse_width, > sync_arg.front_porch); > _ > > > Was that intentional? > Yes. As per your review comment last time I have changed the return value in case of error from "copy_from_user" to -EFAULT. Changing the return value of non-implemented ioctls to -ENOTTY seems more appropriate as per the man page of ioctl. > > The change to lcd_disable_raster() is a bit odd: > > static int lcd_disable_raster(struct da8xx_fb_par *par) > { > int ret = 0; > u32 reg; > > reg = lcdc_read(LCD_RASTER_CTRL_REG); > if (reg & LCD_RASTER_ENABLE) { > lcdc_write(reg & ~LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG); > ret = wait_event_interruptible_timeout(par->da8xx_wq, > !lcdc_read(LCD_STAT_REG) & > LCD_END_OF_FRAME0, WSI_TIMEOUT); > if (ret < 0) > return ret; > if (ret == 0) > ret = -ETIMEDOUT; > } > > return ret; > } > > > We can do this, yes? > Right. I'll submit an updated version of this patch with all these changes. > --- a/drivers/video/da8xx-fb.c~davinci-fb-frame-buffer-driver-for-ti-da8xx-omap-l1xx-v4-cleanup > +++ a/drivers/video/da8xx-fb.c > @@ -201,8 +201,6 @@ static int lcd_disable_raster(struct da8 > ret = wait_event_interruptible_timeout(par->da8xx_wq, > !lcdc_read(LCD_STAT_REG) & > LCD_END_OF_FRAME0, WSI_TIMEOUT); > - if (ret < 0) > - return ret; > if (ret == 0) > ret = -ETIMEDOUT; > } > _ > Thanks, Sudhakar |
From: Toralf F. <tor...@gm...> - 2009-07-25 17:44:50
|
fbmon.c: integer err is not needed Signed-off-by: Toralf Foerster <tor...@gm...> --- drivers/video/fbmon.c | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/video/fbmon.c b/drivers/video/fbmon.c index 9ae9cd3..e1b7073 100644 --- a/drivers/video/fbmon.c +++ b/drivers/video/fbmon.c @@ -277,17 +277,17 @@ static int edid_checksum(unsigned char *edid) static int edid_check_header(unsigned char *edid) { - int i, err = 1, fix = check_edid(edid); + int i, fix = check_edid(edid); if (fix) fix_edid(edid, fix); for (i = 0; i < 8; i++) { if (edid[i] != edid_v1_header[i]) - err = 0; + return 0; } - return err; + return 1; } static void parse_vendor_block(unsigned char *block, struct fb_monspecs *specs) -- MfG/Sincerely Toralf Förster pgp finger print: 7B1A 07F4 EC82 0F90 D4C2 8936 872A E508 7DB6 9DA3 |
From: Florian T. S. <Flo...@gm...> - 2009-07-25 16:18:32
|
viafb: fix rmmod bug This fixes a bug caused by changing pointers (viafb_mode, viafb_mode1) assigned by module_param. It reduces driver complexity by not needlessly changing these vars as they are only read once and removing now superfluous code. Signed-off-by: Florian Tobias Schandinat <Flo...@gm...> --- hw.c | 4 +- lcd.c | 15 ++------- viafbdev.c | 101 ++++++++++++++++++++++++++++-------------------------------- viafbdev.h | 3 +- 4 files changed, 53 insertions(+), 70 deletions(-) diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c index fcd53ce..c896000 100644 --- a/drivers/video/via/hw.c +++ b/drivers/video/via/hw.c @@ -2407,14 +2407,14 @@ int viafb_setmode(int vmode_index, int hor_res, int ver_res, int video_bpp, viafb_dvi_set_mode(viafb_get_mode_index (viaparinfo->tmds_setting_info->h_active, viaparinfo->tmds_setting_info-> - v_active, 1), + v_active), video_bpp1, viaparinfo-> tmds_setting_info->iga_path); } else { viafb_dvi_set_mode(viafb_get_mode_index (viaparinfo->tmds_setting_info->h_active, viaparinfo-> - tmds_setting_info->v_active, 0), + tmds_setting_info->v_active), video_bpp, viaparinfo-> tmds_setting_info->iga_path); } diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c index 6c7290a..78c6b33 100644 --- a/drivers/video/via/lcd.c +++ b/drivers/video/via/lcd.c @@ -580,10 +580,7 @@ static void load_lcd_k400_patch_tbl(int set_hres, int set_vres, int reg_num = 0; struct io_reg *lcd_patch_reg = NULL; - if (viaparinfo->lvds_setting_info->iga_path == IGA2) - vmode_index = viafb_get_mode_index(set_hres, set_vres, 1); - else - vmode_index = viafb_get_mode_index(set_hres, set_vres, 0); + vmode_index = viafb_get_mode_index(set_hres, set_vres); switch (panel_id) { /* LCD 800x600 */ case LCD_PANEL_ID1_800X600: @@ -761,10 +758,7 @@ static void load_lcd_p880_patch_tbl(int set_hres, int set_vres, int reg_num = 0; struct io_reg *lcd_patch_reg = NULL; - if (viaparinfo->lvds_setting_info->iga_path == IGA2) - vmode_index = viafb_get_mode_index(set_hres, set_vres, 1); - else - vmode_index = viafb_get_mode_index(set_hres, set_vres, 0); + vmode_index = viafb_get_mode_index(set_hres, set_vres); switch (panel_id) { case LCD_PANEL_ID5_1400X1050: @@ -832,10 +826,7 @@ static void load_lcd_patch_regs(int set_hres, int set_vres, { int vmode_index; - if (viaparinfo->lvds_setting_info->iga_path == IGA2) - vmode_index = viafb_get_mode_index(set_hres, set_vres, 1); - else - vmode_index = viafb_get_mode_index(set_hres, set_vres, 0); + vmode_index = viafb_get_mode_index(set_hres, set_vres); viafb_unlock_crt(); diff --git a/drivers/video/via/viafbdev.c b/drivers/video/via/viafbdev.c index a0fec29..72833f3 100644 --- a/drivers/video/via/viafbdev.c +++ b/drivers/video/via/viafbdev.c @@ -32,7 +32,6 @@ static u32 pseudo_pal[17]; /* video mode */ static char *viafb_mode = "640x480"; static char *viafb_mode1 = "640x480"; -static int viafb_resMode = VIA_RES_640X480; /* Added for specifying active devices.*/ char *viafb_active_dev = ""; @@ -56,47 +55,47 @@ static void viafb_get_video_device(u32 *video_dev_info); /* Mode information */ static const struct viafb_modeinfo viafb_modentry[] = { - {480, 640, VIA_RES_480X640, "480x640"}, - {640, 480, VIA_RES_640X480, "640x480"}, - {800, 480, VIA_RES_800X480, "800x480"}, - {800, 600, VIA_RES_800X600, "800x600"}, - {1024, 768, VIA_RES_1024X768, "1024x768"}, - {1152, 864, VIA_RES_1152X864, "1152x864"}, - {1280, 1024, VIA_RES_1280X1024, "1280x1024"}, - {1600, 1200, VIA_RES_1600X1200, "1600x1200"}, - {1440, 1050, VIA_RES_1440X1050, "1440x1050"}, - {1280, 768, VIA_RES_1280X768, "1280x768"}, - {1280, 800, VIA_RES_1280X800, "1280x800"}, - {1280, 960, VIA_RES_1280X960, "1280x960"}, - {1920, 1440, VIA_RES_1920X1440, "1920x1440"}, - {848, 480, VIA_RES_848X480, "848x480"}, - {1400, 1050, VIA_RES_1400X1050, "1400x1050"}, - {720, 480, VIA_RES_720X480, "720x480"}, - {720, 576, VIA_RES_720X576, "720x576"}, - {1024, 512, VIA_RES_1024X512, "1024x512"}, - {1024, 576, VIA_RES_1024X576, "1024x576"}, - {1024, 600, VIA_RES_1024X600, "1024x600"}, - {1280, 720, VIA_RES_1280X720, "1280x720"}, - {1920, 1080, VIA_RES_1920X1080, "1920x1080"}, - {1366, 768, VIA_RES_1368X768, "1368x768"}, - {1680, 1050, VIA_RES_1680X1050, "1680x1050"}, - {960, 600, VIA_RES_960X600, "960x600"}, - {1000, 600, VIA_RES_1000X600, "1000x600"}, - {1024, 576, VIA_RES_1024X576, "1024x576"}, - {1024, 600, VIA_RES_1024X600, "1024x600"}, - {1088, 612, VIA_RES_1088X612, "1088x612"}, - {1152, 720, VIA_RES_1152X720, "1152x720"}, - {1200, 720, VIA_RES_1200X720, "1200x720"}, - {1280, 600, VIA_RES_1280X600, "1280x600"}, - {1360, 768, VIA_RES_1360X768, "1360x768"}, - {1440, 900, VIA_RES_1440X900, "1440x900"}, - {1600, 900, VIA_RES_1600X900, "1600x900"}, - {1600, 1024, VIA_RES_1600X1024, "1600x1024"}, - {1792, 1344, VIA_RES_1792X1344, "1792x1344"}, - {1856, 1392, VIA_RES_1856X1392, "1856x1392"}, - {1920, 1200, VIA_RES_1920X1200, "1920x1200"}, - {2048, 1536, VIA_RES_2048X1536, "2048x1536"}, - {0, 0, VIA_RES_INVALID, "640x480"} + {480, 640, VIA_RES_480X640}, + {640, 480, VIA_RES_640X480}, + {800, 480, VIA_RES_800X480}, + {800, 600, VIA_RES_800X600}, + {1024, 768, VIA_RES_1024X768}, + {1152, 864, VIA_RES_1152X864}, + {1280, 1024, VIA_RES_1280X1024}, + {1600, 1200, VIA_RES_1600X1200}, + {1440, 1050, VIA_RES_1440X1050}, + {1280, 768, VIA_RES_1280X768,}, + {1280, 800, VIA_RES_1280X800}, + {1280, 960, VIA_RES_1280X960}, + {1920, 1440, VIA_RES_1920X1440}, + {848, 480, VIA_RES_848X480}, + {1400, 1050, VIA_RES_1400X1050}, + {720, 480, VIA_RES_720X480}, + {720, 576, VIA_RES_720X576}, + {1024, 512, VIA_RES_1024X512}, + {1024, 576, VIA_RES_1024X576}, + {1024, 600, VIA_RES_1024X600}, + {1280, 720, VIA_RES_1280X720}, + {1920, 1080, VIA_RES_1920X1080}, + {1366, 768, VIA_RES_1368X768}, + {1680, 1050, VIA_RES_1680X1050}, + {960, 600, VIA_RES_960X600}, + {1000, 600, VIA_RES_1000X600}, + {1024, 576, VIA_RES_1024X576}, + {1024, 600, VIA_RES_1024X600}, + {1088, 612, VIA_RES_1088X612}, + {1152, 720, VIA_RES_1152X720}, + {1200, 720, VIA_RES_1200X720}, + {1280, 600, VIA_RES_1280X600}, + {1360, 768, VIA_RES_1360X768}, + {1440, 900, VIA_RES_1440X900}, + {1600, 900, VIA_RES_1600X900}, + {1600, 1024, VIA_RES_1600X1024}, + {1792, 1344, VIA_RES_1792X1344}, + {1856, 1392, VIA_RES_1856X1392}, + {1920, 1200, VIA_RES_1920X1200}, + {2048, 1536, VIA_RES_2048X1536}, + {0, 0, VIA_RES_INVALID} }; static struct fb_ops viafb_ops; @@ -177,7 +176,7 @@ static int viafb_check_var(struct fb_var_screeninfo *var, if (var->vmode & FB_VMODE_INTERLACED || var->vmode & FB_VMODE_DOUBLE) return -EINVAL; - vmode_index = viafb_get_mode_index(var->xres, var->yres, 0); + vmode_index = viafb_get_mode_index(var->xres, var->yres); if (vmode_index == VIA_RES_INVALID) { DEBUG_MSG(KERN_INFO "viafb: Mode %dx%dx%d not supported!!\n", @@ -233,14 +232,14 @@ static int viafb_set_par(struct fb_info *info) viafb_update_device_setting(info->var.xres, info->var.yres, info->var.bits_per_pixel, viafb_refresh, 0); - vmode_index = viafb_get_mode_index(info->var.xres, info->var.yres, 0); + vmode_index = viafb_get_mode_index(info->var.xres, info->var.yres); if (viafb_SAMM_ON == 1) { DEBUG_MSG(KERN_INFO "viafb_second_xres = %d, viafb_second_yres = %d, bpp = %d\n", viafb_second_xres, viafb_second_yres, viafb_bpp1); vmode_index1 = viafb_get_mode_index(viafb_second_xres, - viafb_second_yres, 1); + viafb_second_yres); DEBUG_MSG(KERN_INFO "->viafb_SAMM_ON: index=%d\n", vmode_index1); @@ -1262,7 +1261,7 @@ static int viafb_sync(struct fb_info *info) return 0; } -int viafb_get_mode_index(int hres, int vres, int flag) +int viafb_get_mode_index(int hres, int vres) { u32 i; DEBUG_MSG(KERN_INFO "viafb_get_mode_index!\n"); @@ -1272,13 +1271,7 @@ int viafb_get_mode_index(int hres, int vres, int flag) viafb_modentry[i].yres == vres) break; - viafb_resMode = viafb_modentry[i].mode_index; - if (flag) - viafb_mode1 = viafb_modentry[i].mode_res; - else - viafb_mode = viafb_modentry[i].mode_res; - - return viafb_resMode; + return viafb_modentry[i].mode_index; } static void check_available_device_to_enable(int device_id) @@ -2199,7 +2192,7 @@ static int __devinit via_pci_probe(void) strict_strtoul(tmpc, 0, &default_xres); strict_strtoul(tmpm, 0, &default_yres); - vmode_index = viafb_get_mode_index(default_xres, default_yres, 0); + vmode_index = viafb_get_mode_index(default_xres, default_yres); DEBUG_MSG(KERN_INFO "0->index=%d\n", vmode_index); if (viafb_SAMM_ON == 1) { diff --git a/drivers/video/via/viafbdev.h b/drivers/video/via/viafbdev.h index a4158e8..227b000 100644 --- a/drivers/video/via/viafbdev.h +++ b/drivers/video/via/viafbdev.h @@ -81,7 +81,6 @@ struct viafb_modeinfo { u32 xres; u32 yres; int mode_index; - char *mode_res; }; extern unsigned int viafb_second_virtual_yres; extern unsigned int viafb_second_virtual_xres; @@ -102,7 +101,7 @@ extern int strict_strtoul(const char *cp, unsigned int base, void viafb_memory_pitch_patch(struct fb_info *info); void viafb_fill_var_timing_info(struct fb_var_screeninfo *var, int refresh, int mode_index); -int viafb_get_mode_index(int hres, int vres, int flag); +int viafb_get_mode_index(int hres, int vres); u8 viafb_gpio_i2c_read_lvds(struct lvds_setting_information *plvds_setting_info, struct lvds_chip_information *plvds_chip_info, u8 index); -- 1.6.3.2 |
From: Andrew M. <ak...@li...> - 2009-07-24 21:23:53
|
On Wed, 22 Jul 2009 00:47:00 -0400 Sudhakar Rajashekhara <sud...@ti...> wrote: > Adds LCD controller (LCDC) driver for TI's DA8xx/OMAP-L1xx > architecture. LCDC specifications can be found at > http://www.ti.com/litv/pdf/sprufm0a. > > LCDC on DA8xx consists of two independent controllers, the > Raster Controller and the LCD Interface Display Driver (LIDD) > controller. LIDD further supports character and graphic displays. > > This patch adds support for the graphic display (Sharp LQ035Q3DG01) > found on the DA830 based EVM. The EVM details can be found at: > http://support.spectrumdigital.com/boards/dskda830/revc/. > > Signed-off-by: Sudhakar Rajashekhara <sud...@ti...> > Signed-off-by: Pavel Kiryukhin <pki...@ru...> > Signed-off-by: Steve Chen <sc...@mv...> > Acked-by: Krzysztof Helt <krz...@wp...> > --- > This patch applies to Linus's Kernel tree. > > Since the previous version, return values in ioctl() > function have been modified. That wasn't the only change in version 4: --- a/drivers/video/da8xx-fb.c~davinci-fb-frame-buffer-driver-for-ti-da8xx-omap-l1xx-v4 +++ a/drivers/video/da8xx-fb.c @@ -201,14 +201,13 @@ static int lcd_disable_raster(struct da8 ret = wait_event_interruptible_timeout(par->da8xx_wq, !lcdc_read(LCD_STAT_REG) & LCD_END_OF_FRAME0, WSI_TIMEOUT); + if (ret < 0) + return ret; + if (ret == 0) + ret = -ETIMEDOUT; } - if (ret < 0) - return ret; - if (ret == 0) - return -ETIMEDOUT; - - return 0; + return ret; } static void lcd_blit(int load_mode, struct da8xx_fb_par *par) @@ -634,11 +633,11 @@ static int fb_ioctl(struct fb_info *info case FBIPUT_BRIGHTNESS: case FBIGET_COLOR: case FBIPUT_COLOR: - return -EINVAL; + return -ENOTTY; case FBIPUT_HSYNC: if (copy_from_user(&sync_arg, (char *)arg, sizeof(struct lcd_sync_arg))) - return -EINVAL; + return -EFAULT; lcd_cfg_horizontal_sync(sync_arg.back_porch, sync_arg.pulse_width, sync_arg.front_porch); @@ -646,7 +645,7 @@ static int fb_ioctl(struct fb_info *info case FBIPUT_VSYNC: if (copy_from_user(&sync_arg, (char *)arg, sizeof(struct lcd_sync_arg))) - return -EINVAL; + return -EFAULT; lcd_cfg_vertical_sync(sync_arg.back_porch, sync_arg.pulse_width, sync_arg.front_porch); _ Was that intentional? The change to lcd_disable_raster() is a bit odd: static int lcd_disable_raster(struct da8xx_fb_par *par) { int ret = 0; u32 reg; reg = lcdc_read(LCD_RASTER_CTRL_REG); if (reg & LCD_RASTER_ENABLE) { lcdc_write(reg & ~LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG); ret = wait_event_interruptible_timeout(par->da8xx_wq, !lcdc_read(LCD_STAT_REG) & LCD_END_OF_FRAME0, WSI_TIMEOUT); if (ret < 0) return ret; if (ret == 0) ret = -ETIMEDOUT; } return ret; } We can do this, yes? --- a/drivers/video/da8xx-fb.c~davinci-fb-frame-buffer-driver-for-ti-da8xx-omap-l1xx-v4-cleanup +++ a/drivers/video/da8xx-fb.c @@ -201,8 +201,6 @@ static int lcd_disable_raster(struct da8 ret = wait_event_interruptible_timeout(par->da8xx_wq, !lcdc_read(LCD_STAT_REG) & LCD_END_OF_FRAME0, WSI_TIMEOUT); - if (ret < 0) - return ret; if (ret == 0) ret = -ETIMEDOUT; } _ |
From: Roel K. <roe...@gm...> - 2009-07-23 17:48:08
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If called with mode_idx = 1, rate = 68, a read occurs from sisfb_vrate[-1].refresh. Signed-off-by: Roel Kluin <roe...@gm...> --- This presumes the conditional should be reversed, correct? diff --git a/drivers/video/sis/sis_main.c b/drivers/video/sis/sis_main.c index 636a785..35531d7 100644 --- a/drivers/video/sis/sis_main.c +++ b/drivers/video/sis/sis_main.c @@ -698,8 +698,8 @@ sisfb_search_refresh_rate(struct sis_video_info *ivideo, unsigned int rate, int rate, sisfb_vrate[i].refresh); ivideo->rate_idx = sisfb_vrate[i].idx; ivideo->refresh_rate = sisfb_vrate[i].refresh; - } else if(((rate - sisfb_vrate[i-1].refresh) <= 2) - && (sisfb_vrate[i].idx != 1)) { + } else if((sisfb_vrate[i].idx != 1) && + ((rate - sisfb_vrate[i-1].refresh) <= 2)) { DPRINTK("sisfb: Adjusting rate from %d down to %d\n", rate, sisfb_vrate[i-1].refresh); ivideo->rate_idx = sisfb_vrate[i-1].idx; |
From: Sudhakar R. <sud...@ti...> - 2009-07-22 05:38:28
|
Adds LCD controller (LCDC) driver for TI's DA8xx/OMAP-L1xx architecture. LCDC specifications can be found at http://www.ti.com/litv/pdf/sprufm0a. LCDC on DA8xx consists of two independent controllers, the Raster Controller and the LCD Interface Display Driver (LIDD) controller. LIDD further supports character and graphic displays. This patch adds support for the graphic display (Sharp LQ035Q3DG01) found on the DA830 based EVM. The EVM details can be found at: http://support.spectrumdigital.com/boards/dskda830/revc/. Signed-off-by: Sudhakar Rajashekhara <sud...@ti...> Signed-off-by: Pavel Kiryukhin <pki...@ru...> Signed-off-by: Steve Chen <sc...@mv...> Acked-by: Krzysztof Helt <krz...@wp...> --- This patch applies to Linus's Kernel tree. Since the previous version, return values in ioctl() function have been modified. drivers/video/Kconfig | 11 + drivers/video/Makefile | 1 + drivers/video/da8xx-fb.c | 908 +++++++++++++++++++++++++++++++++++++++++++++ include/video/da8xx-fb.h | 106 ++++++ 4 files changed, 1026 insertions(+), 0 deletions(-) create mode 100644 drivers/video/da8xx-fb.c create mode 100644 include/video/da8xx-fb.h diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 8afcf08..142c759 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -2039,6 +2039,17 @@ config FB_SH7760 and 8, 15 or 16 bpp color; 90 degrees clockwise display rotation for panels <= 320 pixel horizontal resolution. +config FB_DA8XX + tristate "DA8xx/OMAP-L1xx Framebuffer support" + depends on FB && ARCH_DAVINCI_DA8XX + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT + ---help--- + This is the frame buffer device driver for the TI LCD controller + found on DA8xx/OMAP-L1xx SoCs. + If unsure, say N. + config FB_VIRTUAL tristate "Virtual Frame Buffer support (ONLY FOR TESTING!)" depends on FB diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 01a819f..288d9b0 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -136,6 +136,7 @@ obj-$(CONFIG_FB_OF) += offb.o obj-$(CONFIG_FB_BF54X_LQ043) += bf54x-lq043fb.o obj-$(CONFIG_FB_BFIN_T350MCQB) += bfin-t350mcqb-fb.o obj-$(CONFIG_FB_MX3) += mx3fb.o +obj-$(CONFIG_FB_DA8XX) += da8xx-fb.o # the test framebuffer is last obj-$(CONFIG_FB_VIRTUAL) += vfb.o diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c new file mode 100644 index 0000000..58a9f23 --- /dev/null +++ b/drivers/video/da8xx-fb.c @@ -0,0 +1,908 @@ +/* + * Copyright (C) 2008-2009 MontaVista Software Inc. + * Copyright (C) 2008-2009 Texas Instruments Inc + * + * Based on the LCD driver for TI Avalanche processors written by + * Ajay Singh and Shalom Hai. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option)any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/fb.h> +#include <linux/dma-mapping.h> +#include <linux/device.h> +#include <linux/platform_device.h> +#include <linux/uaccess.h> +#include <linux/device.h> +#include <linux/interrupt.h> +#include <linux/clk.h> +#include <video/da8xx-fb.h> + +#define DRIVER_NAME "da8xx_lcdc" + +/* LCD Status Register */ +#define LCD_END_OF_FRAME0 BIT(8) +#define LCD_FIFO_UNDERFLOW BIT(5) +#define LCD_SYNC_LOST BIT(2) + +/* LCD DMA Control Register */ +#define LCD_DMA_BURST_SIZE(x) ((x) << 4) +#define LCD_DMA_BURST_1 0x0 +#define LCD_DMA_BURST_2 0x1 +#define LCD_DMA_BURST_4 0x2 +#define LCD_DMA_BURST_8 0x3 +#define LCD_DMA_BURST_16 0x4 +#define LCD_END_OF_FRAME_INT_ENA BIT(2) +#define LCD_DUAL_FRAME_BUFFER_ENABLE BIT(0) + +/* LCD Control Register */ +#define LCD_CLK_DIVISOR(x) ((x) << 8) +#define LCD_RASTER_MODE 0x01 + +/* LCD Raster Control Register */ +#define LCD_PALETTE_LOAD_MODE(x) ((x) << 20) +#define PALETTE_AND_DATA 0x00 +#define PALETTE_ONLY 0x01 + +#define LCD_MONO_8BIT_MODE BIT(9) +#define LCD_RASTER_ORDER BIT(8) +#define LCD_TFT_MODE BIT(7) +#define LCD_UNDERFLOW_INT_ENA BIT(6) +#define LCD_MONOCHROME_MODE BIT(1) +#define LCD_RASTER_ENABLE BIT(0) +#define LCD_TFT_ALT_ENABLE BIT(23) +#define LCD_STN_565_ENABLE BIT(24) + +/* LCD Raster Timing 2 Register */ +#define LCD_AC_BIAS_TRANSITIONS_PER_INT(x) ((x) << 16) +#define LCD_AC_BIAS_FREQUENCY(x) ((x) << 8) +#define LCD_SYNC_CTRL BIT(25) +#define LCD_SYNC_EDGE BIT(24) +#define LCD_INVERT_PIXEL_CLOCK BIT(22) +#define LCD_INVERT_LINE_CLOCK BIT(21) +#define LCD_INVERT_FRAME_CLOCK BIT(20) + +/* LCD Block */ +#define LCD_CTRL_REG 0x4 +#define LCD_STAT_REG 0x8 +#define LCD_RASTER_CTRL_REG 0x28 +#define LCD_RASTER_TIMING_0_REG 0x2C +#define LCD_RASTER_TIMING_1_REG 0x30 +#define LCD_RASTER_TIMING_2_REG 0x34 +#define LCD_DMA_CTRL_REG 0x40 +#define LCD_DMA_FRM_BUF_BASE_ADDR_0_REG 0x44 +#define LCD_DMA_FRM_BUF_CEILING_ADDR_0_REG 0x48 + +#define WSI_TIMEOUT 50 +#define PALETTE_SIZE 256 +#define LEFT_MARGIN 64 +#define RIGHT_MARGIN 64 +#define UPPER_MARGIN 32 +#define LOWER_MARGIN 32 + +static resource_size_t da8xx_fb_reg_base; +static struct resource *lcdc_regs; + +static inline unsigned int lcdc_read(unsigned int addr) +{ + return (unsigned int)__raw_readl(da8xx_fb_reg_base + (addr)); +} + +static inline void lcdc_write(unsigned int val, unsigned int addr) +{ + __raw_writel(val, da8xx_fb_reg_base + (addr)); +} + +struct da8xx_fb_par { + wait_queue_head_t da8xx_wq; + resource_size_t p_palette_base; + unsigned char *v_palette_base; + struct clk *lcdc_clk; + int irq; + unsigned short pseudo_palette[16]; + unsigned int databuf_sz; + unsigned int palette_sz; +}; + +/* Variable Screen Information */ +static struct fb_var_screeninfo da8xx_fb_var __devinitdata = { + .xoffset = 0, + .yoffset = 0, + .transp = {0, 0, 0}, + .nonstd = 0, + .activate = 0, + .height = -1, + .width = -1, + .pixclock = 46666, /* 46us - AUO display */ + .accel_flags = 0, + .left_margin = LEFT_MARGIN, + .right_margin = RIGHT_MARGIN, + .upper_margin = UPPER_MARGIN, + .lower_margin = LOWER_MARGIN, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED +}; + +static struct fb_fix_screeninfo da8xx_fb_fix __devinitdata = { + .id = "DA8xx FB Drv", + .type = FB_TYPE_PACKED_PIXELS, + .type_aux = 0, + .visual = FB_VISUAL_PSEUDOCOLOR, + .xpanstep = 1, + .ypanstep = 1, + .ywrapstep = 1, + .accel = FB_ACCEL_NONE +}; + +struct da8xx_panel { + const char name[25]; /* Full name <vendor>_<model> */ + unsigned short width; + unsigned short height; + int hfp; /* Horizontal front porch */ + int hbp; /* Horizontal back porch */ + int hsw; /* Horizontal Sync Pulse Width */ + int vfp; /* Vertical front porch */ + int vbp; /* Vertical back porch */ + int vsw; /* Vertical Sync Pulse Width */ + int pxl_clk; /* Pixel clock */ +}; + +static struct da8xx_panel known_lcd_panels[] = { + /* Sharp LCD035Q3DG01 */ + [0] = { + .name = "Sharp_LCD035Q3DG01", + .width = 320, + .height = 240, + .hfp = 8, + .hbp = 6, + .hsw = 0, + .vfp = 2, + .vbp = 2, + .vsw = 0, + .pxl_clk = 0x10, + }, + /* Sharp LK043T1DG01 */ + [1] = { + .name = "Sharp_LK043T1DG01", + .width = 480, + .height = 272, + .hfp = 2, + .hbp = 2, + .hsw = 41, + .vfp = 2, + .vbp = 2, + .vsw = 10, + .pxl_clk = 0x12, + }, +}; + +/* Disable the Raster Engine of the LCD Controller */ +static int lcd_disable_raster(struct da8xx_fb_par *par) +{ + int ret = 0; + u32 reg; + + reg = lcdc_read(LCD_RASTER_CTRL_REG); + if (reg & LCD_RASTER_ENABLE) { + lcdc_write(reg & ~LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG); + ret = wait_event_interruptible_timeout(par->da8xx_wq, + !lcdc_read(LCD_STAT_REG) & + LCD_END_OF_FRAME0, WSI_TIMEOUT); + if (ret < 0) + return ret; + if (ret == 0) + ret = -ETIMEDOUT; + } + + return ret; +} + +static void lcd_blit(int load_mode, struct da8xx_fb_par *par) +{ + u32 tmp = par->p_palette_base + par->databuf_sz - 4; + u32 reg; + + /* Update the databuf in the hw. */ + lcdc_write(par->p_palette_base, LCD_DMA_FRM_BUF_BASE_ADDR_0_REG); + lcdc_write(tmp, LCD_DMA_FRM_BUF_CEILING_ADDR_0_REG); + + /* Start the DMA. */ + reg = lcdc_read(LCD_RASTER_CTRL_REG); + reg &= ~(3 << 20); + if (load_mode == LOAD_DATA) + reg |= LCD_PALETTE_LOAD_MODE(PALETTE_AND_DATA); + else if (load_mode == LOAD_PALETTE) + reg |= LCD_PALETTE_LOAD_MODE(PALETTE_ONLY); + + lcdc_write(reg, LCD_RASTER_CTRL_REG); +} + +/* Configure the Burst Size of DMA */ +static int lcd_cfg_dma(int burst_size) +{ + u32 reg; + + reg = lcdc_read(LCD_DMA_CTRL_REG) & 0x00000001; + switch (burst_size) { + case 1: + reg |= LCD_DMA_BURST_SIZE(LCD_DMA_BURST_1); + break; + case 2: + reg |= LCD_DMA_BURST_SIZE(LCD_DMA_BURST_2); + break; + case 4: + reg |= LCD_DMA_BURST_SIZE(LCD_DMA_BURST_4); + break; + case 8: + reg |= LCD_DMA_BURST_SIZE(LCD_DMA_BURST_8); + break; + case 16: + reg |= LCD_DMA_BURST_SIZE(LCD_DMA_BURST_16); + break; + default: + return -EINVAL; + } + lcdc_write(reg | LCD_END_OF_FRAME_INT_ENA, LCD_DMA_CTRL_REG); + + return 0; +} + +static void lcd_cfg_ac_bias(int period, int transitions_per_int) +{ + u32 reg; + + /* Set the AC Bias Period and Number of Transisitons per Interrupt */ + reg = lcdc_read(LCD_RASTER_TIMING_2_REG) & 0xFFF00000; + reg |= LCD_AC_BIAS_FREQUENCY(period) | + LCD_AC_BIAS_TRANSITIONS_PER_INT(transitions_per_int); + lcdc_write(reg, LCD_RASTER_TIMING_2_REG); +} + +static void lcd_cfg_horizontal_sync(int back_porch, int pulse_width, + int front_porch) +{ + u32 reg; + + reg = lcdc_read(LCD_RASTER_TIMING_0_REG) & 0xf; + reg |= ((back_porch & 0xff) << 24) + | ((front_porch & 0xff) << 16) + | ((pulse_width & 0x3f) << 10); + lcdc_write(reg, LCD_RASTER_TIMING_0_REG); +} + +static void lcd_cfg_vertical_sync(int back_porch, int pulse_width, + int front_porch) +{ + u32 reg; + + reg = lcdc_read(LCD_RASTER_TIMING_1_REG) & 0x3ff; + reg |= ((back_porch & 0xff) << 24) + | ((front_porch & 0xff) << 16) + | ((pulse_width & 0x3f) << 10); + lcdc_write(reg, LCD_RASTER_TIMING_1_REG); +} + +static int lcd_cfg_display(const struct lcd_ctrl_config *cfg) +{ + u32 reg; + + reg = lcdc_read(LCD_RASTER_CTRL_REG) & ~(LCD_TFT_MODE | + LCD_MONO_8BIT_MODE | + LCD_MONOCHROME_MODE); + + switch (cfg->p_disp_panel->panel_shade) { + case MONOCHROME: + reg |= LCD_MONOCHROME_MODE; + if (cfg->mono_8bit_mode) + reg |= LCD_MONO_8BIT_MODE; + break; + case COLOR_ACTIVE: + reg |= LCD_TFT_MODE; + if (cfg->tft_alt_mode) + reg |= LCD_TFT_ALT_ENABLE; + break; + + case COLOR_PASSIVE: + if (cfg->stn_565_mode) + reg |= LCD_STN_565_ENABLE; + break; + + default: + return -EINVAL; + } + + /* enable additional interrupts here */ + reg |= LCD_UNDERFLOW_INT_ENA; + + lcdc_write(reg, LCD_RASTER_CTRL_REG); + + reg = lcdc_read(LCD_RASTER_TIMING_2_REG); + + if (cfg->sync_ctrl) + reg |= LCD_SYNC_CTRL; + else + reg &= ~LCD_SYNC_CTRL; + + if (cfg->sync_edge) + reg |= LCD_SYNC_EDGE; + else + reg &= ~LCD_SYNC_EDGE; + + if (cfg->invert_pxl_clock) + reg |= LCD_INVERT_PIXEL_CLOCK; + else + reg &= ~LCD_INVERT_PIXEL_CLOCK; + + if (cfg->invert_line_clock) + reg |= LCD_INVERT_LINE_CLOCK; + else + reg &= ~LCD_INVERT_LINE_CLOCK; + + if (cfg->invert_frm_clock) + reg |= LCD_INVERT_FRAME_CLOCK; + else + reg &= ~LCD_INVERT_FRAME_CLOCK; + + lcdc_write(reg, LCD_RASTER_TIMING_2_REG); + + return 0; +} + +static int lcd_cfg_frame_buffer(struct da8xx_fb_par *par, u32 width, u32 height, + u32 bpp, u32 raster_order) +{ + u32 bpl, reg; + + /* Disable Dual Frame Buffer. */ + reg = lcdc_read(LCD_DMA_CTRL_REG); + lcdc_write(reg & ~LCD_DUAL_FRAME_BUFFER_ENABLE, + LCD_DMA_CTRL_REG); + /* Set the Panel Width */ + /* Pixels per line = (PPL + 1)*16 */ + /*0x3F in bits 4..9 gives max horisontal resolution = 1024 pixels*/ + width &= 0x3f0; + reg = lcdc_read(LCD_RASTER_TIMING_0_REG); + reg &= 0xfffffc00; + reg |= ((width >> 4) - 1) << 4; + lcdc_write(reg, LCD_RASTER_TIMING_0_REG); + + /* Set the Panel Height */ + reg = lcdc_read(LCD_RASTER_TIMING_1_REG); + reg = ((height - 1) & 0x3ff) | (reg & 0xfffffc00); + lcdc_write(reg, LCD_RASTER_TIMING_1_REG); + + /* Set the Raster Order of the Frame Buffer */ + reg = lcdc_read(LCD_RASTER_CTRL_REG) & ~(1 << 8); + if (raster_order) + reg |= LCD_RASTER_ORDER; + lcdc_write(reg, LCD_RASTER_CTRL_REG); + + switch (bpp) { + case 1: + case 2: + case 4: + case 16: + par->palette_sz = 16 * 2; + break; + + case 8: + par->palette_sz = 256 * 2; + break; + + default: + return -EINVAL; + } + + bpl = width * bpp / 8; + par->databuf_sz = height * bpl + par->palette_sz; + + return 0; +} + +static int fb_setcolreg(unsigned regno, unsigned red, unsigned green, + unsigned blue, unsigned transp, + struct fb_info *info) +{ + struct da8xx_fb_par *par = info->par; + unsigned short *palette = (unsigned short *)par->v_palette_base; + u_short pal; + + if (regno > 255) + return 1; + + if (info->fix.visual == FB_VISUAL_DIRECTCOLOR) + return 1; + + if (info->var.bits_per_pixel == 8) { + red >>= 4; + green >>= 8; + blue >>= 12; + + pal = (red & 0x0f00); + pal |= (green & 0x00f0); + pal |= (blue & 0x000f); + + palette[regno] = pal; + + } else if ((info->var.bits_per_pixel == 16) && regno < 16) { + red >>= (16 - info->var.red.length); + red <<= info->var.red.offset; + + green >>= (16 - info->var.green.length); + green <<= info->var.green.offset; + + blue >>= (16 - info->var.blue.length); + blue <<= info->var.blue.offset; + + par->pseudo_palette[regno] = red | green | blue; + + palette[0] = 0x4000; + } + + return 0; +} + +static int lcd_reset(struct da8xx_fb_par *par) +{ + int ret = 0; + + /* Disable the Raster if previously Enabled */ + if (lcdc_read(LCD_RASTER_CTRL_REG) & LCD_RASTER_ENABLE) + ret = lcd_disable_raster(par); + + /* DMA has to be disabled */ + lcdc_write(0, LCD_DMA_CTRL_REG); + lcdc_write(0, LCD_RASTER_CTRL_REG); + + return ret; +} + +static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg, + struct da8xx_panel *panel) +{ + u32 bpp; + int ret = 0; + + ret = lcd_reset(par); + if (ret != 0) + return ret; + + /* Configure the LCD clock divisor. */ + lcdc_write(LCD_CLK_DIVISOR(panel->pxl_clk) | + (LCD_RASTER_MODE & 0x1), LCD_CTRL_REG); + + /* Configure the DMA burst size. */ + ret = lcd_cfg_dma(cfg->dma_burst_sz); + if (ret < 0) + return ret; + + /* Configure the AC bias properties. */ + lcd_cfg_ac_bias(cfg->ac_bias, cfg->ac_bias_intrpt); + + /* Configure the vertical and horizontal sync properties. */ + lcd_cfg_vertical_sync(panel->vbp, panel->vsw, panel->vfp); + lcd_cfg_horizontal_sync(panel->hbp, panel->hsw, panel->hfp); + + /* Configure for disply */ + ret = lcd_cfg_display(cfg); + if (ret < 0) + return ret; + + if (QVGA != cfg->p_disp_panel->panel_type) + return -EINVAL; + + if (cfg->bpp <= cfg->p_disp_panel->max_bpp && + cfg->bpp >= cfg->p_disp_panel->min_bpp) + bpp = cfg->bpp; + else + bpp = cfg->p_disp_panel->max_bpp; + if (bpp == 12) + bpp = 16; + ret = lcd_cfg_frame_buffer(par, (unsigned int)panel->width, + (unsigned int)panel->height, bpp, + cfg->raster_order); + if (ret < 0) + return ret; + + /* Configure FDD */ + lcdc_write((lcdc_read(LCD_RASTER_CTRL_REG) & 0xfff00fff) | + (cfg->fdd << 12), LCD_RASTER_CTRL_REG); + + return 0; +} + +static irqreturn_t lcdc_irq_handler(int irq, void *arg) +{ + u32 stat = lcdc_read(LCD_STAT_REG); + struct da8xx_fb_par *par = arg; + u32 reg; + + if ((stat & LCD_SYNC_LOST) && (stat & LCD_FIFO_UNDERFLOW)) { + reg = lcdc_read(LCD_RASTER_CTRL_REG); + lcdc_write(reg & ~LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG); + lcdc_write(stat, LCD_STAT_REG); + lcdc_write(reg | LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG); + } else + lcdc_write(stat, LCD_STAT_REG); + + wake_up_interruptible(&par->da8xx_wq); + return IRQ_HANDLED; +} + +static int fb_check_var(struct fb_var_screeninfo *var, + struct fb_info *info) +{ + int err = 0; + + switch (var->bits_per_pixel) { + case 1: + case 8: + var->red.offset = 0; + var->red.length = 8; + var->green.offset = 0; + var->green.length = 8; + var->blue.offset = 0; + var->blue.length = 8; + var->transp.offset = 0; + var->transp.length = 0; + break; + case 4: + var->red.offset = 0; + var->red.length = 4; + var->green.offset = 0; + var->green.length = 4; + var->blue.offset = 0; + var->blue.length = 4; + var->transp.offset = 0; + var->transp.length = 0; + break; + case 16: /* RGB 565 */ + var->red.offset = 0; + var->red.length = 5; + var->green.offset = 5; + var->green.length = 6; + var->blue.offset = 11; + var->blue.length = 5; + var->transp.offset = 0; + var->transp.length = 0; + break; + default: + err = -EINVAL; + } + + var->red.msb_right = 0; + var->green.msb_right = 0; + var->blue.msb_right = 0; + var->transp.msb_right = 0; + return err; +} + +static int __devexit fb_remove(struct platform_device *dev) +{ + struct fb_info *info = dev_get_drvdata(&dev->dev); + int ret = 0; + + if (info) { + struct da8xx_fb_par *par = info->par; + + if (lcdc_read(LCD_RASTER_CTRL_REG) & LCD_RASTER_ENABLE) + ret = lcd_disable_raster(par); + lcdc_write(0, LCD_RASTER_CTRL_REG); + + /* disable DMA */ + lcdc_write(0, LCD_DMA_CTRL_REG); + + unregister_framebuffer(info); + fb_dealloc_cmap(&info->cmap); + dma_free_coherent(NULL, par->databuf_sz + PAGE_SIZE, + info->screen_base, + info->fix.smem_start); + free_irq(par->irq, par); + clk_disable(par->lcdc_clk); + clk_put(par->lcdc_clk); + framebuffer_release(info); + iounmap((void __iomem *)da8xx_fb_reg_base); + release_mem_region(lcdc_regs->start, resource_size(lcdc_regs)); + + } + return ret; +} + +static int fb_ioctl(struct fb_info *info, unsigned int cmd, + unsigned long arg) +{ + struct lcd_sync_arg sync_arg; + + switch (cmd) { + case FBIOGET_CONTRAST: + case FBIOPUT_CONTRAST: + case FBIGET_BRIGHTNESS: + case FBIPUT_BRIGHTNESS: + case FBIGET_COLOR: + case FBIPUT_COLOR: + return -ENOTTY; + case FBIPUT_HSYNC: + if (copy_from_user(&sync_arg, (char *)arg, + sizeof(struct lcd_sync_arg))) + return -EFAULT; + lcd_cfg_horizontal_sync(sync_arg.back_porch, + sync_arg.pulse_width, + sync_arg.front_porch); + break; + case FBIPUT_VSYNC: + if (copy_from_user(&sync_arg, (char *)arg, + sizeof(struct lcd_sync_arg))) + return -EFAULT; + lcd_cfg_vertical_sync(sync_arg.back_porch, + sync_arg.pulse_width, + sync_arg.front_porch); + break; + default: + return -EINVAL; + } + return 0; +} + +static struct fb_ops da8xx_fb_ops = { + .owner = THIS_MODULE, + .fb_check_var = fb_check_var, + .fb_setcolreg = fb_setcolreg, + .fb_ioctl = fb_ioctl, + .fb_fillrect = cfb_fillrect, + .fb_copyarea = cfb_copyarea, + .fb_imageblit = cfb_imageblit, +}; + +static int __init fb_probe(struct platform_device *device) +{ + struct da8xx_lcdc_platform_data *fb_pdata = + device->dev.platform_data; + struct lcd_ctrl_config *lcd_cfg; + struct da8xx_panel *lcdc_info; + struct fb_info *da8xx_fb_info; + struct clk *fb_clk = NULL; + struct da8xx_fb_par *par; + resource_size_t len; + int ret, i; + + if (fb_pdata == NULL) { + dev_err(&device->dev, "Can not get platform data\n"); + return -ENOENT; + } + + lcdc_regs = platform_get_resource(device, IORESOURCE_MEM, 0); + if (!lcdc_regs) { + dev_err(&device->dev, + "Can not get memory resource for LCD controller\n"); + return -ENOENT; + } + + len = resource_size(lcdc_regs); + + lcdc_regs = request_mem_region(lcdc_regs->start, len, lcdc_regs->name); + if (!lcdc_regs) + return -EBUSY; + + da8xx_fb_reg_base = (resource_size_t)ioremap(lcdc_regs->start, len); + if (!da8xx_fb_reg_base) { + ret = -EBUSY; + goto err_request_mem; + } + + fb_clk = clk_get(&device->dev, NULL); + if (IS_ERR(fb_clk)) { + dev_err(&device->dev, "Can not get device clock\n"); + ret = -ENODEV; + goto err_ioremap; + } + ret = clk_enable(fb_clk); + if (ret) + goto err_clk_put; + + for (i = 0, lcdc_info = known_lcd_panels; + i < ARRAY_SIZE(known_lcd_panels); + i++, lcdc_info++) { + if (strcmp(fb_pdata->type, lcdc_info->name) == 0) + break; + } + + if (i == ARRAY_SIZE(known_lcd_panels)) { + dev_err(&device->dev, "GLCD: No valid panel found\n"); + ret = ENODEV; + goto err_clk_disable; + } else + dev_info(&device->dev, "GLCD: Found %s panel\n", + fb_pdata->type); + + lcd_cfg = (struct lcd_ctrl_config *)fb_pdata->controller_data; + + da8xx_fb_info = framebuffer_alloc(sizeof(struct da8xx_fb_par), + &device->dev); + if (!da8xx_fb_info) { + dev_dbg(&device->dev, "Memory allocation failed for fb_info\n"); + ret = -ENOMEM; + goto err_clk_disable; + } + + par = da8xx_fb_info->par; + + if (lcd_init(par, lcd_cfg, lcdc_info) < 0) { + dev_err(&device->dev, "lcd_init failed\n"); + ret = -EFAULT; + goto err_release_fb; + } + + /* allocate frame buffer */ + da8xx_fb_info->screen_base = dma_alloc_coherent(NULL, + par->databuf_sz + PAGE_SIZE, + (resource_size_t *) + &da8xx_fb_info->fix.smem_start, + GFP_KERNEL | GFP_DMA); + + if (!da8xx_fb_info->screen_base) { + dev_err(&device->dev, + "GLCD: kmalloc for frame buffer failed\n"); + ret = -EINVAL; + goto err_release_fb; + } + + /* move palette base pointer by (PAGE_SIZE - palette_sz) bytes */ + par->v_palette_base = da8xx_fb_info->screen_base + + (PAGE_SIZE - par->palette_sz); + par->p_palette_base = da8xx_fb_info->fix.smem_start + + (PAGE_SIZE - par->palette_sz); + + /* the rest of the frame buffer is pixel data */ + da8xx_fb_fix.smem_start = par->p_palette_base + par->palette_sz; + da8xx_fb_fix.smem_len = par->databuf_sz - par->palette_sz; + da8xx_fb_fix.line_length = (lcdc_info->width * lcd_cfg->bpp) / 8; + + par->lcdc_clk = fb_clk; + + init_waitqueue_head(&par->da8xx_wq); + + par->irq = platform_get_irq(device, 0); + if (par->irq < 0) { + ret = -ENOENT; + goto err_release_fb_mem; + } + + ret = request_irq(par->irq, lcdc_irq_handler, 0, DRIVER_NAME, par); + if (ret) + goto err_release_fb_mem; + + /* Initialize par */ + da8xx_fb_info->var.bits_per_pixel = lcd_cfg->bpp; + + da8xx_fb_var.xres = lcdc_info->width; + da8xx_fb_var.xres_virtual = lcdc_info->width; + + da8xx_fb_var.yres = lcdc_info->height; + da8xx_fb_var.yres_virtual = lcdc_info->height; + + da8xx_fb_var.grayscale = + lcd_cfg->p_disp_panel->panel_shade == MONOCHROME ? 1 : 0; + da8xx_fb_var.bits_per_pixel = lcd_cfg->bpp; + + da8xx_fb_var.hsync_len = lcdc_info->hsw; + da8xx_fb_var.vsync_len = lcdc_info->vsw; + + /* Initialize fbinfo */ + da8xx_fb_info->flags = FBINFO_FLAG_DEFAULT; + da8xx_fb_info->fix = da8xx_fb_fix; + da8xx_fb_info->var = da8xx_fb_var; + da8xx_fb_info->fbops = &da8xx_fb_ops; + da8xx_fb_info->pseudo_palette = par->pseudo_palette; + + ret = fb_alloc_cmap(&da8xx_fb_info->cmap, PALETTE_SIZE, 0); + if (ret) + goto err_free_irq; + + /* First palette_sz byte of the frame buffer is the palette */ + da8xx_fb_info->cmap.len = par->palette_sz; + + /* Flush the buffer to the screen. */ + lcd_blit(LOAD_DATA, par); + + /* initialize var_screeninfo */ + da8xx_fb_var.activate = FB_ACTIVATE_FORCE; + fb_set_var(da8xx_fb_info, &da8xx_fb_var); + + dev_set_drvdata(&device->dev, da8xx_fb_info); + /* Register the Frame Buffer */ + if (register_framebuffer(da8xx_fb_info) < 0) { + dev_err(&device->dev, + "GLCD: Frame Buffer Registration Failed!\n"); + ret = -EINVAL; + goto err_dealloc_cmap; + } + + /* enable raster engine */ + lcdc_write(lcdc_read(LCD_RASTER_CTRL_REG) | + LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG); + + return 0; + +err_dealloc_cmap: + fb_dealloc_cmap(&da8xx_fb_info->cmap); + +err_free_irq: + free_irq(par->irq, par); + +err_release_fb_mem: + dma_free_coherent(NULL, par->databuf_sz + PAGE_SIZE, + da8xx_fb_info->screen_base, + da8xx_fb_info->fix.smem_start); + +err_release_fb: + framebuffer_release(da8xx_fb_info); + +err_clk_disable: + clk_disable(fb_clk); + +err_clk_put: + clk_put(fb_clk); + +err_ioremap: + iounmap((void __iomem *)da8xx_fb_reg_base); + +err_request_mem: + release_mem_region(lcdc_regs->start, len); + + return ret; +} + +#ifdef CONFIG_PM +static int fb_suspend(struct platform_device *dev, pm_message_t state) +{ + return -EBUSY; +} +static int fb_resume(struct platform_device *dev) +{ + return -EBUSY; +} +#else +#define fb_suspend NULL +#define fb_resume NULL +#endif + +static struct platform_driver da8xx_fb_driver = { + .probe = fb_probe, + .remove = fb_remove, + .suspend = fb_suspend, + .resume = fb_resume, + .driver = { + .name = DRIVER_NAME, + .owner = THIS_MODULE, + }, +}; + +static int __init da8xx_fb_init(void) +{ + return platform_driver_register(&da8xx_fb_driver); +} + +static void __exit da8xx_fb_cleanup(void) +{ + platform_driver_unregister(&da8xx_fb_driver); +} + +module_init(da8xx_fb_init); +module_exit(da8xx_fb_cleanup); + +MODULE_DESCRIPTION("Framebuffer driver for TI da8xx/omap-l1xx"); +MODULE_AUTHOR("Texas Instruments"); +MODULE_LICENSE("GPL"); diff --git a/include/video/da8xx-fb.h b/include/video/da8xx-fb.h new file mode 100644 index 0000000..5f77675 --- /dev/null +++ b/include/video/da8xx-fb.h @@ -0,0 +1,106 @@ +/* + * Header file for TI DA8XX LCD controller platform data. + * + * Copyright (C) 2008-2009 MontaVista Software Inc. + * Copyright (C) 2008-2009 Texas Instruments Inc + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#ifndef DA8XX_FB_H +#define DA8XX_FB_H + +enum panel_type { + QVGA = 0 +}; + +enum panel_shade { + MONOCHROME = 0, + COLOR_ACTIVE, + COLOR_PASSIVE, +}; + +enum raster_load_mode { + LOAD_DATA = 1, + LOAD_PALETTE, +}; + +struct display_panel { + enum panel_type panel_type; /* QVGA */ + int max_bpp; + int min_bpp; + enum panel_shade panel_shade; +}; + +struct da8xx_lcdc_platform_data { + const char manu_name[10]; + void *controller_data; + const char type[25]; +}; + +struct lcd_ctrl_config { + const struct display_panel *p_disp_panel; + + /* AC Bias Pin Frequency */ + int ac_bias; + + /* AC Bias Pin Transitions per Interrupt */ + int ac_bias_intrpt; + + /* DMA burst size */ + int dma_burst_sz; + + /* Bits per pixel */ + int bpp; + + /* FIFO DMA Request Delay */ + int fdd; + + /* TFT Alternative Signal Mapping (Only for active) */ + unsigned char tft_alt_mode; + + /* 12 Bit Per Pixel (5-6-5) Mode (Only for passive) */ + unsigned char stn_565_mode; + + /* Mono 8-bit Mode: 1=D0-D7 or 0=D0-D3 */ + unsigned char mono_8bit_mode; + + /* Invert pixel clock */ + unsigned char invert_pxl_clock; + + /* Invert line clock */ + unsigned char invert_line_clock; + + /* Invert frame clock */ + unsigned char invert_frm_clock; + + /* Horizontal and Vertical Sync Edge: 0=rising 1=falling */ + unsigned char sync_edge; + + /* Horizontal and Vertical Sync: Control: 0=ignore */ + unsigned char sync_ctrl; + + /* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */ + unsigned char raster_order; +}; + +struct lcd_sync_arg { + int back_porch; + int front_porch; + int pulse_width; +}; + +/* ioctls */ +#define FBIOGET_CONTRAST _IOR('F', 1, int) +#define FBIOPUT_CONTRAST _IOW('F', 2, int) +#define FBIGET_BRIGHTNESS _IOR('F', 3, int) +#define FBIPUT_BRIGHTNESS _IOW('F', 3, int) +#define FBIGET_COLOR _IOR('F', 5, int) +#define FBIPUT_COLOR _IOW('F', 6, int) +#define FBIPUT_HSYNC _IOW('F', 9, int) +#define FBIPUT_VSYNC _IOW('F', 10, int) + +#endif /* ifndef DA8XX_FB_H */ + -- 1.5.6 |
From: Mike R. <mik...@gm...> - 2009-07-21 14:54:32
|
Signed-off-by: Mike Rapoport <mi...@co...> --- drivers/video/pxafb.c | 21 ++++++++++----------- 1 files changed, 10 insertions(+), 11 deletions(-) diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c index c69d6c4..e9797d4 100644 --- a/drivers/video/pxafb.c +++ b/drivers/video/pxafb.c @@ -1631,30 +1631,30 @@ pxafb_freq_policy(struct notifier_block *nb, unsigned long val, void *data) } #endif -#ifdef CONFIG_PM /* * Power management hooks. Note that we won't be called from IRQ context, * unlike the blank functions above, so we may sleep. */ -static int pxafb_suspend(struct platform_device *dev, pm_message_t state) +static int pxafb_suspend(struct device *dev) { - struct pxafb_info *fbi = platform_get_drvdata(dev); + struct pxafb_info *fbi = dev_get_drvdata(dev); set_ctrlr_state(fbi, C_DISABLE_PM); return 0; } -static int pxafb_resume(struct platform_device *dev) +static int pxafb_resume(struct device *dev) { - struct pxafb_info *fbi = platform_get_drvdata(dev); + struct pxafb_info *fbi = dev_get_drvdata(dev); set_ctrlr_state(fbi, C_ENABLE_PM); return 0; } -#else -#define pxafb_suspend NULL -#define pxafb_resume NULL -#endif + +static struct dev_pm_ops pxafb_pm_ops = { + .suspend = pxafb_suspend, + .resume = pxafb_resume, +}; static int __devinit pxafb_init_video_memory(struct pxafb_info *fbi) { @@ -2246,11 +2246,10 @@ static int __devexit pxafb_remove(struct platform_device *dev) static struct platform_driver pxafb_driver = { .probe = pxafb_probe, .remove = __devexit_p(pxafb_remove), - .suspend = pxafb_suspend, - .resume = pxafb_resume, .driver = { .owner = THIS_MODULE, .name = "pxa2xx-fb", + .pm = &pxafb_pm_ops, }, }; -- 1.6.0.6 -- Sincerely Yours, Mike. |
From: Nicolas F. <nic...@at...> - 2009-07-21 10:14:10
|
Andrew Morton : > On Mon, 06 Jul 2009 12:32:53 +0200 > Nicolas Ferre <nic...@at...> wrote: > >> Hi, >> >> Nicolas Ferre : >>> From: Hong Xu <ho...@at...> >>> >>> Modify atmel LCD driver: atmel_lcdfb for at91sam9g10. This add a clock >>> management equivalent to at91sam9261. >> Can we consider an inclusion in linux-fbdev ? > > The patch looks OK to me. > >>> Signed-off-by: Hong Xu <ho...@at...> >>> Signed-off-by: Nicolas Ferre <nic...@at...> >> Andrew Victor added his: >> Acked-by: Andrew Victor <li...@ma...> >> >>> --- >>> drivers/video/Kconfig | 4 ++-- >>> drivers/video/atmel_lcdfb.c | 6 ++++-- >>> drivers/video/backlight/Kconfig | 2 +- >>> 3 files changed, 7 insertions(+), 5 deletions(-) > > Please merge it via an ARM tree? Ok, queued in arm patch tracking system with number: 5614/1 http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=5614/1 Thanks, Bye, -- Nicolas Ferre |
From: GnuCash A. <adm...@gm...> - 2009-07-20 23:06:45
|
Hello to All. I would like to know what is needed to load and display animated boot splash images with fbcon. As i know fbcon support display of gif images. What for patches and additional sources are needed for displaying as a example also simple animated gif files. Thanks in advance for the help. Greetings |
From: Andrew M. <ak...@li...> - 2009-07-20 22:25:08
|
On Mon, 06 Jul 2009 12:32:53 +0200 Nicolas Ferre <nic...@at...> wrote: > Hi, > > Nicolas Ferre : > > From: Hong Xu <ho...@at...> > > > > Modify atmel LCD driver: atmel_lcdfb for at91sam9g10. This add a clock > > management equivalent to at91sam9261. > > Can we consider an inclusion in linux-fbdev ? The patch looks OK to me. > > Signed-off-by: Hong Xu <ho...@at...> > > Signed-off-by: Nicolas Ferre <nic...@at...> > > Andrew Victor added his: > Acked-by: Andrew Victor <li...@ma...> > > > --- > > drivers/video/Kconfig | 4 ++-- > > drivers/video/atmel_lcdfb.c | 6 ++++-- > > drivers/video/backlight/Kconfig | 2 +- > > 3 files changed, 7 insertions(+), 5 deletions(-) Please merge it via an ARM tree? |
From: H H. S. <har...@vi...> - 2009-07-20 22:22:56
|
On Monday, July 20, 2009 3:15 PM, Russell King wrote: > On Mon, Jul 20, 2009 at 04:42:09PM -0400, H Hartley Sweeten wrote: >> I'm not sure which tag is appropriate for this patch. So here's both. >> >> Signed-off-by: H Hartley Sweeten <hsw...@vi...> >> Acked-by: H Hartley Sweeten <hsw...@vi...> > > If you're directly involved in the patch delivery path, then the > sign-off is what's required. In other words, you take someone elses > patch, decide you're happy with it and want to pass it along yourself. > > If you've just reviewed it and are happy with it, then it's the > acked-by which is needed. Or use one of the more specific > Reviewed-by, Tested-by etc (whatever seems most appropriate for > the amount of review or checking you've done.) Thanks Russell. Based on that information, my tag for this part of the patch should be: Acked-by: H Hartley Sweeten <hsw...@vi...> |
From: Russell K. - A. L. <li...@ar...> - 2009-07-20 22:19:13
|
On Mon, Jul 20, 2009 at 05:01:00PM -0400, H Hartley Sweeten wrote: > On Monday, July 20, 2009 1:55 PM, Ryan Mallon wrote: > > Russell, will this eventually be okay to go through the ARM patch > > system, or does it need to go via the framebuffer people? > > I think Russell could ok this part of the support. The actual driver > will probably need to go via the framebuffer people. I think it depends on whether there's any response from framebuffer folk. I've heard many stories of people submitting patches to the framebuffer list and nothing happening. Safest thing is probably to CC Andrew Morton as a just-in-case measure. |
From: Russell K. - A. L. <li...@ar...> - 2009-07-20 22:15:48
|
On Mon, Jul 20, 2009 at 04:42:09PM -0400, H Hartley Sweeten wrote: > I'm not sure which tag is appropriate for this patch. So here's both. > > Signed-off-by: H Hartley Sweeten <hsw...@vi...> > Acked-by: H Hartley Sweeten <hsw...@vi...> If you're directly involved in the patch delivery path, then the sign-off is what's required. In other words, you take someone elses patch, decide you're happy with it and want to pass it along yourself. If you've just reviewed it and are happy with it, then it's the acked-by which is needed. Or use one of the more specific Reviewed-by, Tested-by etc (whatever seems most appropriate for the amount of review or checking you've done.) |
From: Ryan M. <ry...@bl...> - 2009-07-20 21:30:21
|
Documentation for the ep93xx LCD controller Signed-off-by: Ryan Mallon <ry...@bl...> --- diff --git a/Documentation/fb/ep93xx_fb.txt b/Documentation/fb/ep93xx_fb.txt new file mode 100644 index 0000000..f77e6c4 --- /dev/null +++ b/Documentation/fb/ep93xx_fb.txt @@ -0,0 +1,105 @@ +================================ +Driver for EP93xx LCD controller +================================ + +The EP93xx LCD controller can drive both standard desktop monitors and +embedded LCD displays. If you have a standard desktop monitor then you +can use the standard Linux video mode database. In your board file: + + static struct ep93xxfb_mach_info some_board_fb_info = { + .num_modes = EP93XXFB_USE_MODEDB, + .bpp = 16, + }; + +If you have an embedded LCD display then you need to define a video +mode for it as follows: + + static struct fb_videomode some_board_video_modes[] = { + { + .name = "some_lcd_name", + /* Pixel clock, porches, etc */ + }, + }; + + static struct ep93xxfb_mach_info some_board_fb_info = { + .num_modes = ARRAY_SIZE(some_board_video_modes), + .modes = some_board_video_modes, + .default_mode = &some_board_video_modes[0], + .bpp = 16, + }; + +The framebuffer device can be registered by adding the following to +your board initialisation function: + + ep93xx_register_fb(&some_board_fb_info); + +===================== +Video Attribute Flags +===================== + +The ep93xxfb_mach_info structure has a flags field which can be used +to configure the controller. The video attributes flags are fully +documented in section 7 of the EP93xx users' guide. The following +flags are available: + +EP93XXFB_PCLK_FALLING Clock data on the falling edge of the + pixel clock. The default is to clock + data on the rising edge. + +EP93XXFB_SYNC_BLANK_HIGH Blank signal is active high. By + default the blank signal is active low. + +EP93XXFB_SYNC_HORIZ_HIGH Horizontal sync is active high. By + default the horizontal sync is active low. + +EP93XXFB_SYNC_VERT_HIGH Vertical sync is active high. By + default the vertical sync is active high. + +The physical address of the framebuffer can be controlled using the +following flags: + +EP93XXFB_USE_SDCSN0 Use SDCSn[0] for the framebuffer. This + is the default setting. + +EP93XXFB_USE_SDCSN1 Use SDCSn[1] for the framebuffer. + +EP93XXFB_USE_SDCSN2 Use SDCSn[2] for the framebuffer. + +EP93XXFB_USE_SDCSN3 Use SDCSn[3] for the framebuffer. + +====================== +Setting the video mode +====================== + +The video mode is set using the following syntax: + + video=XRESxYRES[-BPP][@REFRESH] + +If the EP93xx video driver is built-in then the video mode is set on +the Linux kernel command line, for example: + + video=800x600-16@60 + +If the EP93xx video driver is built as a module then the video mode is +set when the module is installed: + + modprobe ep93xx_fb video=320x240 + +============== +Screenpage bug +============== + +At least on the EP9315 there is a silicon bug which causes bit 27 of +the VIDSCRNPAGE (framebuffer physical offset) to be tied low. There is +an unofficial errata for this bug at: + http://marc.info/?l=linux-arm-kernel&m=110061245502000&w=2 + +By default the EP93xx framebuffer driver checks if the allocated physical +address has bit 27 set. If it does, then the memory is freed and an +error is returned. The check can be disabled by adding the following +option when loading the driver: + + ep93xx_fb.check_screenpage_bug=0 + +In some cases it may be possible to reconfigure your SDRAM layout to +avoid this bug. See section 13 of the EP93xx users' guide for details. |
From: H H. S. <har...@vi...> - 2009-07-20 21:01:08
|
On Monday, July 20, 2009 1:55 PM, Ryan Mallon wrote: >>> Updated version of the ep93xx video driver platform support patch with >>> fixes suggested by Hartley. >>> >>> Signed-off-by: Ryan Mallon <ry...@bl...> >>> >> >> A couple more formatting issue comments below. >> >> >>> static struct clk clk_uart1 = { >>> .sw_locked = 1, >>> @@ -73,6 +73,13 @@ static struct clk clk_keypad = { >>> .set_rate = set_keytchclk_rate, >>> }; >>> >>> +static struct clk clk_video = { >>> >> >> Unnecessary blank line. >> > I like having blank lines between structures :-). I can remove it if you > want. Only because all the other clk's don't have a blank line separating them. >>> >>> +static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel, >>> + int *pdiv, int *div) >>> +{ >>> + unsigned long max_rate, best_rate = 0, >>> + actual_rate = 0, mclk_rate = 0, rate_err = -1; >>> + int i, found = 0, __div = 0, __pdiv = 0; >>> + >>> + /* Don't exceed the maximum rate */ >>> + max_rate = max(max(clk_pll1.rate / 4, clk_pll2.rate / 4), >>> + (unsigned long)EP93XX_EXT_CLK_RATE / 4); >>> + rate = min(rate, max_rate); >>> + >>> + /* >>> + * Try the two pll's and the external clock >>> + * Because the valid predividers are 2, 2.5 and 3, we multiply >>> + * all the clocks by 2 to avoid floating point math. >>> + * >>> + * This is based on the algorithm in the ep93xx raster guide: >>> + * http://be-a-maverick.com/en/pubs/appNote/AN269REV1.pdf >>> + * >>> >> >> Unnecessary extra '*'. >> > Again, I think this is okay, it spaces the comment out a bit and makes > it more readable (IMHO). That's fine. >> Looks good other than that. >> >> I'm not sure which tag is appropriate for this patch. So here's both. >> >> Signed-off-by: H Hartley Sweeten <hsw...@vi...> >> > Sorry, your signed-off-by should have been there from the start. >> Acked-by: H Hartley Sweeten <hsw...@vi...> >> > I'm not sure if you can have both a signed-off-by and acked-by tag on > the same patch. Russell? I guess it should be a Signed-off-by, you will need an ack from someone else (Russell?). > I'm also putting together a short document on how to use the driver > since Daniele was having trouble getting it going. I would like to wait > until he has it fully working before this gets applied since that gives > us a third independent person who can confirm it all works. I was going to suggest that. Or you could submit a patch for the snappercl15 showing an example usage. > Russell, will this eventually be okay to go through the ARM patch > system, or does it need to go via the framebuffer people? I think Russell could ok this part of the support. The actual driver will probably need to go via the framebuffer people. I'm reviewing the driver right now. You should have my Signed-off-by later today. Regards, Hartley |
From: Ryan M. <ry...@bl...> - 2009-07-20 20:53:58
|
H Hartley Sweeten wrote: > On Sunday, July 19, 2009 4:56 AM, Ryan Mallon wrote: > >> Updated version of the ep93xx video driver platform support patch with >> fixes suggested by Hartley. >> >> Signed-off-by: Ryan Mallon <ry...@bl...> >> > > A couple more formatting issue comments below. > > >> static struct clk clk_uart1 = { >> .sw_locked = 1, >> @@ -73,6 +73,13 @@ static struct clk clk_keypad = { >> .set_rate = set_keytchclk_rate, >> }; >> >> +static struct clk clk_video = { >> > > Unnecessary blank line. > I like having blank lines between structures :-). I can remove it if you want. >> >> +static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel, >> + int *pdiv, int *div) >> +{ >> + unsigned long max_rate, best_rate = 0, >> + actual_rate = 0, mclk_rate = 0, rate_err = -1; >> + int i, found = 0, __div = 0, __pdiv = 0; >> + >> + /* Don't exceed the maximum rate */ >> + max_rate = max(max(clk_pll1.rate / 4, clk_pll2.rate / 4), >> + (unsigned long)EP93XX_EXT_CLK_RATE / 4); >> + rate = min(rate, max_rate); >> + >> + /* >> + * Try the two pll's and the external clock >> + * Because the valid predividers are 2, 2.5 and 3, we multiply >> + * all the clocks by 2 to avoid floating point math. >> + * >> + * This is based on the algorithm in the ep93xx raster guide: >> + * http://be-a-maverick.com/en/pubs/appNote/AN269REV1.pdf >> + * >> > > Unnecessary extra '*'. > Again, I think this is okay, it spaces the comment out a bit and makes it more readable (IMHO). > Looks good other than that. > > I'm not sure which tag is appropriate for this patch. So here's both. > > Signed-off-by: H Hartley Sweeten <hsw...@vi...> > Sorry, your signed-off-by should have been there from the start. > Acked-by: H Hartley Sweeten <hsw...@vi...> > I'm not sure if you can have both a signed-off-by and acked-by tag on the same patch. Russell? I'm also putting together a short document on how to use the driver since Daniele was having trouble getting it going. I would like to wait until he has it fully working before this gets applied since that gives us a third independent person who can confirm it all works. Russell, will this eventually be okay to go through the ARM patch system, or does it need to go via the framebuffer people? ~Ryan -- Bluewater Systems Ltd - ARM Technology Solution Centre Ryan Mallon Unit 5, Amuri Park Phone: +64 3 3779127 404 Barbadoes St Fax: +64 3 3779135 PO Box 13 889 Email: ry...@bl... Christchurch, 8013 Web: http://www.bluewatersys.com New Zealand Freecall Australia 1800 148 751 USA 1800 261 2934 |
From: H H. S. <har...@vi...> - 2009-07-20 20:42:22
|
On Sunday, July 19, 2009 4:56 AM, Ryan Mallon wrote: > Updated version of the ep93xx video driver platform support patch with > fixes suggested by Hartley. > > Signed-off-by: Ryan Mallon <ry...@bl...> A couple more formatting issue comments below. > --- > > diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c > index b6b5344..a8ebda4 100644 > --- a/arch/arm/mach-ep93xx/clock.c > +++ b/arch/arm/mach-ep93xx/clock.c > @@ -37,7 +37,7 @@ struct clk { > static unsigned long get_uart_rate(struct clk *clk); > > static int set_keytchclk_rate(struct clk *clk, unsigned long rate); > - > +static int set_div_rate(struct clk *clk, unsigned long rate); > > static struct clk clk_uart1 = { > .sw_locked = 1, > @@ -73,6 +73,13 @@ static struct clk clk_keypad = { > .set_rate = set_keytchclk_rate, > }; > > +static struct clk clk_video = { Unnecessary blank line. > + .sw_locked = 1, > + .enable_reg = EP93XX_SYSCON_VIDCLKDIV, > + .enable_mask = EP93XX_SYSCON_CLKDIV_ENABLE, > + .set_rate = set_div_rate, > +}; > + > /* DMA Clocks */ > static struct clk clk_m2p0 = { > .enable_reg = EP93XX_SYSCON_PWRCNT, > @@ -137,6 +144,7 @@ static struct clk_lookup clocks[] = { > INIT_CK(NULL, "pll2", &clk_pll2), > INIT_CK("ep93xx-ohci", NULL, &clk_usb_host), > INIT_CK("ep93xx-keypad", NULL, &clk_keypad), > + INIT_CK("ep93xx-fb", NULL, &clk_video), > INIT_CK(NULL, "m2p0", &clk_m2p0), > INIT_CK(NULL, "m2p1", &clk_m2p1), > INIT_CK(NULL, "m2p2", &clk_m2p2), > @@ -232,6 +240,84 @@ static int set_keytchclk_rate(struct clk *clk, unsigned long rate) > return 0; > } > > +static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel, > + int *pdiv, int *div) > +{ > + unsigned long max_rate, best_rate = 0, > + actual_rate = 0, mclk_rate = 0, rate_err = -1; > + int i, found = 0, __div = 0, __pdiv = 0; > + > + /* Don't exceed the maximum rate */ > + max_rate = max(max(clk_pll1.rate / 4, clk_pll2.rate / 4), > + (unsigned long)EP93XX_EXT_CLK_RATE / 4); > + rate = min(rate, max_rate); > + > + /* > + * Try the two pll's and the external clock > + * Because the valid predividers are 2, 2.5 and 3, we multiply > + * all the clocks by 2 to avoid floating point math. > + * > + * This is based on the algorithm in the ep93xx raster guide: > + * http://be-a-maverick.com/en/pubs/appNote/AN269REV1.pdf > + * Unnecessary extra '*'. > + */ > + for (i = 0; i < 3; i++) { > + if (i == 0) > + mclk_rate = EP93XX_EXT_CLK_RATE * 2; > + else if (i == 1) > + mclk_rate = clk_pll1.rate * 2; > + else if (i == 2) > + mclk_rate = clk_pll2.rate * 2; > + > + /* Try each predivider value */ > + for (__pdiv = 4; __pdiv <= 6; __pdiv++) { > + __div = mclk_rate / (rate * __pdiv); > + if (__div < 2 || __div > 127) > + continue; > + > + actual_rate = mclk_rate / __pdiv * __div; > + > + if (!found || abs(actual_rate - rate) < rate_err) { > + *pdiv = __pdiv - 3; > + *div = __div; > + *psel = (i == 2); > + *esel = (i != 0); > + best_rate = actual_rate; > + rate_err = actual_rate - rate; > + found = 1; > + } > + } > + } > + > + if (!found) > + return 0; > + > + return best_rate; > +} > + > +static int set_div_rate(struct clk *clk, unsigned long rate) > +{ > + unsigned long actual_rate; > + int psel = 0, esel = 0, pdiv = 0, div = 0; > + u32 val; > + > + actual_rate = calc_clk_div(rate, &psel, &esel, &pdiv, &div); > + if (actual_rate == 0) > + return -EINVAL; > + clk->rate = actual_rate; > + > + /* Clear the esel, psel, pdiv and div bits */ > + val = __raw_readl(clk->enable_reg); > + val &= ~0x7fff; > + > + /* Set the new esel, psel, pdiv and div bits for the new clock rate */ > + val |= (esel ? EP93XX_SYSCON_CLKDIV_ESEL : 0) | > + (psel ? EP93XX_SYSCON_CLKDIV_PSEL : 0) | > + (pdiv << EP93XX_SYSCON_CLKDIV_PDIV_SHIFT) | div; > + ep93xx_syscon_swlocked_write(val, clk->enable_reg); > + return 0; > +} > + > int clk_set_rate(struct clk *clk, unsigned long rate) > { > if (clk->set_rate) > diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c > index 8e59bdc..f19ec01 100644 > --- a/arch/arm/mach-ep93xx/core.c > +++ b/arch/arm/mach-ep93xx/core.c > @@ -29,6 +29,7 @@ > #include <linux/i2c-gpio.h> > > #include <mach/hardware.h> > +#include <mach/fb.h> > > #include <asm/mach/map.h> > #include <asm/mach/time.h> > @@ -36,7 +37,6 @@ > > #include <asm/hardware/vic.h> > > - > /************************************************************************* > * Static I/O mappings that are needed for all EP93xx platforms > *************************************************************************/ > @@ -570,6 +570,37 @@ void __init ep93xx_register_i2c(struct i2c_board_info *devices, int num) > platform_device_register(&ep93xx_i2c_device); > } > > +/************************************************************************* > + * EP93xx video peripheral handling > + *************************************************************************/ > +static struct ep93xxfb_mach_info ep93xxfb_data; > + > +static struct resource ep93xx_fb_resource[] = { > + { > + .start = EP93XX_RASTER_PHYS_BASE, > + .end = EP93XX_RASTER_PHYS_BASE + 0x800 - 1, > + .flags = IORESOURCE_MEM, > + }, > +}; > + > +static struct platform_device ep93xx_fb_device = { > + .name = "ep93xx-fb", > + .id = -1, > + .dev = { > + .platform_data = &ep93xxfb_data, > + .coherent_dma_mask = DMA_BIT_MASK(32), > + .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask, > + }, > + .num_resources = ARRAY_SIZE(ep93xx_fb_resource), > + .resource = ep93xx_fb_resource, > +}; > + > +void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data) > +{ > + ep93xxfb_data = *data; > + platform_device_register(&ep93xx_fb_device); > +} > + > extern void ep93xx_gpio_init(void); > > void __init ep93xx_init_devices(void) > diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h > index a11ae77..4519172 100644 > --- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h > +++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h > @@ -70,6 +70,7 @@ > #define EP93XX_USB_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00020000) > #define EP93XX_USB_BASE EP93XX_AHB_IOMEM(0x00020000) > > +#define EP93XX_RASTER_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00030000) > #define EP93XX_RASTER_BASE EP93XX_AHB_IOMEM(0x00030000) > > #define EP93XX_GRAPHICS_ACCEL_BASE EP93XX_AHB_IOMEM(0x00040000) > @@ -206,6 +207,11 @@ > #define EP93XX_SYSCON_DEVCFG_ADCPD (1<<2) > #define EP93XX_SYSCON_DEVCFG_KEYS (1<<1) > #define EP93XX_SYSCON_DEVCFG_SHENA (1<<0) > +#define EP93XX_SYSCON_VIDCLKDIV EP93XX_SYSCON_REG(0x84) > +#define EP93XX_SYSCON_CLKDIV_PSEL (1<<13) > +#define EP93XX_SYSCON_CLKDIV_ESEL (1<<14) > +#define EP93XX_SYSCON_CLKDIV_ENABLE (1<<15) > +#define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8 > #define EP93XX_SYSCON_KEYTCHCLKDIV EP93XX_SYSCON_REG(0x90) > #define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN (1<<31) > #define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16) > diff --git a/arch/arm/mach-ep93xx/include/mach/fb.h b/arch/arm/mach-ep93xx/include/mach/fb.h > new file mode 100644 > index 0000000..c16b622 > --- /dev/null > +++ b/arch/arm/mach-ep93xx/include/mach/fb.h > @@ -0,0 +1,55 @@ > +/* > + * arch/arm/mach-ep93xx/include/mach/fb.h > + */ > + > +#ifndef __ASM_ARCH_EP93XXFB_H > +#define __ASM_ARCH_EP93XXFB_H > + > +struct fb_videomode; > +struct fb_info; > + > +#define EP93XXFB_USE_MODEDB 0 > + > +/* VideoAttributes flags */ > +#define EP93XXFB_STATE_MACHINE_ENABLE (1 << 0) > +#define EP93XXFB_PIXEL_CLOCK_ENABLE (1 << 1) > +#define EP93XXFB_VSYNC_ENABLE (1 << 2) > +#define EP93XXFB_PIXEL_DATA_ENABLE (1 << 3) > +#define EP93XXFB_COMPOSITE_SYNC (1 << 4) > +#define EP93XXFB_SYNC_VERT_HIGH (1 << 5) > +#define EP93XXFB_SYNC_HORIZ_HIGH (1 << 6) > +#define EP93XXFB_SYNC_BLANK_HIGH (1 << 7) > +#define EP93XXFB_PCLK_FALLING (1 << 8) > +#define EP93XXFB_ENABLE_AC (1 << 9) > +#define EP93XXFB_ENABLE_LCD (1 << 10) > +#define EP93XXFB_ENABLE_CCIR (1 << 12) > +#define EP93XXFB_USE_PARALLEL_INTERFACE (1 << 13) > +#define EP93XXFB_ENABLE_INTERRUPT (1 << 14) > +#define EP93XXFB_USB_INTERLACE (1 << 16) > +#define EP93XXFB_USE_EQUALIZATION (1 << 17) > +#define EP93XXFB_USE_DOUBLE_HORZ (1 << 18) > +#define EP93XXFB_USE_DOUBLE_VERT (1 << 19) > +#define EP93XXFB_USE_BLANK_PIXEL (1 << 20) > +#define EP93XXFB_USE_SDCSN0 (0 << 21) > +#define EP93XXFB_USE_SDCSN1 (1 << 21) > +#define EP93XXFB_USE_SDCSN2 (2 << 21) > +#define EP93XXFB_USE_SDCSN3 (3 << 21) > + > +#define EP93XXFB_ENABLE (EP93XXFB_STATE_MACHINE_ENABLE | \ > + EP93XXFB_PIXEL_CLOCK_ENABLE | \ > + EP93XXFB_VSYNC_ENABLE | \ > + EP93XXFB_PIXEL_DATA_ENABLE) > + > +struct ep93xxfb_mach_info { > + unsigned int num_modes; > + const struct fb_videomode *modes; > + const struct fb_videomode *default_mode; > + int bpp; > + unsigned int flags; > + > + int (*setup)(struct fb_info *info); > + void (*teardown)(struct fb_info *info); > + void (*blank)(int blank_mode, struct fb_info *info); > +}; > + > +#endif /* __ASM_ARCH_EP93XXFB_H */ > diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h > index 0af0a3b..b7f1589 100644 > --- a/arch/arm/mach-ep93xx/include/mach/platform.h > +++ b/arch/arm/mach-ep93xx/include/mach/platform.h > @@ -5,6 +5,7 @@ > #ifndef __ASSEMBLY__ > > struct i2c_board_info; > +struct ep93xxfb_mach_info; > > struct ep93xx_eth_data > { > @@ -32,6 +33,7 @@ static inline void ep93xx_devcfg_clear_bits(unsigned int bits) > > void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr); > void ep93xx_register_i2c(struct i2c_board_info *devices, int num); > +void ep93xx_register_fb(struct ep93xxfb_mach_info *data); > > void ep93xx_init_devices(void); > extern struct sys_timer ep93xx_timer; > Looks good other than that. I'm not sure which tag is appropriate for this patch. So here's both. Signed-off-by: H Hartley Sweeten <hsw...@vi...> Acked-by: H Hartley Sweeten <hsw...@vi...> |
From: Daniel M. <da...@ca...> - 2009-07-20 10:30:06
|
Add ID 99 for PXA3xx frame buffers and use it in pxafb when running on a pxa with acceleration enabled. Signed-off-by: Daniel Mack <da...@ca...> Cc: Eric Miao <eri...@ma...> Cc: lin...@li... Cc: Dennis Oliver Kropp <do...@di...> Cc: Sven Neumann <s.n...@ra...> --- drivers/video/pxafb.c | 5 +++++ include/linux/fb.h | 1 + 2 files changed, 6 insertions(+), 0 deletions(-) diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c index 3951cc5..922ed8a 100644 --- a/drivers/video/pxafb.c +++ b/drivers/video/pxafb.c @@ -2083,6 +2083,11 @@ static int __devinit pxafb_probe(struct platform_device *dev) goto failed; } +#ifdef CONFIG_PXA3XX_GCU + if (cpu_is_pxa3xx()) + fbi->fb.fix.accel = FB_ACCEL_PXA3XX; +#endif + fbi->backlight_power = inf->pxafb_backlight_power; fbi->lcd_power = inf->pxafb_lcd_power; diff --git a/include/linux/fb.h b/include/linux/fb.h index f847df9..a34bdf5 100644 --- a/include/linux/fb.h +++ b/include/linux/fb.h @@ -133,6 +133,7 @@ struct dentry; #define FB_ACCEL_NEOMAGIC_NM2230 96 /* NeoMagic NM2230 */ #define FB_ACCEL_NEOMAGIC_NM2360 97 /* NeoMagic NM2360 */ #define FB_ACCEL_NEOMAGIC_NM2380 98 /* NeoMagic NM2380 */ +#define FB_ACCEL_PXA3XX 99 /* PXA3xx */ #define FB_ACCEL_SAVAGE4 0x80 /* S3 Savage4 */ #define FB_ACCEL_SAVAGE3D 0x81 /* S3 Savage3D */ -- 1.6.3.1 |
From: Ryan M. <ry...@bl...> - 2009-07-19 00:00:19
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Updated version of the ep93xx video driver patch with fixes suggested by Hartley. Signed-off-by: Ryan Mallon <ry...@bl...> --- diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 55022f3..bda367f 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -2114,6 +2114,17 @@ config FB_MB862XX_LIME ---help--- Framebuffer support for Fujitsu Lime GDC on host CPU bus. +config FB_EP93XX + tristate "EP93XX frame buffer support" + depends on FB && ARCH_EP93XX + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT + ---help--- + Framebuffer driver for the Cirrus Logic EP93XX series of processors. + This driver is also available as a module. The module will be called + ep93xxfb. + config FB_PRE_INIT_FB bool "Don't reinitialize, use bootloader's GDC/Display configuration" depends on FB_MB862XX_LIME diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 01a819f..6d6fdf3 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -126,6 +126,7 @@ obj-$(CONFIG_FB_OMAP) += omap/ obj-$(CONFIG_XEN_FBDEV_FRONTEND) += xen-fbfront.o obj-$(CONFIG_FB_CARMINE) += carminefb.o obj-$(CONFIG_FB_MB862XX) += mb862xx/ +obj-$(CONFIG_FB_EP93XX) += ep93xx_fb.o # Platform or fallback drivers go here obj-$(CONFIG_FB_UVESA) += uvesafb.o diff --git a/drivers/video/ep93xx_fb.c b/drivers/video/ep93xx_fb.c new file mode 100644 index 0000000..c54a19b --- /dev/null +++ b/drivers/video/ep93xx_fb.c @@ -0,0 +1,646 @@ +/* + * linux/drivers/video/ep93xx_fb.c + * + * Framebuffer support for the EP93xx series. + * + * Copyright (C) 2007 Bluewater Systems + * Author: Ryan Mallon <ry...@bl...> + * + * Copyright (c) 2009 H Hartley Sweeten <hsw...@vi...> + * + * Based on the Cirrus Logic ep93xxfb driver, and various other ep93xxfb + * drivers. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/platform_device.h> +#include <linux/dma-mapping.h> +#include <linux/clk.h> +#include <linux/fb.h> + +#include <mach/fb.h> + +/* Vertical Frame Timing Registers */ +#define EP93XXFB_VLINES_TOTAL 0x0000 /* SW locked */ +#define EP93XXFB_VSYNC 0x0004 /* SW locked */ +#define EP93XXFB_VACTIVE 0x0008 /* SW locked */ +#define EP93XXFB_VBLANK 0x0228 /* SW locked */ +#define EP93XXFB_VCLK 0x000c /* SW locked */ + +/* Horizontal Frame Timing Registers */ +#define EP93XXFB_HCLKS_TOTAL 0x0010 /* SW locked */ +#define EP93XXFB_HSYNC 0x0014 /* SW locked */ +#define EP93XXFB_HACTIVE 0x0018 /* SW locked */ +#define EP93XXFB_HBLANK 0x022c /* SW locked */ +#define EP93XXFB_HCLK 0x001c /* SW locked */ + +/* Frame Buffer Memory Configuration Registers */ +#define EP93XXFB_SCREEN_PAGE 0x0028 +#define EP93XXFB_SCREEN_HPAGE 0x002c +#define EP93XXFB_SCREEN_LINES 0x0030 +#define EP93XXFB_LINE_LENGTH 0x0034 +#define EP93XXFB_VLINE_STEP 0x0038 +#define EP93XXFB_LINE_CARRY 0x003c /* SW locked */ +#define EP93XXFB_EOL_OFFSET 0x0230 + +/* Other Video Registers */ +#define EP93XXFB_BRIGHTNESS 0x0020 +#define EP93XXFB_ATTRIBS 0x0024 /* SW locked */ +#define EP93XXFB_SWLOCK 0x007c /* SW locked */ +#define EP93XXFB_AC_RATE 0x0214 +#define EP93XXFB_FIFO_LEVEL 0x0234 +#define EP93XXFB_PIXELMODE 0x0054 +#define EP93XXFB_PIXELMODE_32BPP (0x7 << 0) +#define EP93XXFB_PIXELMODE_24BPP (0x6 << 0) +#define EP93XXFB_PIXELMODE_16BPP (0x4 << 0) +#define EP93XXFB_PIXELMODE_8BPP (0x2 << 0) +#define EP93XXFB_PIXELMODE_SHIFT_1P_24B (0x0 << 3) +#define EP93XXFB_PIXELMODE_SHIFT_1P_18B (0x1 << 3) +#define EP93XXFB_PIXELMODE_COLOR_LUT (0x0 << 10) +#define EP93XXFB_PIXELMODE_COLOR_888 (0x4 << 10) +#define EP93XXFB_PIXELMODE_COLOR_555 (0x5 << 10) +#define EP93XXFB_PARL_IF_OUT 0x0058 +#define EP93XXFB_PARL_IF_IN 0x005c + +/* Blink Control Registers */ +#define EP93XXFB_BLINK_RATE 0x0040 +#define EP93XXFB_BLINK_MASK 0x0044 +#define EP93XXFB_BLINK_PATTRN 0x0048 +#define EP93XXFB_PATTRN_MASK 0x004c +#define EP93XXFB_BKGRND_OFFSET 0x0050 + +/* Hardware Cursor Registers */ +#define EP93XXFB_CURSOR_ADR_START 0x0060 +#define EP93XXFB_CURSOR_ADR_RESET 0x0064 +#define EP93XXFB_CURSOR_SIZE 0x0068 +#define EP93XXFB_CURSOR_COLOR1 0x006c +#define EP93XXFB_CURSOR_COLOR2 0x0070 +#define EP93XXFB_CURSOR_BLINK_COLOR1 0x021c +#define EP93XXFB_CURSOR_BLINK_COLOR2 0x0220 +#define EP93XXFB_CURSOR_XY_LOC 0x0074 +#define EP93XXFB_CURSOR_DSCAN_HY_LOC 0x0078 +#define EP93XXFB_CURSOR_BLINK_RATE_CTRL 0x0224 + +/* LUT Registers */ +#define EP93XXFB_GRY_SCL_LUTR 0x0080 +#define EP93XXFB_GRY_SCL_LUTG 0x0280 +#define EP93XXFB_GRY_SCL_LUTB 0x0300 +#define EP93XXFB_LUT_SW_CONTROL 0x0218 +#define EP93XXFB_LUT_SW_CONTROL_SWTCH (1 << 0) +#define EP93XXFB_LUT_SW_CONTROL_SSTAT (1 << 1) +#define EP93XXFB_COLOR_LUT 0x0400 + +/* Video Signature Registers */ +#define EP93XXFB_VID_SIG_RSLT_VAL 0x0200 +#define EP93XXFB_VID_SIG_CTRL 0x0204 +#define EP93XXFB_VSIG 0x0208 +#define EP93XXFB_HSIG 0x020c +#define EP93XXFB_SIG_CLR_STR 0x0210 + +/* Minimum / Maximum resolutions supported */ +#define EP93XXFB_MIN_XRES 64 +#define EP93XXFB_MIN_YRES 64 +#define EP93XXFB_MAX_XRES 1024 +#define EP93XXFB_MAX_YRES 768 + +struct ep93xx_fbi { + struct ep93xxfb_mach_info *mach_info; + struct clk *clk; + struct resource *res; + void __iomem *mmio_base; + unsigned int pseudo_palette[256]; +}; + +static int check_screenpage_bug = 1; +module_param(check_screenpage_bug, int, 0644); +MODULE_PARM_DESC(check_screenpage_bug, + "Check for bit 27 screen page bug. Default = 1"); + +static inline unsigned int ep93xxfb_readl(struct ep93xx_fbi *fbi, + unsigned int off) +{ + return __raw_readl(fbi->mmio_base + off); +} + +static inline void ep93xxfb_writel(struct ep93xx_fbi *fbi, + unsigned int val, unsigned int off) +{ + __raw_writel(val, fbi->mmio_base + off); +} + +/* + * Write to one of the locked raster registers. + */ +static inline void ep93xxfb_out_locked(struct ep93xx_fbi *fbi, + unsigned int val, unsigned int reg) +{ + /* + * We don't need a lock or delay here since the raster register + * block will remain unlocked until the next access. + */ + ep93xxfb_writel(fbi, 0xaa, EP93XXFB_SWLOCK); + ep93xxfb_writel(fbi, val, reg); +} + +static void ep93xxfb_set_video_attribs(struct fb_info *info) +{ + struct ep93xx_fbi *fbi = info->par; + unsigned int attribs; + + attribs = EP93XXFB_ENABLE; + attribs |= fbi->mach_info->flags; + ep93xxfb_out_locked(fbi, attribs, EP93XXFB_ATTRIBS); +} + +static int ep93xxfb_set_pixelmode(struct fb_info *info) +{ + struct ep93xx_fbi *fbi = info->par; + unsigned int val; + + info->var.transp.offset = 0; + info->var.transp.length = 0; + + switch (info->var.bits_per_pixel) { + case 8: + val = EP93XXFB_PIXELMODE_8BPP | EP93XXFB_PIXELMODE_COLOR_LUT | + EP93XXFB_PIXELMODE_SHIFT_1P_18B; + + info->var.red.offset = 0; + info->var.red.length = 8; + info->var.green.offset = 0; + info->var.green.length = 8; + info->var.blue.offset = 0; + info->var.blue.length = 8; + info->fix.visual = FB_VISUAL_PSEUDOCOLOR; + break; + + case 16: + val = EP93XXFB_PIXELMODE_16BPP | EP93XXFB_PIXELMODE_COLOR_555 | + EP93XXFB_PIXELMODE_SHIFT_1P_18B; + + info->var.red.offset = 11; + info->var.red.length = 5; + info->var.green.offset = 5; + info->var.green.length = 6; + info->var.blue.offset = 0; + info->var.blue.length = 5; + info->fix.visual = FB_VISUAL_TRUECOLOR; + break; + + case 24: + val = EP93XXFB_PIXELMODE_24BPP | EP93XXFB_PIXELMODE_COLOR_888 | + EP93XXFB_PIXELMODE_SHIFT_1P_24B; + + info->var.red.offset = 16; + info->var.red.length = 8; + info->var.green.offset = 8; + info->var.green.length = 8; + info->var.blue.offset = 0; + info->var.blue.length = 8; + info->fix.visual = FB_VISUAL_TRUECOLOR; + break; + + case 32: + val = EP93XXFB_PIXELMODE_32BPP | EP93XXFB_PIXELMODE_COLOR_888 | + EP93XXFB_PIXELMODE_SHIFT_1P_24B; + + info->var.red.offset = 16; + info->var.red.length = 8; + info->var.green.offset = 8; + info->var.green.length = 8; + info->var.blue.offset = 0; + info->var.blue.length = 8; + info->fix.visual = FB_VISUAL_TRUECOLOR; + break; + + default: + return -EINVAL; + } + + ep93xxfb_writel(fbi, val, EP93XXFB_PIXELMODE); + return 0; +} + +static void ep93xxfb_set_timing(struct fb_info *info) +{ + struct ep93xx_fbi *fbi = info->par; + unsigned int vlines_total, hclks_total, start, stop; + + vlines_total = info->var.yres + info->var.upper_margin + + info->var.lower_margin + info->var.vsync_len - 1; + + hclks_total = info->var.xres + info->var.left_margin + + info->var.right_margin + info->var.hsync_len - 1; + + ep93xxfb_out_locked(fbi, vlines_total, EP93XXFB_VLINES_TOTAL); + ep93xxfb_out_locked(fbi, hclks_total, EP93XXFB_HCLKS_TOTAL); + + start = vlines_total; + stop = vlines_total - info->var.vsync_len; + ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_VSYNC); + + start = vlines_total - info->var.vsync_len - info->var.upper_margin; + stop = info->var.lower_margin - 1; + ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_VBLANK); + ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_VACTIVE); + + start = vlines_total; + stop = vlines_total + 1; + ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_VCLK); + + start = hclks_total; + stop = hclks_total - info->var.hsync_len; + ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_HSYNC); + + start = hclks_total - info->var.hsync_len - info->var.left_margin; + stop = info->var.right_margin - 1; + ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_HBLANK); + ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_HACTIVE); + + start = hclks_total; + stop = hclks_total; + ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_HCLK); + + ep93xxfb_out_locked(fbi, 0x0, EP93XXFB_LINE_CARRY); +} + +static int ep93xxfb_set_par(struct fb_info *info) +{ + struct ep93xx_fbi *fbi = info->par; + + clk_set_rate(fbi->clk, 1000 * PICOS2KHZ(info->var.pixclock)); + + ep93xxfb_set_timing(info); + + info->fix.line_length = info->var.xres_virtual * + info->var.bits_per_pixel / 8; + + ep93xxfb_writel(fbi, info->fix.smem_start, EP93XXFB_SCREEN_PAGE); + ep93xxfb_writel(fbi, info->var.yres - 1, EP93XXFB_SCREEN_LINES); + ep93xxfb_writel(fbi, ((info->var.xres * info->var.bits_per_pixel) + / 32) - 1, EP93XXFB_LINE_LENGTH); + ep93xxfb_writel(fbi, info->fix.line_length / 4, EP93XXFB_VLINE_STEP); + ep93xxfb_set_video_attribs(info); + return 0; +} + +static int ep93xxfb_check_var(struct fb_var_screeninfo *var, + struct fb_info *info) +{ + int err; + + err = ep93xxfb_set_pixelmode(info); + if (err) + return err; + + var->xres = max(var->xres, (unsigned int)EP93XXFB_MIN_XRES); + var->xres = min(var->xres, (unsigned int)EP93XXFB_MAX_XRES); + var->xres_virtual = max(var->xres_virtual, var->xres); + + var->yres = max(var->yres, (unsigned int)EP93XXFB_MIN_YRES); + var->yres = min(var->yres, (unsigned int)EP93XXFB_MAX_YRES); + var->yres_virtual = max(var->yres_virtual, var->yres); + + return 0; +} + +static int ep93xxfb_mmap(struct fb_info *info, struct vm_area_struct *vma) +{ + unsigned int offset = vma->vm_pgoff << PAGE_SHIFT; + + if (offset < info->fix.smem_len) { + return dma_mmap_writecombine(info->dev, vma, info->screen_base, + info->fix.smem_start, + info->fix.smem_len); + } + + return -EINVAL; +} + +static int ep93xxfb_blank(int blank_mode, struct fb_info *info) +{ + struct ep93xx_fbi *fbi = info->par; + unsigned int attribs = ep93xxfb_readl(fbi, EP93XXFB_ATTRIBS); + + if (blank_mode) { + if (fbi->mach_info->blank) + fbi->mach_info->blank(blank_mode, info); + ep93xxfb_out_locked(fbi, attribs & ~EP93XXFB_ENABLE, + EP93XXFB_ATTRIBS); + clk_disable(fbi->clk); + } else { + clk_enable(fbi->clk); + ep93xxfb_out_locked(fbi, attribs | EP93XXFB_ENABLE, + EP93XXFB_ATTRIBS); + if (fbi->mach_info->blank) + fbi->mach_info->blank(blank_mode, info); + } + + return 0; +} + +static inline int ep93xxfb_convert_color(int val, int width) +{ + return ((val << width) + 0x7fff - val) >> 16; +} + +static int ep93xxfb_setcolreg(unsigned int regno, unsigned int red, + unsigned int green, unsigned int blue, + unsigned int transp, struct fb_info *info) +{ + struct ep93xx_fbi *fbi = info->par; + unsigned int *pal = info->pseudo_palette; + unsigned int ctrl, i, rgb, lut_current, lut_stat; + + switch (info->fix.visual) { + case FB_VISUAL_PSEUDOCOLOR: + rgb = ((red & 0xff00) << 8) | (green & 0xff00) | + ((blue & 0xff00) >> 8); + + pal[regno] = rgb; + ep93xxfb_writel(fbi, rgb, (EP93XXFB_COLOR_LUT + (regno << 2))); + ctrl = ep93xxfb_readl(fbi, EP93XXFB_LUT_SW_CONTROL); + lut_stat = !!(ctrl & EP93XXFB_LUT_SW_CONTROL_SSTAT); + lut_current = !!(ctrl & EP93XXFB_LUT_SW_CONTROL_SWTCH); + + if (lut_stat == lut_current) { + for (i = 0; i < 256; i++) { + ep93xxfb_writel(fbi, pal[i], + EP93XXFB_COLOR_LUT + (i << 2)); + } + + ep93xxfb_writel(fbi, + ctrl ^ EP93XXFB_LUT_SW_CONTROL_SWTCH, + EP93XXFB_LUT_SW_CONTROL); + } + break; + + case FB_VISUAL_TRUECOLOR: + if (regno > 16) + return 1; + + red = ep93xxfb_convert_color(red, info->var.red.length); + green = ep93xxfb_convert_color(green, info->var.green.length); + blue = ep93xxfb_convert_color(blue, info->var.blue.length); + transp = ep93xxfb_convert_color(transp, + info->var.transp.length); + + pal[regno] = (red << info->var.red.offset) | + (green << info->var.green.offset) | + (blue << info->var.blue.offset) | + (transp << info->var.transp.offset); + break; + + default: + return 1; + } + + return 0; +} + +static struct fb_ops ep93xxfb_ops = { + .owner = THIS_MODULE, + .fb_check_var = ep93xxfb_check_var, + .fb_set_par = ep93xxfb_set_par, + .fb_blank = ep93xxfb_blank, + .fb_fillrect = cfb_fillrect, + .fb_copyarea = cfb_copyarea, + .fb_imageblit = cfb_imageblit, + .fb_setcolreg = ep93xxfb_setcolreg, + .fb_mmap = ep93xxfb_mmap, +}; + +static int __init ep93xxfb_calc_fbsize(struct ep93xxfb_mach_info *mach_info) +{ + int i, fb_size = 0; + + if (mach_info->num_modes == EP93XXFB_USE_MODEDB) { + fb_size = EP93XXFB_MAX_XRES * EP93XXFB_MAX_YRES * + mach_info->bpp / 8; + } else { + for (i = 0; i < mach_info->num_modes; i++) { + const struct fb_videomode *mode; + int size; + + mode = &mach_info->modes[i]; + size = mode->xres * mode->yres * mach_info->bpp / 8; + if (size > fb_size) + fb_size = size; + } + } + + return fb_size; +} + +static int __init ep93xxfb_alloc_videomem(struct fb_info *info) +{ + struct ep93xx_fbi *fbi = info->par; + char __iomem *virt_addr; + dma_addr_t phys_addr; + unsigned int fb_size; + + fb_size = ep93xxfb_calc_fbsize(fbi->mach_info); + virt_addr = dma_alloc_writecombine(info->dev, fb_size, + &phys_addr, GFP_KERNEL); + if (!virt_addr) + return -ENOMEM; + + /* + * There is a bug in the ep93xx framebuffer which causes problems + * if bit 27 of the physical address is set. + * See: http://marc.info/?l=linux-arm-kernel&m=110061245502000&w=2 + * There does not seem to be any offical errata for this, but I + * have confirmed the problem exists on my hardware (ep9315) at + * least. + */ + if (check_screenpage_bug && phys_addr & (1 << 27)) { + dev_err(info->dev, "ep93xx framebuffer bug. phys addr (0x%x) " + "has bit 27 set: cannot init framebuffer\n", + phys_addr); + + dma_free_coherent(info->dev, fb_size, virt_addr, phys_addr); + return -ENOMEM; + } + + info->fix.smem_start = phys_addr; + info->fix.smem_len = fb_size; + info->screen_base = virt_addr; + + return 0; +} + +static void ep93xxfb_dealloc_videomem(struct fb_info *info) +{ + if (info->screen_base) + dma_free_coherent(info->dev, info->fix.smem_len, + info->screen_base, info->fix.smem_start); +} + +static int __init ep93xxfb_probe(struct platform_device *pdev) +{ + struct ep93xxfb_mach_info *mach_info = pdev->dev.platform_data; + struct fb_info *info; + struct ep93xx_fbi *fbi; + struct resource *res; + char *video_mode; + int err; + + if (!mach_info) + return -EINVAL; + + info = framebuffer_alloc(sizeof(struct ep93xx_fbi), &pdev->dev); + if (!info) + return -ENOMEM; + + info->dev = &pdev->dev; + platform_set_drvdata(pdev, info); + fbi = info->par; + fbi->mach_info = mach_info; + + err = fb_alloc_cmap(&info->cmap, 256, 0); + if (err) + goto failed; + + err = ep93xxfb_alloc_videomem(info); + if (err) + goto failed; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (res == NULL) { + err = -ENXIO; + goto failed; + } + + res = request_mem_region(res->start, resource_size(res), pdev->name); + if (res == NULL) { + err = -EBUSY; + goto failed; + } + + fbi->res = res; + fbi->mmio_base = ioremap(res->start, resource_size(res)); + if (fbi->mmio_base == NULL) { + err = -ENXIO; + goto failed; + } + + strcpy(info->fix.id, pdev->name); + info->fbops = &ep93xxfb_ops; + info->fix.type = FB_TYPE_PACKED_PIXELS; + info->fix.accel = FB_ACCEL_NONE; + info->var.activate = FB_ACTIVATE_NOW; + info->var.vmode = FB_VMODE_NONINTERLACED; + info->flags = FBINFO_DEFAULT; + info->node = -1; + info->state = FBINFO_STATE_RUNNING; + info->pseudo_palette = &fbi->pseudo_palette; + + fb_get_options("ep93xx-fb", &video_mode); + err = fb_find_mode(&info->var, info, video_mode, + fbi->mach_info->modes, fbi->mach_info->num_modes, + fbi->mach_info->default_mode, fbi->mach_info->bpp); + if (err == 0) { + dev_err(info->dev, "No suitable video mode found\n"); + err = -EINVAL; + goto failed; + } + + if (mach_info->setup) { + err = mach_info->setup(info); + if (err) + return err; + } + + err = ep93xxfb_check_var(&info->var, info); + if (err) + goto failed; + + fbi->clk = clk_get(info->dev, NULL); + if (IS_ERR(fbi->clk)) { + err = PTR_ERR(fbi->clk); + fbi->clk = NULL; + goto failed; + } + + ep93xxfb_set_par(info); + clk_enable(fbi->clk); + + err = register_framebuffer(info); + if (err) + goto failed; + + dev_info(info->dev, "registered. Mode = %dx%d-%d\n", + info->var.xres, info->var.yres, info->var.bits_per_pixel); + return 0; + +failed: + if (fbi->clk) + clk_put(fbi->clk); + if (fbi->mmio_base) + iounmap(fbi->mmio_base); + if (fbi->res) + release_mem_region(fbi->res->start, resource_size(fbi->res)); + ep93xxfb_dealloc_videomem(info); + if (&info->cmap) + fb_dealloc_cmap(&info->cmap); + if (fbi->mach_info->teardown) + fbi->mach_info->teardown(info); + kfree(info); + platform_set_drvdata(pdev, NULL); + + return err; +} + +static int ep93xxfb_remove(struct platform_device *pdev) +{ + struct fb_info *info = platform_get_drvdata(pdev); + struct ep93xx_fbi *fbi = info->par; + + unregister_framebuffer(info); + clk_disable(fbi->clk); + clk_put(fbi->clk); + iounmap(fbi->mmio_base); + release_mem_region(fbi->res->start, resource_size(fbi->res)); + ep93xxfb_dealloc_videomem(info); + fb_dealloc_cmap(&info->cmap); + + if (fbi->mach_info->teardown) + fbi->mach_info->teardown(info); + + kfree(info); + platform_set_drvdata(pdev, NULL); + + return 0; +} + +static struct platform_driver ep93xxfb_driver = { + .probe = ep93xxfb_probe, + .remove = ep93xxfb_remove, + .driver = { + .name = "ep93xx-fb", + .owner = THIS_MODULE, + }, +}; + +static int __devinit ep93xxfb_init(void) +{ + return platform_driver_register(&ep93xxfb_driver); +} + +static void __exit ep93xxfb_exit(void) +{ + platform_driver_unregister(&ep93xxfb_driver); +} + +module_init(ep93xxfb_init); +module_exit(ep93xxfb_exit); + +MODULE_DESCRIPTION("EP93XX Framebuffer Driver"); +MODULE_ALIAS("platform:ep93xx-fb"); +MODULE_AUTHOR("Ryan Mallon <ryan&bluewatersys.com>, " + "H Hartley Sweeten <hsw...@vi..."); +MODULE_LICENSE("GPL"); |
From: Ryan M. <ry...@bl...> - 2009-07-18 23:56:08
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Updated version of the ep93xx video driver platform support patch with fixes suggested by Hartley. Signed-off-by: Ryan Mallon <ry...@bl...> --- diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c index b6b5344..a8ebda4 100644 --- a/arch/arm/mach-ep93xx/clock.c +++ b/arch/arm/mach-ep93xx/clock.c @@ -37,7 +37,7 @@ struct clk { static unsigned long get_uart_rate(struct clk *clk); static int set_keytchclk_rate(struct clk *clk, unsigned long rate); - +static int set_div_rate(struct clk *clk, unsigned long rate); static struct clk clk_uart1 = { .sw_locked = 1, @@ -73,6 +73,13 @@ static struct clk clk_keypad = { .set_rate = set_keytchclk_rate, }; +static struct clk clk_video = { + .sw_locked = 1, + .enable_reg = EP93XX_SYSCON_VIDCLKDIV, + .enable_mask = EP93XX_SYSCON_CLKDIV_ENABLE, + .set_rate = set_div_rate, +}; + /* DMA Clocks */ static struct clk clk_m2p0 = { .enable_reg = EP93XX_SYSCON_PWRCNT, @@ -137,6 +144,7 @@ static struct clk_lookup clocks[] = { INIT_CK(NULL, "pll2", &clk_pll2), INIT_CK("ep93xx-ohci", NULL, &clk_usb_host), INIT_CK("ep93xx-keypad", NULL, &clk_keypad), + INIT_CK("ep93xx-fb", NULL, &clk_video), INIT_CK(NULL, "m2p0", &clk_m2p0), INIT_CK(NULL, "m2p1", &clk_m2p1), INIT_CK(NULL, "m2p2", &clk_m2p2), @@ -232,6 +240,84 @@ static int set_keytchclk_rate(struct clk *clk, unsigned long rate) return 0; } +static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel, + int *pdiv, int *div) +{ + unsigned long max_rate, best_rate = 0, + actual_rate = 0, mclk_rate = 0, rate_err = -1; + int i, found = 0, __div = 0, __pdiv = 0; + + /* Don't exceed the maximum rate */ + max_rate = max(max(clk_pll1.rate / 4, clk_pll2.rate / 4), + (unsigned long)EP93XX_EXT_CLK_RATE / 4); + rate = min(rate, max_rate); + + /* + * Try the two pll's and the external clock + * Because the valid predividers are 2, 2.5 and 3, we multiply + * all the clocks by 2 to avoid floating point math. + * + * This is based on the algorithm in the ep93xx raster guide: + * http://be-a-maverick.com/en/pubs/appNote/AN269REV1.pdf + * + */ + for (i = 0; i < 3; i++) { + if (i == 0) + mclk_rate = EP93XX_EXT_CLK_RATE * 2; + else if (i == 1) + mclk_rate = clk_pll1.rate * 2; + else if (i == 2) + mclk_rate = clk_pll2.rate * 2; + + /* Try each predivider value */ + for (__pdiv = 4; __pdiv <= 6; __pdiv++) { + __div = mclk_rate / (rate * __pdiv); + if (__div < 2 || __div > 127) + continue; + + actual_rate = mclk_rate / __pdiv * __div; + + if (!found || abs(actual_rate - rate) < rate_err) { + *pdiv = __pdiv - 3; + *div = __div; + *psel = (i == 2); + *esel = (i != 0); + best_rate = actual_rate; + rate_err = actual_rate - rate; + found = 1; + } + } + } + + if (!found) + return 0; + + return best_rate; +} + +static int set_div_rate(struct clk *clk, unsigned long rate) +{ + unsigned long actual_rate; + int psel = 0, esel = 0, pdiv = 0, div = 0; + u32 val; + + actual_rate = calc_clk_div(rate, &psel, &esel, &pdiv, &div); + if (actual_rate == 0) + return -EINVAL; + clk->rate = actual_rate; + + /* Clear the esel, psel, pdiv and div bits */ + val = __raw_readl(clk->enable_reg); + val &= ~0x7fff; + + /* Set the new esel, psel, pdiv and div bits for the new clock rate */ + val |= (esel ? EP93XX_SYSCON_CLKDIV_ESEL : 0) | + (psel ? EP93XX_SYSCON_CLKDIV_PSEL : 0) | + (pdiv << EP93XX_SYSCON_CLKDIV_PDIV_SHIFT) | div; + ep93xx_syscon_swlocked_write(val, clk->enable_reg); + return 0; +} + int clk_set_rate(struct clk *clk, unsigned long rate) { if (clk->set_rate) diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index 8e59bdc..f19ec01 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c @@ -29,6 +29,7 @@ #include <linux/i2c-gpio.h> #include <mach/hardware.h> +#include <mach/fb.h> #include <asm/mach/map.h> #include <asm/mach/time.h> @@ -36,7 +37,6 @@ #include <asm/hardware/vic.h> - /************************************************************************* * Static I/O mappings that are needed for all EP93xx platforms *************************************************************************/ @@ -570,6 +570,37 @@ void __init ep93xx_register_i2c(struct i2c_board_info *devices, int num) platform_device_register(&ep93xx_i2c_device); } +/************************************************************************* + * EP93xx video peripheral handling + *************************************************************************/ +static struct ep93xxfb_mach_info ep93xxfb_data; + +static struct resource ep93xx_fb_resource[] = { + { + .start = EP93XX_RASTER_PHYS_BASE, + .end = EP93XX_RASTER_PHYS_BASE + 0x800 - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device ep93xx_fb_device = { + .name = "ep93xx-fb", + .id = -1, + .dev = { + .platform_data = &ep93xxfb_data, + .coherent_dma_mask = DMA_BIT_MASK(32), + .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask, + }, + .num_resources = ARRAY_SIZE(ep93xx_fb_resource), + .resource = ep93xx_fb_resource, +}; + +void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data) +{ + ep93xxfb_data = *data; + platform_device_register(&ep93xx_fb_device); +} + extern void ep93xx_gpio_init(void); void __init ep93xx_init_devices(void) diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h index a11ae77..4519172 100644 --- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h +++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h @@ -70,6 +70,7 @@ #define EP93XX_USB_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00020000) #define EP93XX_USB_BASE EP93XX_AHB_IOMEM(0x00020000) +#define EP93XX_RASTER_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00030000) #define EP93XX_RASTER_BASE EP93XX_AHB_IOMEM(0x00030000) #define EP93XX_GRAPHICS_ACCEL_BASE EP93XX_AHB_IOMEM(0x00040000) @@ -206,6 +207,11 @@ #define EP93XX_SYSCON_DEVCFG_ADCPD (1<<2) #define EP93XX_SYSCON_DEVCFG_KEYS (1<<1) #define EP93XX_SYSCON_DEVCFG_SHENA (1<<0) +#define EP93XX_SYSCON_VIDCLKDIV EP93XX_SYSCON_REG(0x84) +#define EP93XX_SYSCON_CLKDIV_PSEL (1<<13) +#define EP93XX_SYSCON_CLKDIV_ESEL (1<<14) +#define EP93XX_SYSCON_CLKDIV_ENABLE (1<<15) +#define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8 #define EP93XX_SYSCON_KEYTCHCLKDIV EP93XX_SYSCON_REG(0x90) #define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN (1<<31) #define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16) diff --git a/arch/arm/mach-ep93xx/include/mach/fb.h b/arch/arm/mach-ep93xx/include/mach/fb.h new file mode 100644 index 0000000..c16b622 --- /dev/null +++ b/arch/arm/mach-ep93xx/include/mach/fb.h @@ -0,0 +1,55 @@ +/* + * arch/arm/mach-ep93xx/include/mach/fb.h + */ + +#ifndef __ASM_ARCH_EP93XXFB_H +#define __ASM_ARCH_EP93XXFB_H + +struct fb_videomode; +struct fb_info; + +#define EP93XXFB_USE_MODEDB 0 + +/* VideoAttributes flags */ +#define EP93XXFB_STATE_MACHINE_ENABLE (1 << 0) +#define EP93XXFB_PIXEL_CLOCK_ENABLE (1 << 1) +#define EP93XXFB_VSYNC_ENABLE (1 << 2) +#define EP93XXFB_PIXEL_DATA_ENABLE (1 << 3) +#define EP93XXFB_COMPOSITE_SYNC (1 << 4) +#define EP93XXFB_SYNC_VERT_HIGH (1 << 5) +#define EP93XXFB_SYNC_HORIZ_HIGH (1 << 6) +#define EP93XXFB_SYNC_BLANK_HIGH (1 << 7) +#define EP93XXFB_PCLK_FALLING (1 << 8) +#define EP93XXFB_ENABLE_AC (1 << 9) +#define EP93XXFB_ENABLE_LCD (1 << 10) +#define EP93XXFB_ENABLE_CCIR (1 << 12) +#define EP93XXFB_USE_PARALLEL_INTERFACE (1 << 13) +#define EP93XXFB_ENABLE_INTERRUPT (1 << 14) +#define EP93XXFB_USB_INTERLACE (1 << 16) +#define EP93XXFB_USE_EQUALIZATION (1 << 17) +#define EP93XXFB_USE_DOUBLE_HORZ (1 << 18) +#define EP93XXFB_USE_DOUBLE_VERT (1 << 19) +#define EP93XXFB_USE_BLANK_PIXEL (1 << 20) +#define EP93XXFB_USE_SDCSN0 (0 << 21) +#define EP93XXFB_USE_SDCSN1 (1 << 21) +#define EP93XXFB_USE_SDCSN2 (2 << 21) +#define EP93XXFB_USE_SDCSN3 (3 << 21) + +#define EP93XXFB_ENABLE (EP93XXFB_STATE_MACHINE_ENABLE | \ + EP93XXFB_PIXEL_CLOCK_ENABLE | \ + EP93XXFB_VSYNC_ENABLE | \ + EP93XXFB_PIXEL_DATA_ENABLE) + +struct ep93xxfb_mach_info { + unsigned int num_modes; + const struct fb_videomode *modes; + const struct fb_videomode *default_mode; + int bpp; + unsigned int flags; + + int (*setup)(struct fb_info *info); + void (*teardown)(struct fb_info *info); + void (*blank)(int blank_mode, struct fb_info *info); +}; + +#endif /* __ASM_ARCH_EP93XXFB_H */ diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h index 0af0a3b..b7f1589 100644 --- a/arch/arm/mach-ep93xx/include/mach/platform.h +++ b/arch/arm/mach-ep93xx/include/mach/platform.h @@ -5,6 +5,7 @@ #ifndef __ASSEMBLY__ struct i2c_board_info; +struct ep93xxfb_mach_info; struct ep93xx_eth_data { @@ -32,6 +33,7 @@ static inline void ep93xx_devcfg_clear_bits(unsigned int bits) void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr); void ep93xx_register_i2c(struct i2c_board_info *devices, int num); +void ep93xx_register_fb(struct ep93xxfb_mach_info *data); void ep93xx_init_devices(void); extern struct sys_timer ep93xx_timer; |
From: Ryan M. <ry...@bl...> - 2009-07-18 23:31:17
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H Hartley Sweeten wrote: > On Thursday, July 16, 2009 8:58 PM, Ryan Mallon wrote: >> diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h >> index a11ae77..33765fa 100644 >> --- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h >> +++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h >> @@ -70,6 +70,7 @@ >> #define EP93XX_USB_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00020000) >> #define EP93XX_USB_BASE EP93XX_AHB_IOMEM(0x00020000) >> >> +#define EP93XX_RASTER_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00030000) >> #define EP93XX_RASTER_BASE EP93XX_AHB_IOMEM(0x00030000) >> >> #define EP93XX_GRAPHICS_ACCEL_BASE EP93XX_AHB_IOMEM(0x00040000) >> @@ -206,13 +207,17 @@ >> #define EP93XX_SYSCON_DEVCFG_ADCPD (1<<2) >> #define EP93XX_SYSCON_DEVCFG_KEYS (1<<1) >> #define EP93XX_SYSCON_DEVCFG_SHENA (1<<0) >> +#define EP93XX_SYSCON_VIDCLKDIV EP93XX_SYSCON_REG(0x84) >> +#define EP93XX_SYSCON_CLKDIV_PSEL (1 << 13) >> +#define EP93XX_SYSCON_CLKDIV_ESEL (1 << 14) >> +#define EP93XX_SYSCON_CLKDIV_ENABLE (1 << 15) >> +#define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8 >> #define EP93XX_SYSCON_KEYTCHCLKDIV EP93XX_SYSCON_REG(0x90) >> #define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN (1<<31) >> #define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16) >> #define EP93XX_SYSCON_KEYTCHCLKDIV_KEN (1<<15) >> #define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV (1<<0) >> #define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0) > > What tree is this patch based on? The KEYTCHCLKDIV defines are not in Russell's > devel branch. I put the patch to fix the keypad #defines in my tree before rebasing the driver. I think this order is preferred since the keypad defines patch is needed for the tree to build without errors. > If (1 << 13) is preferred over (1<<13) we should eventually update this entire file > so that the defines are consistent. I prefer the spaces, but I'll change them in the header file so it is consistent with the rest of the file. We can do a patch later to change all of the defines in the header file, but I honestly don't think it matters as long as it is consistent. ~Ryan |
From: Ryan M. <ry...@bl...> - 2009-07-18 22:46:14
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H Hartley Sweeten wrote: > On Friday, July 17, 2009 1:23 PM, Ryan Mallon wrote: > >> +static int __init ep93xxfb_alloc_videomem(struct fb_info *info) >> +{ >> + struct ep93xx_fbi *fbi = info->par; >> + char __iomem *virt_addr; >> + dma_addr_t phys_addr; >> + unsigned int fb_size; >> + >> + fb_size = ep93xxfb_calc_fbsize(fbi->mach_info); >> + virt_addr = dma_alloc_writecombine(info->dev, fb_size, >> + &phys_addr, GFP_KERNEL); >> + if (!virt_addr) >> + return -ENOMEM; >> + >> + /* >> + * There is a bug in the ep93xx framebuffer which causes problems >> + * if bit 27 of the physical address is set. >> + * See: http://marc.info/?l=linux-arm-kernel&m=110061245502000&w=2 >> + * There does not seem to be any offical errata for this, but I >> + * have confirmed the problem exists on my hardware (ep9315) at >> + * least. >> + */ >> + if (check_screenpage_bug && phys_addr & (1 << 27)) { >> + dev_err(info->dev, "ep93xx framebuffer bug. phys addr (0x%x) " >> + "has bit 27 set: cannot init framebuffer\n", >> + phys_addr); >> + >> + dma_free_coherent(info->dev, fb_size, virt_addr, phys_addr); >> + return -ENOMEM; >> + } >> + >> + info->fix.smem_start = phys_addr; >> + info->fix.smem_len = fb_size; >> + info->screen_base = virt_addr; >> + >> + return 0; >> +} >> > > Were you able to test the SROMLL bit? If that "fixes" the bit 27 bug maybe > this should be added to the comment. As far as I can tell, if the SROMLL bit > is set it is impossbile to have an SDRAM physical address that would have > bit 27 set. With it cleared there are a number of memory configurations that > might have it set. > > I tried the different memory layout you suggested, but I got a massive kernel panic in the memory manager near the end of the boot process. I haven't looked into it too much yet, one of my workmates seemed to think that the way our SDRAM is wired up means that we can only use the memory layout we have. ~Ryan |