[libopenstm32-devel] [PATCH] Updated STM32 memory map, fixed USB_OTG_FS_BASE

[Damjan M. <dam...@gm...>]

---
 include/libopencm3/stm32/memorymap.h |   14 +++++++++++---
 1 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/include/libopencm3/stm32/memorymap.h b/include/libopencm3/stm32/memorymap.h
index 52fe6d4..ad7fe5a 100644
--- a/include/libopencm3/stm32/memorymap.h
+++ b/include/libopencm3/stm32/memorymap.h
@@ -39,7 +39,10 @@
 #define TIM5_BASE			(PERIPH_BASE_APB1 + 0x0c00)
 #define TIM6_BASE			(PERIPH_BASE_APB1 + 0x1000)
 #define TIM7_BASE			(PERIPH_BASE_APB1 + 0x1400)
-/* PERIPH_BASE_APB1 + 0x1800 (0x4000 1800 - 0x4000 27FF): Reserved */
+#define TIM12_BASE			(PERIPH_BASE_APB1 + 0x1800)
+#define TIM13_BASE			(PERIPH_BASE_APB1 + 0x1c00)
+#define TIM14_BASE			(PERIPH_BASE_APB1 + 0x2000)
+/* PERIPH_BASE_APB1 + 0x2400 (0x4000 2400 - 0x4000 27FF): Reserved */
 #define RTC_BASE			(PERIPH_BASE_APB1 + 0x2800)
 #define WWDG_BASE			(PERIPH_BASE_APB1 + 0x2c00)
 #define IWDG_BASE			(PERIPH_BASE_APB1 + 0x3000)
@@ -80,7 +83,11 @@
 #define TIM8_BASE			(PERIPH_BASE_APB2 + 0x3400)
 #define USART1_BASE			(PERIPH_BASE_APB2 + 0x3800)
 #define ADC3_BASE			(PERIPH_BASE_APB2 + 0x3c00)
-/* PERIPH_BASE_APB2 + 0x4000 (0x4001 4000 - 0x4001 7FFF): Reserved */
+/* PERIPH_BASE_APB2 + 0x4000 (0x4001 4000 - 0x4001 4FFF): Reserved */
+#define TIM9_BASE			(PERIPH_BASE_APB2 + 0x4c00)
+#define TIM10_BASE			(PERIPH_BASE_APB2 + 0x5000)
+#define TIM11_BASE			(PERIPH_BASE_APB2 + 0x5400)
+/* PERIPH_BASE_APB2 + 0x5800 (0x4001 5800 - 0x4001 7FFF): Reserved */
 
 /* AHB */
 #define SDIO_BASE			(PERIPH_BASE_AHB + 0x00000)
@@ -95,6 +102,7 @@
 /* PERIPH_BASE_AHB + 0xb400 (0x4002 3400 - 0x4002 7FFF): Reserved */
 #define ETHERNET_BASE			(PERIPH_BASE_AHB + 0x10000)
 /* PERIPH_BASE_AHB + 0x18000 (0x4003 0000 - 0x4FFF FFFF): Reserved */
-#define USB_OTG_FS_BASE			(PERIPH_BASE_AHB + 0x10000000)
+#define USB_OTG_FS_BASE			(PERIPH_BASE +  0x10000000)
+#define FSMC_BASE			(PERIPH_BASE +  0x60000000)
 
 #endif
-- 
1.7.2.3