Re: [libopenstm32-devel] Systick clock source definition

[Gareth M. <ga...@bl...>]

> According to the comment and the symbol STK_CTRL_CLKSOURCE_AHB_DIV8,
> systick'c clock source is core clock divided by 8.
>
> Diving into the Core M3 datasheet, I've found that bit 2 of SysTick
> control and status register selects the clock source, not a divider:
>
>   stk clk src = (STK_CTRL bit 2 == 1) ? core clock : ext ref clk
>
>
The reference manual from ST Microelectronics for STM32F10[12357] (RM0008)
says in section 6.2 and 7.2:
"The RCC feeds the Cortex System Timer (SysTick) external clock with the AHB
clock (HCLK) divided by 8. The SysTick can work either with this clock or
with the Cortex clock (HCLK), configurable in the SysTick Control and Status
Register."

These names are STM32 specific, not Cortex-M3 generic.

Regards,
Gareth

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