Hello,
it seems to me that all the examples have a "wrong" clock
initialization. At least the mb525 is documented as running at 72MHz.
But this is definitely wrong. All examples run at 36MHz. Thats also the
reason why the hardcoded frequency of 36000000 in usart.c of the lib is
correct and working.
Each STM32 has a 8MHz HSI build in. And that divided by 2
(PLLSRC_HSI_CLK_DIV2) is 4MHz. Multiplied by 9 (PLLMUL_PLL_CLK_MUL9)
gives us 36MHz.
And even that 36MHz is overclocking of the flash. Default setting is 0
waitstates after bootup, but this is limited to 24MHz. From 24-48MHz one
should set 1 WS and from 48-72MHz one should set 2 WS. (From RM0008 Dec
9 page 49)
With the internal clock (HSI) there is a maximum clock of 64MHz
possible. 8 div 2 -> multiplied by 16. Its also documented like this in
Document RM0008 from Dec 09 page 78.
Another thing is that we should wait after clock enable til the clock is
stabilized. And that we should do for every clock and not only the PLL.
I have some correct initializations attached.
Best regards,
Thomas Otto
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