[kvm-ppc-devel] [PATCH 10 of 10] [qemu ppc bamboo] Add PCI controller to Bamboo platform

[Hollis B. <ho...@us...>]

Signed-off-by: Hollis Blanchard <ho...@us...>

diff --git a/qemu/hw/ppc440.c b/qemu/hw/ppc440.c
--- a/qemu/hw/ppc440.c
+++ b/qemu/hw/ppc440.c
@@ -8,17 +8,32 @@
  *
  */
 
+
+#include "hw.h"
+#include "hw/isa.h"
 #include "ppc440.h"
+
+#define PPC440EP_PCI_CONFIG 0xeec00000
+#define PPC440EP_PCI_INTACK 0xeed00000
+#define PPC440EP_PCI_SPECIAL 0xeed00000
+#define PPC440EP_PCI_REGS 0xef400000
+#define PPC440EP_PCI_IO 0xe8000000
+#define PPC440EP_PCI_IOLEN 0x10000
+#define PPC440EP_PCI_MEM 0xa0000000
+#define PPC440EP_PCI_MEMLEN 0x20000000
+
 
 void ppc440ep_init(CPUState *env,
 		target_phys_addr_t ram_bases[2],
 		target_phys_addr_t ram_sizes[2],
 		qemu_irq **picp,
+		ppc4xx_pci_t **pcip,
 		int do_init)
 {
 	ppc4xx_mmio_t *mmio;
 	qemu_irq *pic, *irqs;
 	ram_addr_t offset;
+	ppc4xx_pci_t *pci;
 	int i;
 
 	ppc_dcr_init(env, NULL, NULL);
@@ -45,6 +60,18 @@ void ppc440ep_init(CPUState *env,
 	for (i = 0; i < 2; i++)
 		offset += ram_sizes[i];
 
+	/* PCI */
+	pci = ppc4xx_pci_init(env, pic,
+	                      PPC440EP_PCI_CONFIG,
+	                      PPC440EP_PCI_INTACK,
+	                      PPC440EP_PCI_SPECIAL,
+	                      PPC440EP_PCI_REGS);
+	if (!pci)
+		printf("couldn't create PCI controller!\n");
+	*pcip = pci;
+
+	isa_mmio_init(PPC440EP_PCI_IO, PPC440EP_PCI_IOLEN);
+
 	/* serial ports on page 126 of 440EP user manual */
 	if (serial_hds[0]) {
 		printf("Initializing first serial port\n");
diff --git a/qemu/hw/ppc440.h b/qemu/hw/ppc440.h
--- a/qemu/hw/ppc440.h
+++ b/qemu/hw/ppc440.h
@@ -24,6 +24,7 @@ void ppc440ep_init(CPUState *env,
 		target_phys_addr_t ram_bases[2],
 		target_phys_addr_t ram_sizes[2],
 		qemu_irq **picp,
+		ppc4xx_pci_t **pcip,
 		int do_init);
 
 #endif
diff --git a/qemu/hw/ppc440_bamboo.c b/qemu/hw/ppc440_bamboo.c
--- a/qemu/hw/ppc440_bamboo.c
+++ b/qemu/hw/ppc440_bamboo.c
@@ -9,6 +9,11 @@
  */
 
 #include "config.h"
+#include "qemu-common.h"
+#include "net.h"
+#include "hw.h"
+#include "pci.h"
+#include "sysemu.h"
 #include "ppc440.h"
 #include "qemu-kvm.h"
 #include "device_tree.h"
@@ -26,7 +31,9 @@ void bamboo_init(ram_addr_t ram_size, in
 {
 	char *buf=NULL;
 	target_phys_addr_t ram_bases[4], ram_sizes[4];
+	NICInfo *nd;
 	qemu_irq *pic;
+	ppc4xx_pci_t *pci;
 	CPUState *env;
 	target_ulong ep=0;
 	target_ulong la=0;
@@ -77,7 +84,7 @@ void bamboo_init(ram_addr_t ram_size, in
 
 	/* call init */
 	printf("Calling function ppc440_init\n");
-	ppc440ep_init(env, ram_bases, ram_sizes, &pic,1);
+	ppc440ep_init(env, ram_bases, ram_sizes, &pic, &pci, 1);
 	printf("Done calling ppc440_init\n");
 
 	/* Register mem */
@@ -168,6 +175,25 @@ void bamboo_init(ram_addr_t ram_size, in
 		env->nip = ep;
 	}
 
+	if (pci) {
+		int unit_id = 0;
+
+		/* Add virtio block devices. */
+		while ((i = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
+			virtio_blk_init(pci->bus, 0x1AF4, 0x1001,
+				drives_table[i].bdrv);
+			unit_id++;
+		}
+
+		/* Register network interfaces. */
+		for (i = 0; i < nb_nics; i++) {
+			nd = &nd_table[i];
+			if (!nd->model)
+				nd->model = "virtio";
+			pci_nic_init(pci->bus, nd, -1);
+		}
+	}
+
 	printf("%s: DONE\n", __func__);
 }
 
diff --git a/qemu/pc-bios/bamboo.dtb b/qemu/pc-bios/bamboo.dtb
index e02fa8e0bf23b992b04fe87dfce37d4cc08777a6..81f971c64745aaf79152e1ed6f09e5d36137e461
GIT binary patch
literal 3163
zc$~FX&1)Su5TA8kuu~k{DW#-IN?&kGdU%UBiJkbAJX(q`Js48Rp@ddXEAJE8uWI)>
zwjtosYcBZ*LLirr{sTD`(@UYJT>Tfcm&DLh3nf(2O1raqn-2;Rh}CaqH1nI$>f_nT
zm(Ky_zXgDGfcKut@8`0gl6~pr^Iwhtyhl>L57W&v-(#}(%y<UjMPsAzyzFO5Lg`>c
zl2MiclArI8tN8;n-y<<61uL-bsuSzF87rAb^GVUc&4V^KFt)>>ZMz|57B48?o7o*E
zHoqLKt_ELiwry`Xac+L{`|(YLBk%6c5aB)9`v~82@B@H-?C)oUReNg2v$Fq|l9F$;
zR{TSg=ZvjI!jeqv);4P1h9jFtdBBP4qv!IpWI{~x(x+KkiY$(qK(+c%tsNgFg9)d;
ztPRV-pvFeEKM=ovQN8A52*u~XgvD!xb6RX;ZxPySe`vm%a}f$_yI}cAnc+7TdjZ#q
z=F@Yf>{WB;@!UKfS^Z~ru9Ts=7!=iL)ydP=y=(udVIS#k&i?h|Hzr?_G=BOhXOf`k
z1_x_V?&h(C^9U1S_2;ZFDMOwNn)0KMgA3MAme=+8)cTP!<j0_>Ms6+K{c3UF)S_<t
zraNQHO>vqve(L%i`)Bw>`D7zH#Z$@<PlKWwx%GSBS-01%BaV&v9fxM$dIb}l#6z}q
zB?vADfsLp4Zl%Nd!TGefcx7!Zz_J@h-|OFIu8HeiGP0TnJU&3!y9VB`7=MjwW_f~B
z$3sB>4(7f3zj^mMc=uk<yIJp7@%B1+*Y^d#L@Ux)gP`pTHl%Lq|KP3j&Y-A9PChDq
z_}~rvW&oXGHJ|l&!DsGm_{?HHEFsk2OE|Asg@%=~SO4~gQu+F_*dnyKk1kk#THg?~
zFlrz;98W6TK3}PfP6OTCnn)d9e|NvR_l31p{bOj(YR%AB&g^k*97A&k-!fyxLEo7#
z4zxlS^~Ezi?z!Wmp&k#-+;w$+%^1fIoo^qShm~!A+JRSdIj5H83+Qh94d*3QI)J}j
z6Qz@K?<YeYw_fF6DVDl)XDi+5F5Q_**YDDORO!%tJI)H0)_kPiyT2mqz9KJ!m5xIY
z%{{S9!cefH@F|Pq0+tKD$ILj%LKXwfl3c!zMlpks3O^@;r6p8e1M|HIA=~DZeOK=0
z3<QgS#u>fsZwdCpgr#&BN}jNhe0(Ai_bH)c=Epo`z6uNBl*HP!)D@6in%9(ugi@7A
z!pd<Lf^;(38RTP<hLU>M6AV<Ea=(RaN6%Nhmyw|^f*@%mpUkzmfNd_y35m5iod{J9
ozsMO2Q4mw5T=0a*7oxiAT}OUGa@mX9ZIR(!lwmeee#$ZY2cfvR=Kufz

diff --git a/qemu/pc-bios/bamboo.dts b/qemu/pc-bios/bamboo.dts
--- a/qemu/pc-bios/bamboo.dts
+++ b/qemu/pc-bios/bamboo.dts
@@ -187,6 +187,45 @@
 
 		};
 
+		PCI0: pci@ec000000 {
+			device_type = "pci";
+			#interrupt-cells = <1>;
+			#size-cells = <2>;
+			#address-cells = <3>;
+			compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
+			primary;
+			reg = <0 eec00000 8     /* Config space access */
+			       0 eed00000 4     /* IACK */
+			       0 eed00000 4     /* Special cycle */
+			       0 ef400000 40>;  /* Internal registers */
+  
+			/* Outbound ranges, one memory and one IO,
+			 * later cannot be changed. Chip supports a second
+			 * IO range but we don't use it for now
+			 */
+			ranges = <02000000 0 a0000000 0 a0000000 0 20000000
+				  01000000 0 00000000 0 e8000000 0 00010000>;
+  
+			/* Inbound 2GB range starting at 0 */
+			dma-ranges = <42000000 0 0 0 0 0 80000000>;
+  
+			/* Bamboo has all 4 IRQ pins tied together per slot */
+			interrupt-map-mask = <f800 0 0 0>;
+			interrupt-map = <
+				/* IDSEL 1 */
+				0800 0 0 0 &UIC0 1c 8
+  
+				/* IDSEL 2 */
+				1000 0 0 0 &UIC0 1b 8
+  
+				/* IDSEL 3 */
+				1800 0 0 0 &UIC0 1a 8
+  
+				/* IDSEL 4 */
+				2000 0 0 0 &UIC0 19 8
+			>;
+		};
+
 	};
 
 	chosen {