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[kvm-ia64-devel] [PATCH][06]Add kvm arch-specific core code for kvm/ia64.
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From: Zhang, X. <xia...@in...> - 2008-01-31 10:29:11
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From: Xiantao Zhang <xia...@in...>
Date: Thu, 31 Jan 2008 15:40:12 +0800
Subject: [PATCH] kvm/ia64: Add kvm arch-specific core code for kvm/ia64.
kvm_ia64.c is added to handle ia64-specific core logic.
Signed-off-by: Xiantao Zhang <xia...@in...>
---
arch/ia64/kvm/kvm_ia64.c | 1596
++++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 1596 insertions(+), 0 deletions(-)
create mode 100644 arch/ia64/kvm/kvm_ia64.c
diff --git a/arch/ia64/kvm/kvm_ia64.c b/arch/ia64/kvm/kvm_ia64.c
new file mode 100644
index 0000000..f1a0a93
--- /dev/null
+++ b/arch/ia64/kvm/kvm_ia64.c
@@ -0,0 +1,1596 @@
+/*
+ * kvm_ia64.c: Basic KVM suppport On Itanium series processors
+ *
+ *
+ * Copyright (C) 2007, Intel Corporation.
+ * Xiantao Zhang (xia...@in...)
+ *
+ * This program is free software; you can redistribute it and/or modify
it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but
WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
59 Temple
+ * Place - Suite 330, Boston, MA 02111-1307 USA.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+#include <linux/errno.h>
+#include <linux/percpu.h>
+#include <linux/gfp.h>
+#include <linux/fs.h>
+#include <linux/smp.h>
+#include <linux/kvm_host.h>
+#include <linux/kvm.h>
+#include <linux/bitops.h>
+#include <linux/hrtimer.h>
+
+#include <asm/pgtable.h>
+#include <asm/gcc_intrin.h>
+#include <asm/pal.h>
+#include <asm/uaccess.h>
+#include <asm/cacheflush.h>
+#include <asm/div64.h>
+#include <asm/tlb.h>
+
+#include "ia64_regs.h"
+#include "misc.h"
+#include "vti.h"
+#include "iodev.h"
+#include "ioapic.h"
+#include "lapic.h"
+
+static unsigned long kvm_vmm_base;
+static unsigned long kvm_vsa_base;
+static unsigned long kvm_vm_buffer;
+static unsigned long kvm_vm_buffer_size;
+unsigned long kvm_vmm_gp;
+
+static long vp_env_info;
+
+static struct kvm_vmm_info *kvm_vmm_info;
+
+static DEFINE_PER_CPU(struct kvm_vcpu *, last_vcpu);
+
+struct kvm_stats_debugfs_item debugfs_entries[] =3D {
+ { NULL }
+};
+
+
+struct fdesc{
+ unsigned long ip;
+ unsigned long gp;
+};
+
+static void kvm_flush_icache(unsigned long start, unsigned long len)
+{
+ int l;
+
+ for (l =3D 0; l < (len + 32); l +=3D 32)
+ ia64_fc(start + l);
+
+ ia64_sync_i();
+ ia64_srlz_i();
+}
+
+static void kvm_flush_tlb_all(void)
+{
+ unsigned long i, j, count0, count1, stride0, stride1, addr;
+ long flags;
+
+ addr =3D local_cpu_data->ptce_base;
+ count0 =3D local_cpu_data->ptce_count[0];
+ count1 =3D local_cpu_data->ptce_count[1];
+ stride0 =3D local_cpu_data->ptce_stride[0];
+ stride1 =3D local_cpu_data->ptce_stride[1];
+
+ local_irq_save(flags);
+ for (i =3D 0; i < count0; ++i) {
+ for (j =3D 0; j < count1; ++j) {
+ ia64_ptce(addr);
+ addr +=3D stride1;
+ }
+ addr +=3D stride0;
+ }
+ local_irq_restore(flags);
+ ia64_srlz_i(); /* srlz.i implies srlz.d */
+}
+
+long ia64_pal_vp_create(u64 *vpd, u64 *host_iva, u64 *opt_handler)
+{
+ struct ia64_pal_retval iprv;
+
+ PAL_CALL_STK(iprv, PAL_VP_CREATE, (u64)vpd, (u64)host_iva,
+ (u64)opt_handler);
+
+ return iprv.status;
+}
+
+static DEFINE_SPINLOCK(vp_lock);
+
+void kvm_arch_hardware_enable(void *garbage)
+{
+ long status;
+ long tmp_base;
+ unsigned long pte;
+ unsigned long saved_psr;
+
+ pte =3D pte_val(mk_pte_phys(__pa(kvm_vmm_base),
+ PAGE_KERNEL));
+ local_irq_save(saved_psr);
+ ia64_itr_entry(0x3, KVM_VMM_BASE,
+ pte, KVM_VMM_SHIFT);
+ local_irq_restore(saved_psr);
+
+ spin_lock(&vp_lock);
+ status =3D ia64_pal_vp_init_env(kvm_vsa_base ?
+ VP_INIT_ENV : VP_INIT_ENV_INITALIZE,
+ __pa(kvm_vm_buffer), KVM_VM_BUFFER_BASE,
&tmp_base);
+ if (status !=3D 0) {
+ printk(KERN_WARNING"kvm:Failed to Enable VT
Support!!!!\n");
+ return ;
+ }
+
+ if (!kvm_vsa_base) {
+ kvm_vsa_base =3D tmp_base;
+ printk(KERN_INFO"kvm:kvm_vsa_base:0x%lx\n",
kvm_vsa_base);
+ }
+ spin_unlock(&vp_lock);
+ ia64_ptr_entry(0x3, KVM_VMM_BASE, KVM_VMM_SHIFT);
+}
+
+void kvm_arch_hardware_disable(void *garbage)
+{
+
+ long status;
+ unsigned long pte;
+ unsigned long saved_psr;
+ unsigned long host_iva =3D ia64_getreg(_IA64_REG_CR_IVA);
+
+ pte =3D pte_val(mk_pte_phys(__pa(kvm_vmm_base),
+ PAGE_KERNEL));
+
+ local_irq_save(saved_psr);
+ ia64_itr_entry(0x3, KVM_VMM_BASE,
+ pte, KVM_VMM_SHIFT);
+ local_irq_restore(saved_psr);
+
+ status =3D ia64_pal_vp_exit_env(host_iva);
+ if (status)
+ printk(KERN_DEBUG"kvm: Failed to disable VT support!
:%ld\n",
+ status);
+ ia64_ptr_entry(0x3, KVM_VMM_BASE, KVM_VMM_SHIFT);
+}
+
+void kvm_arch_check_processor_compat(void *rtn)
+{
+ *(int *)rtn =3D 0;
+}
+
+int kvm_dev_ioctl_check_extension(long ext)
+{
+
+ int r;
+
+ switch (ext) {
+ case KVM_CAP_IRQCHIP:
+ case KVM_CAP_USER_MEMORY:
+
+ r =3D 1;
+ break;
+ default:
+ r =3D 0;
+ }
+ return r;
+
+}
+
+static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
+ gpa_t addr)
+{
+ struct kvm_io_device *dev;
+
+ dev =3D kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
+
+ return dev;
+}
+
+static int handle_vm_error(struct kvm_vcpu *vcpu, struct kvm_run
*kvm_run)
+{
+ kvm_run->exit_reason =3D KVM_EXIT_UNKNOWN;
+ kvm_run->hw.hardware_exit_reason =3D 1;
+ return 0;
+}
+
+static int handle_mmio(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
+{
+ ioreq_t *p;
+ struct kvm_io_device *mmio_dev;
+
+ p =3D kvm_get_vcpu_ioreq(vcpu);
+
+ if ((p->addr & PAGE_MASK) =3D=3D IOAPIC_DEFAULT_BASE_ADDRESS)
+ goto mmio;
+ vcpu->mmio_needed =3D 1;
+ vcpu->mmio_phys_addr =3D kvm_run->mmio.phys_addr =3D p->addr;
+ vcpu->mmio_size =3D kvm_run->mmio.len =3D p->size;
+ vcpu->mmio_is_write =3D kvm_run->mmio.is_write =3D !p->dir;
+
+ if (vcpu->mmio_is_write)
+ memcpy(vcpu->mmio_data, &p->data, p->size);
+ memcpy(kvm_run->mmio.data, &p->data, p->size);
+ kvm_run->exit_reason =3D KVM_EXIT_MMIO;
+ return 0;
+mmio:
+ mmio_dev =3D vcpu_find_mmio_dev(vcpu, p->addr);
+ if (mmio_dev) {
+ if (!p->dir)
+ kvm_iodevice_write(mmio_dev, p->addr, p->size,
+ &p->data);
+ else
+ kvm_iodevice_read(mmio_dev, p->addr, p->size,
+ &p->data);
+
+ } else
+ printk(KERN_ERR"kvm: No iodevice found !\n");
+ p->state =3D STATE_IORESP_READY;
+
+ return 1;
+}
+
+static int handle_pal_call(struct kvm_vcpu *vcpu, struct kvm_run
*kvm_run)
+{
+ struct exit_ctl_data *p;
+
+ p =3D kvm_get_exit_data(vcpu);
+
+ if (p->exit_reason =3D=3D EXIT_REASON_PAL_CALL)
+ return kvm_pal_emul(vcpu, kvm_run);
+ else {
+ kvm_run->exit_reason =3D KVM_EXIT_UNKNOWN;
+ kvm_run->hw.hardware_exit_reason =3D 2;
+ return 0;
+ }
+}
+
+static int handle_sal_call(struct kvm_vcpu *vcpu, struct kvm_run
*kvm_run)
+{
+ struct exit_ctl_data *p;
+
+ p =3D kvm_get_exit_data(vcpu);
+
+ if (p->exit_reason =3D=3D EXIT_REASON_SAL_CALL) {
+ kvm_sal_emul(vcpu);
+ return 1;
+ } else {
+ kvm_run->exit_reason =3D KVM_EXIT_UNKNOWN;
+ kvm_run->hw.hardware_exit_reason =3D 3;
+ return 0;
+ }
+
+}
+
+/*
+ * offset: address offset to IPI space.
+ * value: deliver value.
+ */
+static void vcpu_deliver_ipi(struct kvm_vcpu *vcpu, uint64_t dm,
+ uint64_t vector)
+{
+ switch (dm) {
+ case SAPIC_FIXED:
+ kvm_apic_set_irq(vcpu, vector, 0);
+ break;
+ case SAPIC_NMI:
+ kvm_apic_set_irq(vcpu, 2, 0);
+ break;
+ case SAPIC_EXTINT:
+ kvm_apic_set_irq(vcpu, 0, 0);
+ break;
+ case SAPIC_INIT:
+ case SAPIC_PMI:
+ default:
+ printk(KERN_ERR"kvm:Unimplemented Deliver reserved
IPI!\n");
+ break;
+ }
+}
+
+static struct kvm_vcpu *lid_to_vcpu(struct kvm *kvm, unsigned long id,
+ unsigned long eid)
+{
+ ia64_lid_t lid;
+ int i;
+
+ for (i =3D 0; i < KVM_MAX_VCPUS; i++) {
+ if (kvm->vcpus[i]) {
+ lid.val =3D VCPU_LID(kvm->vcpus[i]);
+ if (lid.id =3D=3D id && lid.eid =3D=3D eid)
+ return kvm->vcpus[i];
+ }
+ }
+
+ return NULL;
+}
+
+static int handle_ipi(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
+{
+ struct exit_ctl_data *p =3D kvm_get_exit_data(vcpu);
+ struct kvm_vcpu *target_vcpu;
+ struct kvm_pt_regs *regs;
+ ia64_ipi_a addr =3D p->u.ipi_data.addr;
+ ia64_ipi_d data =3D p->u.ipi_data.data;
+
+ target_vcpu =3D lid_to_vcpu(vcpu->kvm, addr.id, addr.eid);
+ if (!target_vcpu)
+ return handle_vm_error(vcpu, kvm_run);
+
+ if (!target_vcpu->arch.launched) {
+ regs =3D vcpu_regs(target_vcpu);
+
+ regs->cr_iip =3D vcpu->kvm->arch.rdv_sal_data.boot_ip;
+ regs->r1 =3D vcpu->kvm->arch.rdv_sal_data.boot_gp;
+
+ target_vcpu->arch.mp_state =3D VCPU_MP_STATE_RUNNABLE;
+ if (waitqueue_active(&target_vcpu->wq))
+ wake_up_interruptible(&target_vcpu->wq);
+ } else {
+ vcpu_deliver_ipi(target_vcpu, data.dm, data.vector);
+ if (target_vcpu !=3D vcpu)
+ kvm_vcpu_kick(target_vcpu);
+ }
+
+ return 1;
+}
+
+struct call_data {
+ struct kvm_ptc_g ptc_g_data;
+ struct kvm_vcpu *vcpu;
+};
+
+static void vcpu_global_purge(void *info)
+{
+ struct call_data *p =3D (struct call_data *)info;
+ struct kvm_vcpu *vcpu =3D p->vcpu;
+
+ if (test_bit(KVM_REQ_FLUSH_ALL, &vcpu->requests))
+ return;
+
+ set_bit(KVM_REQ_PTC_G, &vcpu->requests);
+ if (vcpu->arch.ptc_g_count < MAX_PTC_G_NUM) {
+ vcpu->arch.ptc_g_data[vcpu->arch.ptc_g_count++] =3D
+ p->ptc_g_data;
+ } else {
+ clear_bit(KVM_REQ_PTC_G, &vcpu->requests);
+ vcpu->arch.ptc_g_count =3D 0;
+ set_bit(KVM_REQ_FLUSH_ALL, &vcpu->requests);
+ }
+}
+
+static int handle_global_purge(struct kvm_vcpu *vcpu, struct kvm_run
*kvm_run)
+{
+ struct exit_ctl_data *p =3D kvm_get_exit_data(vcpu);
+ struct kvm *kvm =3D vcpu->kvm;
+ struct call_data call_data;
+ int i;
+ call_data.ptc_g_data =3D p->u.ptc_g_data;
+
+ for (i =3D 0; i < KVM_MAX_VCPUS; i++) {
+ if (!kvm->vcpus[i] || kvm->vcpus[i]->arch.mp_state =3D=3D
+
VCPU_MP_STATE_UNINITIALIZED ||
+ vcpu =3D=3D kvm->vcpus[i])
+ continue;
+
+ if (waitqueue_active(&kvm->vcpus[i]->wq)) {
+ wake_up_interruptible(&kvm->vcpus[i]->wq);
+ }
+
+ if (kvm->vcpus[i]->cpu !=3D -1) {
+ call_data.vcpu =3D kvm->vcpus[i];
+ smp_call_function_single(kvm->vcpus[i]->cpu,
+ vcpu_global_purge, &call_data,
0, 1);
+ } else
+ printk(KERN_WARNING"kvm: Uninit vcpu received
ipi!\n");
+
+ }
+ return 1;
+}
+
+static int handle_switch_rr6(struct kvm_vcpu *vcpu, struct kvm_run
*kvm_run)
+{
+ return 1;
+}
+
+int kvm_emulate_halt(struct kvm_vcpu *vcpu)
+{
+
+ ktime_t kt;
+ long itc_diff;
+ unsigned long vcpu_now_itc;
+
+ unsigned long expires;
+ struct hrtimer *p_ht =3D &vcpu->arch.hlt_timer;
+ unsigned long cyc_per_usec =3D local_cpu_data->cyc_per_usec;
+ struct vpd *vpd =3D to_host(vcpu->kvm, vcpu->arch.vpd);
+
+ vcpu_now_itc =3D ia64_get_itc() + vcpu->arch.itc_offset;
+
+ if (time_after(vcpu_now_itc, vpd->itm)) {
+ vcpu->arch.timer_check =3D 1;
+ return 1;
+ }
+ itc_diff =3D vpd->itm - vcpu_now_itc;
+ if (itc_diff < 0)
+ itc_diff =3D -itc_diff;
+
+ expires =3D div64_64(itc_diff, cyc_per_usec);
+ kt =3D ktime_set(0, 1000 * expires);
+ vcpu->arch.ht_active =3D 1;
+ hrtimer_start(p_ht, kt, HRTIMER_MODE_ABS);
+
+ if (irqchip_in_kernel(vcpu->kvm)) {
+ vcpu->arch.mp_state =3D VCPU_MP_STATE_HALTED;
+ kvm_vcpu_block(vcpu);
+ hrtimer_cancel(p_ht);
+ vcpu->arch.ht_active =3D 0;
+
+ if (vcpu->arch.mp_state !=3D VCPU_MP_STATE_RUNNABLE)
+ return -EINTR;
+ return 1;
+ } else {
+ printk(KERN_ERR"kvm: Unsupported userspace halt!");
+ return 0;
+ }
+}
+
+static int handle_vm_shutdown(struct kvm_vcpu *vcpu,
+ struct kvm_run *kvm_run)
+{
+ kvm_run->exit_reason =3D KVM_EXIT_SHUTDOWN;
+ return 0;
+}
+
+static int handle_external_interrupt(struct kvm_vcpu *vcpu,
+ struct kvm_run *kvm_run)
+{
+ return 1;
+}
+
+static int (*kvm_vti_exit_handlers[])(struct kvm_vcpu *vcpu,
+ struct kvm_run *kvm_run) =3D {
+ [EXIT_REASON_VM_PANIC] =3D handle_vm_error,
+ [EXIT_REASON_MMIO_INSTRUCTION] =3D handle_mmio,
+ [EXIT_REASON_PAL_CALL] =3D handle_pal_call,
+ [EXIT_REASON_SAL_CALL] =3D handle_sal_call,
+ [EXIT_REASON_SWITCH_RR6] =3D handle_switch_rr6,
+ [EXIT_REASON_VM_DESTROY] =3D handle_vm_shutdown,
+ [EXIT_REASON_EXTERNAL_INTERRUPT] =3D handle_external_interrupt,
+ [EXIT_REASON_IPI] =3D handle_ipi,
+ [EXIT_REASON_PTC_G] =3D handle_global_purge,
+
+};
+
+static const int kvm_vti_max_exit_handlers =3D
+
sizeof(kvm_vti_exit_handlers)/sizeof(*kvm_vti_exit_handlers);
+
+static void kvm_prepare_guest_switch(struct kvm_vcpu *vcpu)
+{
+}
+
+static uint32_t kvm_get_exit_reason(struct kvm_vcpu *vcpu)
+{
+ struct exit_ctl_data *p_exit_data;
+
+ p_exit_data =3D kvm_get_exit_data(vcpu);
+ return p_exit_data->exit_reason;
+}
+
+/*
+ * The guest has exited. See if we can fix it or if we need userspace
+ * assistance.
+ */
+static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu
*vcpu)
+{
+ u32 exit_reason =3D kvm_get_exit_reason(vcpu);
+ vcpu->arch.last_exit =3D exit_reason;
+
+ if (exit_reason < kvm_vti_max_exit_handlers
+ && kvm_vti_exit_handlers[exit_reason])
+ return kvm_vti_exit_handlers[exit_reason](vcpu,
kvm_run);
+ else {
+ kvm_run->exit_reason =3D KVM_EXIT_UNKNOWN;
+ kvm_run->hw.hardware_exit_reason =3D exit_reason;
+ }
+ return 0;
+}
+
+static inline void vti_set_rr6(unsigned long rr6)
+{
+ ia64_set_rr(RR6, rr6);
+ ia64_srlz_i();
+}
+
+/*Ensure no TR entries in slot 6 and slot 7 before getting called.*/
+static void kvm_insert_vmm_mapping(struct kvm_vcpu *vcpu)
+{
+ unsigned long pte;
+ struct kvm *kvm =3D vcpu->kvm;
+
+ /*Insert a pair of tr to map vmm*/
+ pte =3D pte_val(mk_pte_phys(__pa(kvm_vmm_base), PAGE_KERNEL));
+ ia64_itr_entry(0x3, KVM_VMM_BASE, pte, KVM_VMM_SHIFT);
+
+ /*Insert a pairt of tr to map data of vm*/
+ pte =3D pte_val(mk_pte_phys(__pa(kvm->arch.vm_base),
PAGE_KERNEL));
+ ia64_itr_entry(0x3, KVM_VM_DATA_BASE,
+ pte, KVM_VM_DATA_SHIFT);
+
+}
+
+static void kvm_purge_vmm_mapping(void)
+{
+
+ unsigned long ps;
+
+ /*Purge itr and dtr in slot 6.*/
+ ps =3D KVM_VMM_SHIFT;
+ ia64_ptr_entry(0x3, KVM_VMM_BASE, ps);
+
+ /*Purge itr and dtr in slot 7.*/
+ ps =3D KVM_VM_DATA_SHIFT;
+ ia64_ptr_entry(0x3, KVM_VM_DATA_BASE, ps);
+
+}
+
+static void kvm_vcpu_pre_transition(struct kvm_vcpu *vcpu)
+{
+ int cpu =3D smp_processor_id();
+
+ if (vcpu->arch.last_run_cpu !=3D cpu ||
+ per_cpu(last_vcpu, cpu) !=3D vcpu) {
+ per_cpu(last_vcpu, cpu) =3D vcpu;
+ vcpu->arch.last_run_cpu =3D cpu;
+ kvm_flush_tlb_all();
+ }
+
+ vcpu->arch.host_rr6 =3D ia64_get_rr(RR6);
+ vti_set_rr6(vcpu->arch.vmm_rr);
+ kvm_insert_vmm_mapping(vcpu);
+}
+static void kvm_vcpu_post_transition(struct kvm_vcpu *vcpu)
+{
+ kvm_purge_vmm_mapping();
+ vti_set_rr6(vcpu->arch.host_rr6);
+}
+
+void vti_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
+{
+ context_t *host_ctx, *guest_ctx;
+
+ /*Get host and guest context with guest address space.*/
+ host_ctx =3D kvm_get_host_context(vcpu);
+ guest_ctx =3D kvm_get_guest_context(vcpu);
+
+ kvm_vcpu_pre_transition(vcpu);
+ kvm_vmm_info->tramp_entry(host_ctx, guest_ctx);
+ kvm_vcpu_post_transition(vcpu);
+}
+
+static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
+{
+ int r;
+
+again:
+ preempt_disable();
+
+ kvm_prepare_guest_switch(vcpu);
+ local_irq_disable();
+
+ if (signal_pending(current)) {
+ local_irq_enable();
+ preempt_enable();
+ r =3D -EINTR;
+ kvm_run->exit_reason =3D KVM_EXIT_INTR;
+ goto out;
+ }
+
+ vcpu->guest_mode =3D 1;
+ kvm_guest_enter();
+
+ vti_vcpu_run(vcpu, kvm_run);
+
+ vcpu->arch.launched =3D 1;
+ vcpu->guest_mode =3D 0;
+ local_irq_enable();
+
+ /*
+ * We must have an instruction between local_irq_enable() and
+ * kvm_guest_exit(), so the timer interrupt isn't delayed by
+ * the interrupt shadow. The stat.exits increment will do
nicely.
+ * But we need to prevent reordering, hence this barrier():
+ */
+ barrier();
+
+ kvm_guest_exit();
+
+ preempt_enable();
+
+ r =3D kvm_handle_exit(kvm_run, vcpu);
+
+ if (r > 0) {
+ if (!need_resched())
+ goto again;
+ }
+
+out:
+ if (r > 0) {
+ kvm_resched(vcpu);
+ goto again;
+ }
+
+ return r;
+}
+
+static void kvm_set_mmio_data(struct kvm_vcpu *vcpu)
+{
+ ioreq_t *p =3D kvm_get_vcpu_ioreq(vcpu);
+ if (!vcpu->mmio_is_write)
+ memcpy(&p->data, vcpu->mmio_data, 8);
+ p->state =3D STATE_IORESP_READY;
+}
+
+int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run
*kvm_run)
+{
+ int r;
+ sigset_t sigsaved;
+
+ vcpu_load(vcpu);
+
+ if (unlikely(vcpu->arch.mp_state =3D=3D
VCPU_MP_STATE_UNINITIALIZED)) {
+ kvm_vcpu_block(vcpu);
+ vcpu_put(vcpu);
+ return -EAGAIN;
+ }
+
+ if (vcpu->sigset_active)
+ sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
+
+ if (vcpu->mmio_needed) {
+ memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
+ kvm_set_mmio_data(vcpu);
+ vcpu->mmio_read_completed =3D 1;
+ vcpu->mmio_needed =3D 0;
+ }
+ r =3D __vcpu_run(vcpu, kvm_run);
+
+ if (vcpu->sigset_active)
+ sigprocmask(SIG_SETMASK, &sigsaved, NULL);
+
+ vcpu_put(vcpu);
+ return r;
+}
+
+/*
+ * Allocate 16M memory for every vm to hold its specific data.
+ * Its memory map is defined in kvm_host.h.
+ */
+static struct kvm *kvm_alloc_kvm(void)
+{
+
+ struct kvm *kvm;
+ uint64_t vm_base;
+
+ vm_base =3D __get_free_pages(GFP_KERNEL,
get_order(KVM_VM_DATA_SIZE));
+
+ if (!vm_base)
+ return ERR_PTR(-ENOMEM);
+ printk(KERN_DEBUG"kvm:vm data base address:0x%lx\n", vm_base);
+
+ /* Zero all pages before use! */
+ memset((void *)vm_base, 0, KVM_VM_DATA_SIZE);
+
+ kvm =3D (struct kvm *)(vm_base + KVM_VM_OFS);
+ kvm->arch.vm_base =3D vm_base;
+
+ return kvm;
+}
+
+typedef struct kvm_io_range {
+ unsigned long start;
+ unsigned long size;
+ unsigned long type;
+} kvm_io_range_t;
+
+static const kvm_io_range_t io_ranges[] =3D {
+ {VGA_IO_START, VGA_IO_SIZE, GPFN_FRAME_BUFFER},
+ {MMIO_START, MMIO_SIZE, GPFN_LOW_MMIO},
+ {LEGACY_IO_START, LEGACY_IO_SIZE, GPFN_LEGACY_IO},
+ {IO_SAPIC_START, IO_SAPIC_SIZE, GPFN_IOSAPIC},
+ {PIB_START, PIB_SIZE, GPFN_PIB},
+};
+
+static void kvm_build_io_pmt(struct kvm *kvm)
+{
+ unsigned long i, j;
+
+ /* Mark I/O ranges */
+ for (i =3D 0; i < (sizeof(io_ranges) / sizeof(kvm_io_range_t));
i++) {
+ for (j =3D io_ranges[i].start;
+ j < io_ranges[i].start +
io_ranges[i].size;
+ j +=3D PAGE_SIZE)
+ kvm_set_pmt_entry(kvm, j >> PAGE_SHIFT,
+ io_ranges[i].type, 0);
+ }
+
+}
+
+/*Use unused rids to virtualize guest rid.*/
+#define GUEST_PHYSICAL_RR0 0x1739
+#define GUEST_PHYSICAL_RR4 0x2739
+#define VMM_INIT_RR 0x1660
+
+static void kvm_init_vm(struct kvm *kvm)
+{
+ long vm_base;
+
+ BUG_ON(!kvm);
+
+ kvm->arch.metaphysical_rr0 =3D GUEST_PHYSICAL_RR0;
+ kvm->arch.metaphysical_rr4 =3D GUEST_PHYSICAL_RR4;
+ kvm->arch.vmm_init_rr =3D VMM_INIT_RR;
+
+ vm_base =3D kvm->arch.vm_base;
+ if (vm_base) {
+ kvm->arch.vhpt_base =3D vm_base + KVM_VHPT_OFS;
+ kvm->arch.vtlb_base =3D vm_base + KVM_VTLB_OFS;
+ kvm->arch.vpd_base =3D vm_base + KVM_VPD_OFS;
+ }
+
+ /*
+ *Fill P2M entries for MMIO/IO ranges
+ */
+ kvm_build_io_pmt(kvm);
+
+}
+
+struct kvm *kvm_arch_create_vm(void)
+{
+ struct kvm *kvm =3D kvm_alloc_kvm();
+
+ if (IS_ERR(kvm))
+ return ERR_PTR(-ENOMEM);
+ kvm_init_vm(kvm);
+
+ return kvm;
+
+}
+
+static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm,
+ struct kvm_irqchip *chip)
+{
+ int r;
+
+ r =3D 0;
+ switch (chip->chip_id) {
+ case KVM_IRQCHIP_IOAPIC:
+ memcpy(&chip->chip.ioapic, ioapic_irqchip(kvm),
+ sizeof(struct kvm_ioapic_state));
+ break;
+ default:
+ r =3D -EINVAL;
+ break;
+ }
+ return r;
+}
+
+static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip
*chip)
+{
+ int r;
+
+ r =3D 0;
+ switch (chip->chip_id) {
+ case KVM_IRQCHIP_IOAPIC:
+ memcpy(ioapic_irqchip(kvm),
+ &chip->chip.ioapic,
+ sizeof(struct kvm_ioapic_state));
+ break;
+ default:
+ r =3D -EINVAL;
+ break;
+ }
+ return r;
+}
+
+int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs
*regs)
+{
+ printk(KERN_WARNING"Doesn't support it yet!!\n");
+ return 0;
+}
+
+long kvm_arch_vm_ioctl(struct file *filp,
+ unsigned int ioctl, unsigned long arg)
+{
+ struct kvm *kvm =3D filp->private_data;
+ void __user *argp =3D (void __user *)arg;
+ int r =3D -EINVAL;
+
+ switch (ioctl) {
+ case KVM_SET_MEMORY_REGION: {
+ struct kvm_memory_region kvm_mem;
+ struct kvm_userspace_memory_region kvm_userspace_mem;
+
+ r =3D -EFAULT;
+ if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
+ goto out;
+ kvm_userspace_mem.slot =3D kvm_mem.slot;
+ kvm_userspace_mem.flags =3D kvm_mem.flags;
+ kvm_userspace_mem.guest_phys_addr =3D
+ kvm_mem.guest_phys_addr;
+ kvm_userspace_mem.memory_size =3D kvm_mem.memory_size;
+ r =3D kvm_vm_ioctl_set_memory_region(kvm,
+ &kvm_userspace_mem, 0);
+ if (r)
+ goto out;
+ break;
+ }
+ case KVM_CREATE_IRQCHIP:
+ r =3D -EFAULT;
+ r =3D kvm_ioapic_init(kvm);
+ if (r)
+ goto out;
+ break;
+ case KVM_IRQ_LINE: {
+ struct kvm_irq_level irq_event;
+
+ r =3D -EFAULT;
+ if (copy_from_user(&irq_event, argp, sizeof irq_event))
+ goto out;
+ if (irqchip_in_kernel(kvm)) {
+ mutex_lock(&kvm->lock);
+ kvm_ioapic_set_irq(kvm->arch.vioapic,
+ irq_event.irq,
+ irq_event.level);
+ mutex_unlock(&kvm->lock);
+ r =3D 0;
+ }
+ break;
+ }
+ case KVM_GET_IRQCHIP: {
+ /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
+ struct kvm_irqchip chip;
+
+ r =3D -EFAULT;
+ if (copy_from_user(&chip, argp, sizeof chip))
+ goto out;
+ r =3D -ENXIO;
+ if (!irqchip_in_kernel(kvm))
+ goto out;
+ r =3D kvm_vm_ioctl_get_irqchip(kvm, &chip);
+ if (r)
+ goto out;
+ r =3D -EFAULT;
+ if (copy_to_user(argp, &chip, sizeof chip))
+ goto out;
+ r =3D 0;
+ break;
+ }
+ case KVM_SET_IRQCHIP: {
+ /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
+ struct kvm_irqchip chip;
+
+ r =3D -EFAULT;
+ if (copy_from_user(&chip, argp, sizeof chip))
+ goto out;
+ r =3D -ENXIO;
+ if (!irqchip_in_kernel(kvm))
+ goto out;
+ r =3D kvm_vm_ioctl_set_irqchip(kvm, &chip);
+ if (r)
+ goto out;
+ r =3D 0;
+ break;
+ }
+ default:
+ ;
+ }
+out:
+ return r;
+}
+
+int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
+ struct kvm_sregs *sregs)
+{
+ printk(KERN_WARNING"kvm:kvm_arch_vcpu_ioctl_set_sregs
called!!\n");
+ return 0;
+}
+
+int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
+ struct kvm_sregs *sregs)
+{
+ printk(KERN_WARNING"kvm:kvm_arch_vcpu_ioctl_get_sregs
called!!\n");
+ return 0;
+
+}
+int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
+ struct kvm_translation *tr)
+{
+ printk(KERN_WARNING"kvm:kvm_arch_vcpu_ioctl_translate
called!!\n");
+
+ return 0;
+}
+
+static int kvm_alloc_vmm_area(void)
+{
+ if (!kvm_vmm_base && (kvm_vm_buffer_size < KVM_VM_BUFFER_SIZE))
{
+ kvm_vmm_base =3D __get_free_pages(GFP_KERNEL,
+ get_order(KVM_VMM_SIZE));
+ if (!kvm_vmm_base)
+ return -ENOMEM;
+
+ memset((void *)kvm_vmm_base, 0, KVM_VMM_SIZE);
+ kvm_vm_buffer =3D kvm_vmm_base + VMM_SIZE;
+
+ printk(KERN_DEBUG"kvm:kvm_vmm_base:0x%lx,
vm_buffer:0x%lx\n",
+ kvm_vmm_base, kvm_vm_buffer);
+ }
+
+ return 0;
+}
+
+static void kvm_free_vmm_area(void)
+{
+ if (kvm_vmm_base) {
+ /*Zero this area before free to avoid bits leak!!*/
+ memset((void *)kvm_vmm_base, 0, KVM_VMM_SIZE);
+ free_pages(kvm_vmm_base, get_order(KVM_VMM_SIZE));
+ kvm_vmm_base =3D 0;
+ kvm_vm_buffer =3D 0;
+ kvm_vsa_base =3D 0;
+ }
+}
+
+/*
+ * Make sure that a cpu that is being hot-unplugged does not have any
vcpus
+ * cached on it. Leave it as blank for IA64.
+ */
+void decache_vcpus_on_cpu(int cpu)
+{
+}
+
+static void vti_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
+{
+}
+
+static int vti_init_vpd(struct kvm_vcpu *vcpu)
+{
+ int i;
+ cpuid3_t cpuid3;
+ struct vpd *vpd =3D to_host(vcpu->kvm, vcpu->arch.vpd);
+
+ if (IS_ERR(vpd))
+ return PTR_ERR(vpd);
+
+ /* CPUID init */
+ for (i =3D 0; i < 5; i++)
+ vpd->vcpuid[i] =3D ia64_get_cpuid(i);
+
+ /* Limit the CPUID number to 5 */
+ cpuid3.value =3D vpd->vcpuid[3];
+ cpuid3.number =3D 4; /* 5 - 1 */
+ vpd->vcpuid[3] =3D cpuid3.value;
+
+ /*Set vac and vdc fields*/
+ vpd->vac.a_from_int_cr =3D 1;
+ vpd->vac.a_to_int_cr =3D 1;
+ vpd->vac.a_from_psr =3D 1;
+ vpd->vac.a_from_cpuid =3D 1;
+ vpd->vac.a_cover =3D 1;
+ vpd->vac.a_bsw =3D 1;
+ vpd->vac.a_int =3D 1;
+ vpd->vdc.d_vmsw =3D 1;
+
+ /*Set virtual buffer*/
+ vpd->virt_env_vaddr =3D KVM_VM_BUFFER_BASE;
+
+ return 0;
+}
+
+static int vti_create_vp(struct kvm_vcpu *vcpu)
+{
+ long ret;
+ vpd_t *vpd =3D vcpu->arch.vpd;
+ unsigned long vmm_ivt;
+
+ vmm_ivt =3D kvm_vmm_info->vmm_ivt;
+
+ printk(KERN_DEBUG "kvm: vcpu:%p,ivt: 0x%lx\n", vcpu, vmm_ivt);
+
+ ret =3D ia64_pal_vp_create((u64 *)vpd, (u64 *)vmm_ivt, 0);
+
+ if (ret) {
+ printk(KERN_ERR"kvm: ia64_pal_vp_create failed!\n");
+ return -EINVAL;
+ }
+ return 0;
+}
+
+static void init_ptce_info(struct kvm_vcpu *vcpu)
+{
+ ia64_ptce_info_t ptce =3D {0};
+
+ ia64_get_ptce(&ptce);
+ vcpu->arch.ptce_base =3D ptce.base;
+ vcpu->arch.ptce_count[0] =3D ptce.count[0];
+ vcpu->arch.ptce_count[1] =3D ptce.count[1];
+ vcpu->arch.ptce_stride[0] =3D ptce.stride[0];
+ vcpu->arch.ptce_stride[1] =3D ptce.stride[1];
+}
+
+static int kvm_migrate_hlt_timer(struct kvm_vcpu *vcpu)
+{
+ struct hrtimer *p_ht =3D &vcpu->arch.hlt_timer;
+
+ if (hrtimer_cancel(p_ht))
+ hrtimer_start(p_ht, p_ht->expires, HRTIMER_MODE_ABS);
+}
+
+static enum hrtimer_restart hlt_timer_fn(struct hrtimer *data)
+{
+ struct kvm_vcpu *vcpu;
+ wait_queue_head_t *q;
+
+ vcpu =3D container_of(data, struct kvm_vcpu, arch.hlt_timer);
+ if (vcpu->arch.mp_state !=3D VCPU_MP_STATE_HALTED)
+ goto out;
+
+ q =3D &vcpu->wq;
+ if (waitqueue_active(q)) {
+ vcpu->arch.mp_state =3D VCPU_MP_STATE_RUNNABLE;
+ wake_up_interruptible(q);
+ }
+out:
+ vcpu->arch.timer_check =3D 1;
+ return HRTIMER_NORESTART;
+}
+
+#define PALE_RESET_ENTRY 0x80000000ffffffb0UL
+
+int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
+{
+ struct page *page;
+ int r;
+ struct kvm *kvm =3D vcpu->kvm;
+ struct kvm_pt_regs *regs =3D vcpu_regs(vcpu);
+
+ context_t *p_ctx =3D &vcpu->arch.guest;
+ struct kvm_vcpu *vmm_vcpu =3D to_guest(vcpu->kvm, vcpu);
+
+ /*Init vcpu context for first run.*/
+ if (IS_ERR(vmm_vcpu))
+ return PTR_ERR(vmm_vcpu);
+
+ page =3D alloc_page(GFP_KERNEL | __GFP_ZERO);
+ if (!page) {
+ r =3D -ENOMEM;
+ goto fail;
+ }
+
+ if (vcpu->vcpu_id =3D=3D 0) {
+ vcpu->arch.mp_state =3D VCPU_MP_STATE_RUNNABLE;
+ regs->cr_iip =3D PALE_RESET_ENTRY;
+ }
+
+ else
+ vcpu->arch.mp_state =3D VCPU_MP_STATE_UNINITIALIZED;
+ /*FIXME:Need to removed it later!!\n*/
+ vcpu->arch.apic =3D kzalloc(sizeof(struct kvm_lapic), GFP_KERNEL);
+ vcpu->arch.apic->vcpu =3D vcpu;
+
+ p_ctx->gr[1] =3D 0;
+ p_ctx->gr[12] =3D (unsigned long)((char *)vmm_vcpu +
IA64_STK_OFFSET);
+ p_ctx->gr[13] =3D (unsigned long)vmm_vcpu;
+ p_ctx->psr =3D 0x1008522000UL;
+ p_ctx->ar[40] =3D FPSR_DEFAULT; /*fpsr*/
+ p_ctx->caller_unat =3D 0;
+ p_ctx->pr =3D 0x0;
+ p_ctx->ar[36] =3D 0x0; /*unat*/
+ p_ctx->ar[19] =3D 0x0; /*rnat*/
+ p_ctx->ar[18] =3D (unsigned long)vmm_vcpu +
+ ((sizeof(struct kvm_vcpu)+15) & ~15);
+ p_ctx->ar[64] =3D 0x0; /*pfs*/
+ p_ctx->cr[0] =3D 0x7e04UL;
+ p_ctx->cr[2] =3D (unsigned long)kvm_vmm_info->vmm_ivt;
+ p_ctx->cr[8] =3D 0x3c;
+
+ /*Initilize region register*/
+ p_ctx->rr[0] =3D 0x30;
+ p_ctx->rr[1] =3D 0x30;
+ p_ctx->rr[2] =3D 0x30;
+ p_ctx->rr[3] =3D 0x30;
+ p_ctx->rr[4] =3D 0x30;
+ p_ctx->rr[5] =3D 0x30;
+ p_ctx->rr[7] =3D 0x30;
+
+ /*Initilize branch register 0*/
+ p_ctx->br[0] =3D *(unsigned long *)kvm_vmm_info->vmm_entry;
+
+ vcpu->arch.vmm_rr =3D kvm->arch.vmm_init_rr;
+ vcpu->arch.metaphysical_rr0 =3D kvm->arch.metaphysical_rr0;
+ vcpu->arch.metaphysical_rr4 =3D kvm->arch.metaphysical_rr4;
+
+ hrtimer_init(&vcpu->arch.hlt_timer, CLOCK_MONOTONIC,
HRTIMER_MODE_ABS);
+ vcpu->arch.hlt_timer.function =3D hlt_timer_fn;
+
+ vcpu->arch.vpd =3D (vpd_t *)VPD_ADDR(vcpu->vcpu_id);
+ vcpu->arch.vsa_base =3D kvm_vsa_base;
+ vcpu->arch.__gp =3D kvm_vmm_gp;
+ vcpu->arch.vhpt.hash =3D (thash_data_t *)VHPT_ADDR(vcpu->vcpu_id);
+ vcpu->arch.vtlb.hash =3D (thash_data_t *)VTLB_ADDR(vcpu->vcpu_id);
+ init_ptce_info(vcpu);
+
+ return 0;
+fail:
+ return r;
+}
+
+static int vti_vcpu_setup(struct kvm_vcpu *vcpu, int id)
+{
+ unsigned long psr;
+ int r;
+
+ local_irq_save(psr);
+ kvm_insert_vmm_mapping(vcpu);
+
+ r =3D kvm_vcpu_init(vcpu, vcpu->kvm, id);
+ if (r)
+ goto fail;
+
+ r =3D vti_init_vpd(vcpu);
+ if (r) {
+ printk(KERN_DEBUG"kvm: vpd init error!!\n");
+ goto uninit;
+ }
+
+ r =3D vti_create_vp(vcpu);
+ if (r)
+ goto uninit;
+
+ kvm_purge_vmm_mapping();
+ local_irq_restore(psr);
+
+ return 0;
+uninit:
+ kvm_vcpu_uninit(vcpu);
+fail:
+ return r;
+}
+
+struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
+ unsigned int id)
+{
+ struct kvm_vcpu *vcpu;
+ unsigned long vm_base =3D kvm->arch.vm_base;
+ int r;
+ int cpu;
+
+ r =3D -ENOMEM;
+ if (!vm_base) {
+ printk(KERN_ERR"kvm: Create vcpu[%d] error!\n", id);
+ goto fail;
+ }
+ vcpu =3D (struct kvm_vcpu *)(vm_base + KVM_VCPU_OFS + VCPU_SIZE *
id);
+ vcpu->kvm =3D kvm;
+
+ cpu =3D get_cpu();
+ vti_vcpu_load(vcpu, cpu);
+ r =3D vti_vcpu_setup(vcpu, id);
+ put_cpu();
+
+ if (r) {
+ printk(KERN_DEBUG"kvm: vcpu_setup error!!\n");
+ goto fail;
+ }
+
+ return vcpu;
+fail:
+ return ERR_PTR(r);
+}
+
+int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
+{
+ return 0;
+}
+
+int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu
*fpu)
+{
+ printk(KERN_WARNING"kvm:IA64 doesn't need to export"
+ "fpu to userspace!\n");
+ return 0;
+}
+
+int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu
*fpu)
+{
+ printk(KERN_WARNING"kvm:IA64 doesn't need to export"
+ "fpu to userspace !\n");
+ return 0;
+}
+
+int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
+ struct kvm_debug_guest *dbg)
+{
+ printk(KERN_INFO"Not Implemented yet!\n");
+ return 0;
+}
+
+static void free_kvm(struct kvm *kvm)
+{
+ unsigned long vm_base =3D kvm->arch.vm_base;
+
+ if (vm_base) {
+ memset((void *)vm_base, 0, KVM_VM_DATA_SIZE);
+ free_pages(vm_base, get_order(KVM_VM_DATA_SIZE));
+ }
+
+}
+
+/*FIXME:Remove it once swapping ready!*/
+static void kvm_release_vm_pages(struct kvm *kvm)
+{
+ struct kvm_memory_slot *memslot;
+ int i, j;
+ unsigned long base_gfn;
+
+ for (i =3D 0; i < kvm->nmemslots; i++) {
+ memslot =3D &kvm->memslots[i];
+ base_gfn =3D memslot->base_gfn;
+
+ for (j =3D 0; j < memslot->npages; j++) {
+ if (memslot->rmap[j])
+ put_page((struct page
*)memslot->rmap[j]);
+ }
+ }
+}
+
+void kvm_arch_destroy_vm(struct kvm *kvm)
+{
+ kfree(kvm->arch.vioapic);
+ kvm_release_vm_pages(kvm);
+ kvm_free_physmem(kvm);
+ free_kvm(kvm);
+}
+
+void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
+{
+ /*FIXME: To Implement!!*/
+}
+
+void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
+{
+ if (cpu !=3D vcpu->cpu) {
+ vcpu->cpu =3D cpu;
+ if (vcpu->arch.ht_active)
+ kvm_migrate_hlt_timer(vcpu);
+ }
+}
+
+int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs
*regs)
+{
+ printk(KERN_INFO"No need to implment on IA64!\n");
+ return 0;
+}
+
+void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
+{
+
+ hrtimer_cancel(&vcpu->arch.hlt_timer);
+ kfree(vcpu->arch.apic);
+}
+
+
+long kvm_arch_vcpu_ioctl(struct file *filp,
+ unsigned int ioctl, unsigned long arg)
+{
+ return -EINVAL;
+}
+
+int kvm_arch_set_memory_region(struct kvm *kvm,
+ struct kvm_userspace_memory_region *mem,
+ struct kvm_memory_slot old,
+ int user_alloc)
+{
+ unsigned long i;
+ struct page *page;
+ int npages =3D mem->memory_size >> PAGE_SHIFT;
+ struct kvm_memory_slot *memslot =3D &kvm->memslots[mem->slot];
+ unsigned long base_gfn =3D memslot->base_gfn;
+
+ for (i =3D 0; i < npages; i++) {
+ page =3D gfn_to_page(kvm, base_gfn + i);
+ kvm_set_pmt_entry(kvm, base_gfn + i,
+ page_to_pfn(page) << PAGE_SHIFT,
+ _PAGE_AR_RWX|_PAGE_MA_WB);
+ memslot->rmap[i] =3D (unsigned long)page;
+ }
+
+ return 0;
+}
+
+
+long kvm_arch_dev_ioctl(struct file *filp,
+ unsigned int ioctl, unsigned long arg)
+{
+ return -EINVAL;
+}
+
+void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
+{
+ kvm_vcpu_uninit(vcpu);
+}
+
+static int vti_cpu_has_kvm_support(void)
+{
+ long avail =3D 1, status =3D 1, control =3D 1;
+ long ret;
+
+ ret =3D ia64_pal_proc_get_features(&avail, &status, &control, 0);
+ if (ret)
+ goto out;
+
+ if (!(avail & PAL_PROC_VM_BIT))
+ goto out;
+
+ printk(KERN_DEBUG"kvm: Hardware Supports VT\n");
+
+ ret =3D ia64_pal_vp_env_info(&kvm_vm_buffer_size, &vp_env_info);
+ if (ret)
+ goto out;
+ printk(KERN_DEBUG"kvm: vm buffer size:0x%lx\n",
kvm_vm_buffer_size);
+
+ if (!(vp_env_info & VP_OPCODE)) {
+ printk(KERN_WARNING"No opcode ability on hardware,\
+ vm_env_info:0x%lx\n",vp_env_info);
+ }
+
+ return 1;
+out:
+ return 0;
+}
+
+static int kvm_relocate_vmm(struct kvm_vmm_info *vmm_info,
+ struct module *module)
+{
+ unsigned long module_base;
+ unsigned long vmm_size;
+
+ unsigned long vmm_offset, func_offset, fdesc_offset;
+ struct fdesc *p_fdesc;
+
+ BUG_ON(!module);
+
+ if (!kvm_vmm_base) {
+ printk("kvm: kvm area didn't initilize yet!!\n");
+ return -EINVAL;
+ }
+
+ /*Calculate new position of relocated vmm module.*/
+ module_base =3D (unsigned long)module->module_core;
+ vmm_size =3D module->core_size;
+ if (unlikely(vmm_size > KVM_VMM_SIZE))
+ return -EFAULT;
+
+ memcpy((void *)kvm_vmm_base, (void *)module_base, vmm_size);
+ kvm_flush_icache(kvm_vmm_base, vmm_size);
+
+ /*Recalculate kvm_vmm_info based on new VMM*/
+ vmm_offset =3D vmm_info->vmm_ivt - module_base;
+ kvm_vmm_info->vmm_ivt =3D KVM_VMM_BASE + vmm_offset;
+ printk(KERN_DEBUG"kvm: Relocated VMM ivt base addr:%lx\n",
+ kvm_vmm_info->vmm_ivt);
+
+ fdesc_offset =3D (unsigned long)vmm_info->vmm_entry - module_base;
+ kvm_vmm_info->vmm_entry =3D (kvm_vmm_entry *)(KVM_VMM_BASE +
+ fdesc_offset);
+ func_offset =3D *(unsigned long *)vmm_info->vmm_entry -
module_base;
+ p_fdesc =3D (struct fdesc *)(kvm_vmm_base + fdesc_offset);
+ p_fdesc->ip =3D KVM_VMM_BASE + func_offset;
+ p_fdesc->gp =3D KVM_VMM_BASE+(p_fdesc->gp - module_base);
+
+ printk(KERN_DEBUG"Guest VMM init entry addr:%lx\n",
+ KVM_VMM_BASE+func_offset);
+
+ fdesc_offset =3D (unsigned long)vmm_info->tramp_entry -
module_base;
+ kvm_vmm_info->tramp_entry =3D (kvm_tramp_entry *)(KVM_VMM_BASE +
+ fdesc_offset);
+ func_offset =3D *(unsigned long *)vmm_info->tramp_entry -
module_base;
+ p_fdesc =3D (struct fdesc *)(kvm_vmm_base + fdesc_offset);
+ p_fdesc->ip =3D KVM_VMM_BASE + func_offset;
+ p_fdesc->gp =3D KVM_VMM_BASE + (p_fdesc->gp - module_base);
+
+ kvm_vmm_gp =3D p_fdesc->gp;
+
+ printk(KERN_DEBUG"kvm: vmm's fdesc:%p\n", p_fdesc);
+ printk(KERN_DEBUG"kvm: vmm_entry ip:%p\n",
kvm_vmm_info->vmm_entry);
+ printk(KERN_DEBUG"kvm: vmm trampoline entry ip:0x%lx\n",
+ KVM_VMM_BASE +
func_offset);
+
+ return 0;
+}
+
+int kvm_arch_init(void *opaque)
+{
+ int r;
+ struct kvm_vmm_info *vmm_info =3D (struct kvm_vmm_info *)opaque;
+
+ if (!vti_cpu_has_kvm_support()) {
+ printk(KERN_ERR "kvm: no hardware support\n");
+ r =3D -EOPNOTSUPP;
+ goto out;
+ }
+
+ if (kvm_vmm_info) {
+ printk(KERN_ERR "kvm: already loaded the other
module!\n");
+ r =3D -EEXIST;
+ goto out;
+ }
+
+ r =3D -ENOMEM;
+ kvm_vmm_info =3D kzalloc(sizeof(struct kvm_vmm_info), GFP_KERNEL);
+ if (!kvm_vmm_info)
+ goto out;
+
+ if (kvm_alloc_vmm_area())
+ goto out_free0;
+
+ r =3D kvm_relocate_vmm(vmm_info, vmm_info->module);
+ if (r)
+ goto out_free1;
+
+ return 0;
+
+out_free1:
+ kvm_free_vmm_area();
+out_free0:
+ kfree(kvm_vmm_info);
+out:
+ return r;
+}
+
+void kvm_arch_exit(void)
+{
+ kvm_free_vmm_area();
+ kfree(kvm_vmm_info);
+ kvm_vmm_info =3D NULL;
+}
+
+int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
+ struct kvm_dirty_log *log)
+{
+ printk(KERN_WARNING"Need to implement later!\n");
+ return 0;
+}
+
+int kvm_arch_hardware_setup(void)
+{
+ return 0;
+}
+
+void kvm_arch_hardware_unsetup(void)
+{
+}
+
+static void vcpu_kick_intr(void *info)
+{
+#ifdef DEBUG
+ struct kvm_vcpu *vcpu =3D (struct kvm_vcpu *)info;
+ printk(KERN_DEBUG"vcpu_kick_intr %p \n", vcpu);
+#endif
+}
+
+void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
+{
+ int ipi_pcpu =3D vcpu->cpu;
+
+ if (waitqueue_active(&vcpu->wq)) {
+ wake_up_interruptible(&vcpu->wq);
+ }
+ if (vcpu->guest_mode)
+ smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu,
0, 0);
+}
+
+int kvm_apic_set_irq(struct kvm_vcpu *vcpu, u8 vec, u8 trig)
+{
+
+ struct vpd *vpd =3D to_host(vcpu->kvm, vcpu->arch.vpd);
+
+ if (!test_and_set_bit(vec, &vpd->irr[0])) {
+ vcpu->arch.irq_new_pending =3D 1;
+ if (vcpu->arch.mp_state =3D=3D VCPU_MP_STATE_RUNNABLE)
+ kvm_vcpu_kick(vcpu);
+ else if (vcpu->arch.mp_state =3D=3D VCPU_MP_STATE_HALTED) {
+ vcpu->arch.mp_state =3D VCPU_MP_STATE_RUNNABLE;
+ if (waitqueue_active(&vcpu->wq))
+ wake_up_interruptible(&vcpu->wq);
+ }
+ return 1;
+ }
+ return 0;
+}
+
+int kvm_apic_match_physical_addr(struct kvm_lapic *apic, u16 dest)
+{
+ return apic->vcpu->vcpu_id =3D=3D dest;
+}
+
+int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda)
+{
+ return 0;
+}
+
+struct kvm_vcpu *kvm_get_lowest_prio_vcpu(struct kvm *kvm, u8 vector,
+ unsigned long bitmap)
+{
+ struct kvm_vcpu *lvcpu =3D kvm->vcpus[0];
+ int i;
+
+ for (i =3D 1; i < KVM_MAX_VCPUS; i++) {
+ if (!kvm->vcpus[i])
+ continue;
+ if (lvcpu->arch.xtp > kvm->vcpus[i]->arch.xtp)
+ lvcpu =3D kvm->vcpus[i];
+ }
+
+ return lvcpu;
+}
+
+static int find_highest_bits(int *dat)
+{
+ u32 bits, bitnum;
+ int i;
+
+ /* loop for all 256 bits */
+ for (i =3D 7; i >=3D 0 ; i--) {
+ bits =3D dat[i];
+ if (bits) {
+ bitnum =3D fls(bits);
+ return i * 32 + bitnum - 1;
+ }
+ }
+
+ return -1;
+}
+
+int kvm_highest_pending_irq(struct kvm_vcpu *vcpu)
+{
+ struct vpd *vpd =3D to_host(vcpu->kvm, vcpu->arch.vpd);
+
+ if (vpd->irr[0] & (1UL << NMI_VECTOR))
+ return NMI_VECTOR;
+ if (vpd->irr[0] & (1UL << ExtINT_VECTOR))
+ return ExtINT_VECTOR;
+
+ return find_highest_bits((int *)&vpd->irr[0]);
+}
+
+int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu)
+{
+ if (kvm_highest_pending_irq(vcpu) !=3D -1)
+ return 1;
+ return 0;
+}
+
+gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
+{
+ return gfn;
+}
+
+int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
+{
+ return vcpu->arch.mp_state =3D=3D VCPU_MP_STATE_RUNNABLE;
+}
+
--=20
1.5.1
|
