This is a nifty feature present in EWB (Electronics
Workbench). It is basically a prove that produces all
the combinations of logic inputs and feeds them into
the circuit, the output is then read and shown as a
table. EX. single OR gate:
A B OUT
0 0 0
0 1 1
1 0 1
1 1 1
It is a fast way of analyzing logic circuits.
THANKS, ktechlab rocks.