From: <cap...@us...> - 2007-12-24 15:03:06
|
Revision: 13938 http://jikesrvm.svn.sourceforge.net/jikesrvm/?rev=13938&view=rev Author: captain5050 Date: 2007-12-24 07:03:04 -0800 (Mon, 24 Dec 2007) Log Message: ----------- Use MOVD to move from XMM to GPR and back without going via memory. Use XORP[SD] to materialize a constant of 0.0[FD]. Modified Paths: -------------- rvmroot/trunk/rvm/src/org/jikesrvm/compilers/opt/ia32/BURS_Helpers.java Modified: rvmroot/trunk/rvm/src/org/jikesrvm/compilers/opt/ia32/BURS_Helpers.java =================================================================== --- rvmroot/trunk/rvm/src/org/jikesrvm/compilers/opt/ia32/BURS_Helpers.java 2007-12-24 15:00:50 UTC (rev 13937) +++ rvmroot/trunk/rvm/src/org/jikesrvm/compilers/opt/ia32/BURS_Helpers.java 2007-12-24 15:03:04 UTC (rev 13938) @@ -95,6 +95,7 @@ import static org.jikesrvm.compilers.opt.ir.Operators.IA32_LOCK_CMPXCHG; import static org.jikesrvm.compilers.opt.ir.Operators.IA32_LOCK_CMPXCHG8B; import static org.jikesrvm.compilers.opt.ir.Operators.IA32_MOV; +import static org.jikesrvm.compilers.opt.ir.Operators.IA32_MOVD; import static org.jikesrvm.compilers.opt.ir.Operators.IA32_MOVSD; import static org.jikesrvm.compilers.opt.ir.Operators.IA32_MOVSS; import static org.jikesrvm.compilers.opt.ir.Operators.IA32_MOVSX__B; @@ -114,6 +115,8 @@ import static org.jikesrvm.compilers.opt.ir.Operators.IA32_SYSCALL; import static org.jikesrvm.compilers.opt.ir.Operators.IA32_TRAPIF; import static org.jikesrvm.compilers.opt.ir.Operators.IA32_XOR; +import static org.jikesrvm.compilers.opt.ir.Operators.IA32_XORPD; +import static org.jikesrvm.compilers.opt.ir.Operators.IA32_XORPS; import static org.jikesrvm.compilers.opt.ir.Operators.IR_PROLOGUE; import static org.jikesrvm.compilers.opt.ir.Operators.LONG_SHL; import static org.jikesrvm.compilers.opt.ir.Operators.LONG_SHR; @@ -911,20 +914,22 @@ * Emit code to move 32 bits from FPRs to GPRs */ protected final void SSE2_FPR2GPR_32(Instruction s) { - int offset = -burs.ir.stackManager.allocateSpaceForConversion(); - StackLocationOperand sl = new StackLocationOperand(true, offset, DW); - EMIT(CPOS(s, MIR_Move.create(IA32_MOVSS, sl, Unary.getVal(s)))); - EMIT(MIR_Move.mutate(s, IA32_MOV, Unary.getResult(s), sl.copy())); + EMIT(MIR_Move.mutate(s, IA32_MOVD, Unary.getResult(s), Unary.getVal(s))); +// int offset = -burs.ir.stackManager.allocateSpaceForConversion(); +// StackLocationOperand sl = new StackLocationOperand(true, offset, DW); +// EMIT(CPOS(s, MIR_Move.create(IA32_MOVSS, sl, Unary.getVal(s)))); +// EMIT(MIR_Move.mutate(s, IA32_MOV, Unary.getResult(s), sl.copy())); } /** * Emit code to move 32 bits from GPRs to FPRs */ protected final void SSE2_GPR2FPR_32(Instruction s) { - int offset = -burs.ir.stackManager.allocateSpaceForConversion(); - StackLocationOperand sl = new StackLocationOperand(true, offset, DW); - EMIT(CPOS(s, MIR_Move.create(IA32_MOV, sl, Unary.getVal(s)))); - EMIT(MIR_Move.mutate(s, IA32_MOVSS, Unary.getResult(s), sl.copy())); + EMIT(MIR_Move.mutate(s, IA32_MOVD, Unary.getResult(s), Unary.getVal(s))); +// int offset = -burs.ir.stackManager.allocateSpaceForConversion(); +// StackLocationOperand sl = new StackLocationOperand(true, offset, DW); +// EMIT(CPOS(s, MIR_Move.create(IA32_MOV, sl, Unary.getVal(s)))); +// EMIT(MIR_Move.mutate(s, IA32_MOVSS, Unary.getResult(s), sl.copy())); } /** @@ -1007,7 +1012,15 @@ * Expansion of SSE2 floating point constant loads */ protected final void SSE2_FPCONSTANT(Instruction s) { - EMIT(MIR_Move.mutate(s, SSE2_MOVE(Binary.getResult(s)), Binary.getResult(s), MO_MC(s))); + RegisterOperand res = Binary.getResult(s); + Operand val = Binary.getVal2(s); // float or double value + if (val.isFloatConstant() && val.asFloatConstant().value == 0.0F) { + EMIT(MIR_BinaryAcc.mutate(s, IA32_XORPS, res, res.copyRO())); + } else if (val.isDoubleConstant() && val.asDoubleConstant().value == 0.0D) { + EMIT(MIR_BinaryAcc.mutate(s, IA32_XORPD, res, res.copyRO())); + }else { + EMIT(MIR_Move.mutate(s, SSE2_MOVE(res), res, MO_MC(s))); + } } /** This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site. |
From: <cap...@us...> - 2008-01-23 09:19:46
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Revision: 13940 http://jikesrvm.svn.sourceforge.net/jikesrvm/?rev=13940&view=rev Author: captain5050 Date: 2008-01-23 01:19:42 -0800 (Wed, 23 Jan 2008) Log Message: ----------- Remove assertion that a SSE compare value must be in a register as it may also be a memory operand. Modified Paths: -------------- rvmroot/trunk/rvm/src/org/jikesrvm/compilers/opt/ia32/BURS_Helpers.java Modified: rvmroot/trunk/rvm/src/org/jikesrvm/compilers/opt/ia32/BURS_Helpers.java =================================================================== --- rvmroot/trunk/rvm/src/org/jikesrvm/compilers/opt/ia32/BURS_Helpers.java 2007-12-24 15:20:26 UTC (rev 13939) +++ rvmroot/trunk/rvm/src/org/jikesrvm/compilers/opt/ia32/BURS_Helpers.java 2008-01-23 09:19:42 UTC (rev 13940) @@ -996,7 +996,6 @@ */ protected final void SSE2_CONV(Operator op, Instruction s, Operand result, Operand value) { if(VM.VerifyAssertions) VM._assert(result.isRegister()); - if(VM.VerifyAssertions) VM._assert(value.isRegister()); EMIT(MIR_Unary.mutate(s, op, result, value)); } This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site. |
From: <cap...@us...> - 2008-01-23 17:03:06
|
Revision: 13944 http://jikesrvm.svn.sourceforge.net/jikesrvm/?rev=13944&view=rev Author: captain5050 Date: 2008-01-23 09:03:02 -0800 (Wed, 23 Jan 2008) Log Message: ----------- Don't use CDQ to generate top-half of the dividend in the case of int constants, explicitly write a value into EDX following the pattern of ICC (which differs from GCC in this). Modified Paths: -------------- rvmroot/trunk/rvm/src/org/jikesrvm/compilers/opt/ia32/BURS_Helpers.java Modified: rvmroot/trunk/rvm/src/org/jikesrvm/compilers/opt/ia32/BURS_Helpers.java =================================================================== --- rvmroot/trunk/rvm/src/org/jikesrvm/compilers/opt/ia32/BURS_Helpers.java 2008-01-23 17:00:56 UTC (rev 13943) +++ rvmroot/trunk/rvm/src/org/jikesrvm/compilers/opt/ia32/BURS_Helpers.java 2008-01-23 17:03:02 UTC (rev 13944) @@ -1034,11 +1034,22 @@ */ protected final void INT_DIVIDES(Instruction s, RegisterOperand result, Operand val1, Operand val2, boolean isDiv) { - EMIT(CPOS(s, MIR_Move.create(IA32_MOV, new RegisterOperand(getEAX(), VM_TypeReference.Int), val1))); - EMIT(CPOS(s, MIR_ConvertDW2QW.create(IA32_CDQ, - new RegisterOperand(getEDX(), VM_TypeReference.Int), - new RegisterOperand(getEAX(), VM_TypeReference.Int)))); - if (val2 instanceof IntConstantOperand) { + if (val1.isIntConstant()) { + int value = val1.asIntConstant().value; + if (value < 0) { + EMIT(CPOS(s, MIR_Move.create(IA32_MOV, new RegisterOperand(getEDX(), VM_TypeReference.Int), IC(-1)))); + EMIT(CPOS(s, MIR_Move.create(IA32_MOV, new RegisterOperand(getEAX(), VM_TypeReference.Int), val1))); + } else { + EMIT(CPOS(s, MIR_Move.create(IA32_MOV, new RegisterOperand(getEDX(), VM_TypeReference.Int), IC(0)))); + EMIT(CPOS(s, MIR_Move.create(IA32_MOV, new RegisterOperand(getEAX(), VM_TypeReference.Int), val1))); + } + } else { + EMIT(CPOS(s, MIR_Move.create(IA32_MOV, new RegisterOperand(getEAX(), VM_TypeReference.Int), val1))); + EMIT(CPOS(s, MIR_ConvertDW2QW.create(IA32_CDQ, + new RegisterOperand(getEDX(), VM_TypeReference.Int), + new RegisterOperand(getEAX(), VM_TypeReference.Int)))); + } + if (val2.isIntConstant()) { RegisterOperand temp = regpool.makeTempInt(); EMIT(CPOS(s, MIR_Move.create(IA32_MOV, temp, val2))); val2 = temp.copyRO(); This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site. |