From: Neha R. <neh...@gm...> - 2009-03-31 16:42:47
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Hi, Attached is the PADTAD 2009 CFP. Please consider submitting to it and participating. Thanks, Neha ================================================================================= [Apologies for multiple copies] Workshop on Parallel and Distributed Systems: Testing, Analysis, and Debugging (PADTAD - VII) July 19-20, 2009 http://www.haifa.il.ibm.com/Workshops/padtad2009/index.shtml In conjunction with International Symposium on Software Testing and Analysis (ISSTA 2009) IMPORTANT DATES ==================================================================== Submission deadline: 19 April 2009 Author notification: 11 May 2009 Final version: 25 May 2009 PADTAD Workshop: 19-20 July 2009 GOALS & SCOPE OF WORKSHOP ==================================================================== The PADTAD 2009 workshop is a two days event at ISSTA 2009 focusing on techniques and systems that aid in the testing, analysis, and debugging of multi-threaded/parallel/distributed applications systems. The workshop has a practical and applied emphasis on systems that have been implemented in (at least) prototype form. The workshop concentrates on works whose main contributions are in the field of testing, debugging, and education. Although debuggers and profilers are the traditional examples of testing and debugging tools on sequential machines, there are issues unique to concurrent systems that are not commonly addressed. Examples of such significant challenges include deadlock, load imbalance, data sharing patterns, race conditions, and contention. Established testing techniques and tools are insufficient for non-sequential programs because they largely ignore timing and scheduling which are inherent in concurrent systems. Beyond the shortcomings on current tools and technologies, the rising generating of programmers and designers need to be more versed in concurrent systems design and programming. Education and curriculum are critical to fully realizing the full potential of multi-core technology as we need to begin training now the students who will make multi-core happen in a large scale. As such, we strongly encourage abstracts and regular papers devoted to education and curriculum at all levels including pedagogy, exercises, projects, experience reports, etc. Following is a broad list of topics of interest to the workshop: * Curriculum and education for multi-core design, programming, testing, and analysis * Techniques for multi-core processors * Techniques for MPI and OpenMP or other library based applications * Transactional memory * Tools for testing or debugging of Multi-threaded/Parallel/Distributed applications * Test generation algorithms for Multi-threaded/Parallel/Distributed applications * Debugging advanced network interface technologies (e.g., Myrinet, VIA) * Debugging and testing Multi-threaded/Parallel/Distributed applications * Testing and Debugging of Multi-threaded/Parallel/Distributed applications written using domain-specific languages * Using static analysis or formal verification to enhance debugging and testing of Multi-threaded/Parallel/Distributed applications * Formal specification of concurrency libraries, and uses in compliance testing of implementations * Detecting race conditions and deadlocks * Replay of Multi-threaded/Parallel/Distributed applications * Finding timing bugs early in the process * Testing real-time Multi-threaded/Parallel/Distributed applications * Fault injection of Multi-threaded/Parallel/Distributed applications * Testing the fault tolerance of Multi-threaded/Parallel/Distributed applications * Testing and debugging techniques for timing related bugs in hardware * Pilots in applying new testing techniques to Multi-threaded/Parallel/Distributed applications * Multi-threaded/Parallel/Distributed review techniques and review tools * Teaching of Multi-threaded/Parallel/Distributed system design, verification and testing Accepted papers, as well as education session abstracts, will be published in a CD-ROM proceedings and will be included in the ACM Digital Library. TUTORIALS ==================================================================== Intel®'s Threading Building Blocks - a Shared Memory Parallel Programming Library By Arch Robison, Senior Principal Engineer, Intel Corporation This tutorial is an introduction to Intel's Threading Building Blocks (Intel's TBB), a commercially supported open-source C++ template library for shared-memory parallel programming, notably for multi-core processors. Though threads are a popular means of shared-memory parallel programming, they are a low-level unstructured construct whose undisciplined use can cause both correctness and performance problems. This tutorial explains these problems and how TBB addresses them, without resorting to special compilers or languages. The tutorial will explain the architecture of TBB, its motivation, and how to effectively apply TBB to problems by using parallel generic programming. Attendees will get some hands on experience with TBB Multicore Programming with Cilk++ By Pablo Halpern, Member of Technical Staff, Cilk Arts This hands-on tutorial is an introduction to Cilk++, a faithful extension of C++ into the multicore realm. The tutorial will introduce key parallel programming concepts impacting performance and reliability, and illustrate how to multicore-enable existing C++ applications using Cilk++. In a hands-on lab exercise featuring both Linux GCC and Visual Studio environments, attendees will: * Apply the Cilk++ keywords to expose parallelism in a sequential application * Use the Parallel Performance Analyzer to optimize the application * Use the Cilkscreen Race Detector to identify race bugs * Apply Cilk++ hyperobjects to eliminate data races on global variables ORGANIZATION ==================================================================== PADTAD General Chair: * Ganesh Gopalakrishnan University of Utah PADTAD Program Chair * Eitan Farchi IBM Haifa Research Laboratory PADTAD Community Chair * Eric Mercer Brigham Young University PROGRAM COMMITTEE ==================================================================== * Eric Mercer, Brigham Young University, U.S.A * Yosi Ben-Asher, Haifa University, Israel * Giorgio Delzanno, Universita di Genova, Italy * Jack Dongarra, University of Tennessee, U.S.A * Eitan Farchi, IBM Haifa Research Lab, Israel * Mike Feeley, University of British Columbia, Canada * Bernd Finkbeiner, Universität des Saarlandes , Germany * Cormac Flanagan, University of California, Santa Cruz, USA * Ganesh Gopalakrishnan, University of Utah * Klaus Havelund, NASA's Jet Propulsion Labratory * Daniel J. Quinlan, Lawrence Livermore National Labratories, U.S.A * Joao Lourenco, Univ. Nova de Lisboa, Portugal * Zhiqiang Ma, Intel, U.S.A * Paul Petersen, Intel U.S.A * Shaz Qadeer, Microsoft Research, USA * Madan Musuvathi, Microsoft Research, USA * Grigore Rosu, University of Illinois at Urbana-Champaign, U.S.A * Christoph Steindl, Catalysts, Austria * Scott Stoller, SUNY, U.S.A * Paul Strooper, University of Queensland, Australia * Serdar Tasiran, Koç University, Turkey * Shmuel Ur, IBM Haifa Research Lab, Israel * Willem Visser, SEVEN Networks, U.S.A * Tao Xie, North Carolina State University, U.S.A * Matt Might, University of Utah, U.S.A. * Rajeev Thakur, Argonne National Laboratory, U.S.A. -- ------------------------------------------------- Neha Rungta Research Assistant Verification and Validation Lab Brigham Young University http://neharungta.com -------------------------------------------------- |