#12 No syntax highlighting, projects don't run

[Anonymous]

I installed the Eclipse three modules, and started a new
Verilog project.

So far, there is no syntax highlighting for .v files.
In simulation mode I am unable to run the project, since
the only "run" modes that I am offered are JUnit, Java
Application, Eclipse Plugin, and other Java features.
This is not the sort of behavior shown in the tutorial in
ivi.sourceforge.net

[Matthew Ballance]

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user_id=189914

The veditor plugin was omitted from the IVI 1.0.1 release by
mistake (I'll fix it in 1.0.2 - really!). That's why you
don't see any syntax highlighting...

As for running simulation, use the 'Debug' launch rather
than the 'Run' launch. There is a 'debug' icon on the
Simulation-perspective toolbar (should be right next to the
'run' icon) that will open the launch-configuration dialog.
This dialog should contain an IVI Cver launch.