Dealing with large quantities of files of an unknown design, it's sometimes very helpful to be able to see the module hierarchy.
Please add a switch to iverilog to write the module hierarchy with instance names as early as possible. Especially prior to any further elaboration, which might error out.
To avoid huge files in case of mixed rtl/gatelevel netlists, don't write instances of modules which are marked with `celldefine.
Other options might be to write just the instance name in the module instead of the expanded instance name.
To get nice formatting, it's beneficial to first find the max module name string length and use that as stringlength during (f)printf.