#905 Internal Compilter Error causes a core dump


Attached automatically-generated Verilog (which Verilator accepts) causes an internal Icarus Verilog compiler error and core dumps:

$ iverilog -o BinOp3.iverilog.exe -Wall BinOp3.fhwc.v
BinOp3.fhwc.v:293: internal error: expr_width()=44, sub expr_width()=76, sub expression=((((((<select=<select=core_wild[31:0][(0)+:44]>[(0)+:76]>)+('b0000000000000000000000000000000000000000000000000000000000000000000000000101))+((<select=<select=core_wild[31:0][(0)+:44]>[(0)+:76]>)-('b0000000000000000000000000000000000000000000000000000000000000000000000010001)))+((core_wild[31:0])*('d2)))+(<select=(<select=core_wild[31:0][(0)+:44]>)/('d3)[(0)+:76]>))+(<select=(<select=core_wild[31:0][(0)+:44]>)%('d2)[(0)+:76]>))+(76'b0000000000000000000000000000000000000000000000000000000000000000000000001010)
BinOp3.fhwc.v:293: assert: eval_tree.cc:154: failed assertion se->expr_width() <= this->expr_width()
Aborted (core dumped)


  • Stephen A. Edwards

    Offending Verilog file causing the error

  • Martin Whitaker

    Martin Whitaker - 2012-08-27
    • milestone: --> v0.9
  • Martin Whitaker

    Martin Whitaker - 2012-08-27

    I have reproduced the compiler crash using v0.9. Expression elaboration and evaluation has been heavily reworked in devel, and this bug is no longer present.

    I'll take a look to see if this can be fixed in v0.9, but in the meantime you could work round this problem by switching to one of the devel snapshots or the latest code from git. Note that the most recent devel snapshot has a known regression where it won't accept source code attributes in some places, so if this is an issue for you, I would recommend the latest code from git, which is quite stable at the moment.

  • Martin Whitaker

    Martin Whitaker - 2012-08-27

    I've submitted a patch on the patch tracker that fixes this bug for the v0.9 compiler.

  • Martin Whitaker

    Martin Whitaker - 2012-08-27
    • status: open --> closed-fixed

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