#47 [Req 83] Alias between VLNV and logicalPortMap

[Mukesh Chopra]

It would be ideal to hve one unique repository of bus/abstraction definitions which is used by everyone in the industry and is complete, however this is unlikely to happen. Hence, with increasing IP exchange, IPs which need to connect together may come from different vendors (e.g. IPs for MPhy, USB, Memory controllers, AHB peripherals). More often than not the IPs from different vendors use different bus/abstraction definitions for the same purpose. This leads to a situation where even the interfaces which are functionally compatible cannot be connected because the VLNV and/or logical ports naming is different across the 2 sets of bus/abstraction definitions used.

So, there is a need to add another IP-XACT object to allow providing such compatibilty information (similar to providing aliases) which can be created by the user and the design environment understands it to allow the corresponding interfaces to connect. Such an object should contain information about the VLNV of the bus/abstraction definitions which are compatible and also the alias for the logical port in one abstraction definition and its corresponding port in the other abstraction defintion. This allows easy interoperability across IPs coming from different suppliers