[HPPAQEMU-CVS] hppaqemu/target-hppa translate.c,1.9,1.10

[Randolph C. <ta...@us...>]

Update of /cvsroot/hppaqemu/hppaqemu/target-hppa
In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv11060/target-hppa

Modified Files:
	translate.c 
Log Message:
un-inline functions for easier debugging
let gen_intermediate_code make forward progress
fixed a typo with handling of the store opcode


Index: translate.c
===================================================================
RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/translate.c,v
retrieving revision 1.9
retrieving revision 1.10
diff -C2 -d -r1.9 -r1.10
*** translate.c	6 Mar 2007 14:41:50 -0000	1.9
--- translate.c	7 Mar 2007 05:27:31 -0000	1.10
***************
*** 58,62 ****
  static void disas_hppa_insn(DisasContext * dc);
  
! static inline uint32_t field(uint32_t val, int start, int length) {
      val >>= start;
      val &= ~(~0 << length);
--- 58,62 ----
  static void disas_hppa_insn(DisasContext * dc);
  
! static uint32_t field(uint32_t val, int start, int length) {
      val >>= start;
      val &= ~(~0 << length);
***************
*** 64,68 ****
  }
  
! static inline uint32_t field_signext(uint32_t val, int start, int length) {
      val >>= start;
      if (val & (1 << (length - 1)))
--- 64,68 ----
  }
  
! static uint32_t field_signext(uint32_t val, int start, int length) {
      val >>= start;
      if (val & (1 << (length - 1)))
***************
*** 73,77 ****
  }
  
! static inline uint32_t signext(uint32_t val, int length) {
      if (val & (1 << (length - 1)))
          val |= ~0 << length;
--- 73,77 ----
  }
  
! static uint32_t signext(uint32_t val, int length) {
      if (val & (1 << (length - 1)))
          val |= ~0 << length;
***************
*** 228,247 ****
  #define gen_op_ldst(name)       gen_op_##name##_raw()
  
! static inline void gen_movl_imm_TN(int reg, int val)
  {
      gen_op_movl_TN_im[reg](val);
  }
  
! static inline void gen_movl_imm_T0(int val)
  {
      gen_movl_imm_TN(0, val);
  }
  
! static inline void gen_movl_imm_T1(int val)
  {
      gen_movl_imm_TN(1, val);
  }
  
! static inline void gen_movl_reg_TN(int reg, int t)
  {
      if (reg)
--- 228,247 ----
  #define gen_op_ldst(name)       gen_op_##name##_raw()
  
! static void gen_movl_imm_TN(int reg, int val)
  {
      gen_op_movl_TN_im[reg](val);
  }
  
! static void gen_movl_imm_T0(int val)
  {
      gen_movl_imm_TN(0, val);
  }
  
! static void gen_movl_imm_T1(int val)
  {
      gen_movl_imm_TN(1, val);
  }
  
! static void gen_movl_reg_TN(int reg, int t)
  {
      if (reg)
***************
*** 251,265 ****
  }
  
! static inline void gen_movl_reg_T0(int reg)
  {
      gen_movl_reg_TN(reg, 0);
  }
  
! static inline void gen_movl_reg_T1(int reg)
  {
      gen_movl_reg_TN(reg, 1);
  }
  
! static inline void gen_movl_TN_reg(int reg, int t)
  {
      if (reg)
--- 251,265 ----
  }
  
! static void gen_movl_reg_T0(int reg)
  {
      gen_movl_reg_TN(reg, 0);
  }
  
! static void gen_movl_reg_T1(int reg)
  {
      gen_movl_reg_TN(reg, 1);
  }
  
! static void gen_movl_TN_reg(int reg, int t)
  {
      if (reg)
***************
*** 267,276 ****
  }
  
! static inline void gen_movl_T0_reg(int reg)
  {
      gen_movl_TN_reg(reg, 0);
  }
  
! static inline void gen_movl_T1_reg(int reg)
  {
      gen_movl_TN_reg(reg, 1);
--- 267,276 ----
  }
  
! static void gen_movl_T0_reg(int reg)
  {
      gen_movl_TN_reg(reg, 0);
  }
  
! static void gen_movl_T1_reg(int reg)
  {
      gen_movl_TN_reg(reg, 1);
***************
*** 279,293 ****
  #define gen_op_shift_T0(s) gen_op_shift##s##_T0()
  
! static inline void gen_goto_tb(DisasContext *s, int tb_num, 
                                 target_ulong pc, target_ulong npc)
  {
  }
  
! static inline void gen_branch(DisasContext *dc, long tb, target_ulong pc, target_ulong npc)
  {
      gen_goto_tb(dc, 0, pc, npc);
  }
  
! static inline int gen_intermediate_code_internal(CPUState *env, 
                                                   TranslationBlock *tb, 
                                                   int search_pc)
--- 279,294 ----
  #define gen_op_shift_T0(s) gen_op_shift##s##_T0()
  
! static void gen_goto_tb(DisasContext *dc, int tb_num, 
                                 target_ulong pc, target_ulong npc)
  {
+     dc->is_br = 1;
  }
  
! static void gen_branch(DisasContext *dc, long tb, target_ulong pc, target_ulong npc)
  {
      gen_goto_tb(dc, 0, pc, npc);
  }
  
! static int gen_intermediate_code_internal(CPUState *env, 
                                                   TranslationBlock *tb, 
                                                   int search_pc)
***************
*** 302,307 ****
      pc_start = tb->pc;
      dc->iaoq[0] = pc_start;
      last_pc = dc->iaoq[0];
!     dc->iaoq[1] = (target_ulong) tb->cs_base; /* CHECK */
      gen_opc_ptr = gen_opc_buf;
      gen_opc_end = gen_opc_buf + OPC_MAX_SIZE;
--- 303,309 ----
      pc_start = tb->pc;
      dc->iaoq[0] = pc_start;
+     dc->iaoq[1] = pc_start + 4;
      last_pc = dc->iaoq[0];
!     dc->iasq[0] = dc->iasq[1] = tb->cs_base;
      gen_opc_ptr = gen_opc_buf;
      gen_opc_end = gen_opc_buf + OPC_MAX_SIZE;
***************
*** 805,809 ****
          case 0x1a: /* STW */
          {
!             uint32_t b, t, r, s, im14;
              b = field(insn, 21, 5);
              t = field(insn, 16, 5);
--- 807,811 ----
          case 0x1a: /* STW */
          {
!             uint32_t b, t, s, im14;
              b = field(insn, 21, 5);
              t = field(insn, 16, 5);
***************
*** 815,819 ****
              gen_movl_imm_T1(im14);
              gen_op_add_T1_T0();
!             gen_movl_reg_T1(r);
              switch(op) {
                  case 0x18: /* STB */
--- 817,821 ----
              gen_movl_imm_T1(im14);
              gen_op_add_T1_T0();
!             gen_movl_reg_T1(t);
              switch(op) {
                  case 0x18: /* STB */
***************
*** 895,898 ****
--- 897,902 ----
          case 0x32: /* MOVB */
          case 0x33: /* MOVIB */
+ 	    /* FIXME */
+ 	    dc->is_br = 1;
              break;
          
***************
*** 943,946 ****
--- 947,953 ----
              disp = (((((w1 << 11) | w2) << 1) | w) << 2);
              /*  */
+ 
+ 	    /* FIXME */
+ 	    dc->is_br = 1;
              break;
          }
***************
*** 968,971 ****
--- 975,981 ----
                      break;
              }
+ 
+ 	    /* FIXME */
+ 	    dc->is_br = 1;
              break;
          }
***************
*** 975,978 ****
--- 985,991 ----
              break;
      }
+ 
+     dc->iaoq[0] = dc->iaoq[1];
+     dc->iaoq[1] = dc->iaoq[1] + 4;
  }