Signal Ranger MK2 (SR-MK2)

M Elliott
  • M Elliott

    M Elliott - 2006-10-17

    Are there any plans to make use of the new Signal Ranger MK2 (SR-MK2), which uses a 300 MHz TMS320C5502 DSP? The older SR-SP2 is getting harder to obtain.

    • Percy Zahl

      Percy Zahl - 2008-08-29

      The MK2 is supported with GXSM-2.0. Current (only) analog16 option can be used/is available.


      Plans for more dedicated SPM AD/DA are still ongoing, may be build by SoftDb, not yet 100% sure, if there is big interest, this may help get it going -->

      @ all Gxsm users: post your interest here!!!!

    • Percy Zahl

      Percy Zahl - 2006-10-17

      Plans yes, I am working on the driver but only have very limited time for it. So do not expect it to be ready so soon.

    • Juan de la Figuera


      I am planning on building another STM unit (I moved to a new institution some months ago), to have it ready after the summer. My questions is related to the Sranger SR-MK2 timetable. I wanted to order the DSP in the coming months, and I was wondering whether to order the old SR-STD model, or the new one (with 16-analog channel card?).



  • Daniel Tiemann

    Daniel Tiemann - 2011-05-12

    Until when did the Mk2 hwi plugin code support the Analog16 card?

  • Percy Zahl

    Percy Zahl - 2011-05-12

    The Analog16 was only a very first beta testing only.

    However, the HwI does matter not at all!! -- only the DSP code does and needs
    minor adjustments (if any -- beyond the "analog-configuration / start calls")
    ! I won't even try with the obsolete old Analog16 DSP version.


    -you must use the according FPGA configuration for the Analog16
    -you must adjust/use the matching analog16 config/start calls (FB_spm.C), main function:

    A810 specific -- replace with Analog16 counter parts:

    FreqDiv = a810_config.freq_div; // / 2!!!!

    ADCRange = a810_config.adc_range; // default: =0 0: +/-10V, 1:+/-5V

    QEP_ON = a810_config.qep_on; // default: =1 (on) manage QEP counters

    start_Analog810 ();

    -you better disable/comment out any counter related code in dataprocess.c (even that may be possible to be reimplemented with the analog16 FPGA code by SoftdB -- not sure if it fits)

    -you may want to check/adjust the sampling rates, etc -- possible disable the HR code by setting the HR matrix to zero

    -the analog in/out buffer handling is compatible with A810!

    If there is any real need I could consider adding a few compiler conditionals
    to do the trick -- may still need a different makefile for the Analog16 lib

    • danuss

      danuss - 2015-01-29

      Hi.. Percy Zahl..

      I am using Signal Ranger MK2 and A810 expansion board..

      Right now my hardware is set to +/- 10V at output side..
      If i want to change output voltage to +/- 5V. What changes i need to make it...


      waiting for your reply...

      • Percy Zahl

        Percy Zahl - 2015-01-29


        you can only set the input ADC range from +/-10V to +/-5V sensitivity.

        The outputs are always +/-10V range.

        Please refer to the Analog-810 specifications for details.


        Last edit: Percy Zahl 2015-01-29
  • Daniel Tiemann

    Daniel Tiemann - 2011-05-13

    Nice, sounds good. I'll have a look into that before I can get back to you. I
    have an Mk2-A16 combo here, waiting to be used as an mk1 substitute.

  • Percy Zahl

    Percy Zahl - 2011-05-13

    Just FYI:

    the Analog16 is nice and may seam fast -- but unfortunately if has a critical
    drawback even compared to the old SRanger-STD/SP2 AICs anlog capabilities --
    in respect of the feedback or close loop operation as it has a loop delay
    (samples in + samples out) what is comparable or even slightly longer that the
    old SRanger had on those channels per default. (I have to look it up, but it's
    long, check the specs.

    This point is -- for the old SRanger's AIC configuration I could for the
    critical Current/Feedback input signal and Z output channels turn off the
    IIR/FIR what has some 64 or even 128 samples delay line and cut this down to a
    in+out loop delay of about 4 1/2 samples if I remember right. What is just
    about fine/acceptable for most instruments for STM/AFM at 22.1kHz sampling

    Now the new Analog 16 AIC does NOT allow such configuration. Please check the
    max or min loop delays your ill get and see if this is acceptable for your

    This was one of the major reasons beyond the superior stability and precision
    at DC we developed the SPM specific A810!


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