GXemul Code2

Updating the TODO.

On these 32-bit architectures, do not sign-extend the PC (IP) register.

Names for RAM/ROM ranges.

Actually not implemented yet.

Working on basic RISC-V and i960 stuff. Also making all CPUs use a common routine for indicating the current PC in disassembly output. And beginning to add i960 b.out support (again).

Sprite multi-machine experiments.

Implementing the first RISC-V instruction: c.addi

Some minimal first steps on implementing RISC-V stuff: 16- vs 32-bit instruction lengths. ELF loading. test and bare machines, for testing.

Experimenting with moving the rpath flag to always be used.

Also check for X11R7 in the configure script, in addition to X11R6.