GXemul Code2

Status: Alpha

Brought to you by: gavare

Commit [r6461] Maximize Restore History

Adding an empty RISC-V CPU skeleton [again].

Authored by: debug 2021-03-27

Browse code at this revision

Parent: [r6460]

Child: [r6462]

changed	/gxemul/trunk/HISTORY
changed	/gxemul/trunk/configure
changed	/gxemul/trunk/src/cpus/Makefile.skel
changed	/gxemul/trunk/src/cpus/cpu_dyntrans.c
changed	/gxemul/trunk/src/cpus/cpu_i960.c
added	/gxemul/trunk/src/cpus/cpu_riscv.c
added	/gxemul/trunk/src/cpus/cpu_riscv_instr.c
changed	/gxemul/trunk/src/include/cpu.h
added	/gxemul/trunk/src/include/cpu_riscv.h

/gxemul/trunk/HISTORY Diff Switch to side-by-side view

/gxemul/trunk/configure Diff Switch to side-by-side view

/gxemul/trunk/src/cpus/Makefile.skel Diff Switch to side-by-side view

/gxemul/trunk/src/cpus/cpu_dyntrans.c Diff Switch to side-by-side view

/gxemul/trunk/src/cpus/cpu_i960.c Diff Switch to side-by-side view

/gxemul/trunk/src/cpus/cpu_riscv.c Diff Switch to side-by-side view

/gxemul/trunk/src/cpus/cpu_riscv_instr.c Diff Switch to side-by-side view

/gxemul/trunk/src/include/cpu.h Diff Switch to side-by-side view

/gxemul/trunk/src/include/cpu_riscv.h Diff Switch to side-by-side view