GXemul Code2

Adding a skeleton RISC-V CPU and RISC-V "virt" machine. Refactoring some parts of the new framework to deal better with variable length instructions during disassembly.

Use bold font rather than brackets around debug messages, when running from a terminal.

Implementing the ARM sbfx instruction.

Implementing the ARM rev, uxtab, and uxtah instructions.

Almost beginning on Device Tree stuff for ARM Android machines.

Implementing the ARM mls instruction.

It seems that Linux/Android wants 0xffffffff as the architecture ID for some machines.

Implementing ARM ldrex/strex (load-linked / store-conditional).

Beginning on a hack to allow emulated SGI O2 machines have more than 256 MB of RAM. Works with OpenBSD/sgi so far.

Skip the cast align warnings for now. Perhaps there is time in the future to revisit this.