GXemul Code2

Updating HelenOS guest OS links etc.

Fixing an old TODO for invalidating translation caches when using non-4KB pages for MIPS. This makes HelenOS 0.7.1/malta boot further than before.

Use hex for the tlb indices.

Dummy i960 cache invalidation (nop).

Implementing i960 lda with immediate offset.

Implementing happy case of an "lda" i960 instruction which has an extra displacement word, i.e. non-standard dyntrans instruction length.

Beginning to implement i960 dyntrans instructions.

Updating documentation comments.

Implementing the rest of i960CA REG instruction disasm.

Beginning to add some REG instruction disassembly. Also correcting the order of the arguments for Store MEM instructions.