GXemul Code2

Beginning to add some REG instruction disassembly. Also correcting the order of the arguments for Store MEM instructions.

Basic b.out file loader.

Implementing COBR disassembly.

i960 MEM instruction disassembly has now been implemented.

Adding more i960 registers as state variables.

Comment about RAM amounts.

Comment about experimenting with the binary despite lack of b.out loader.

Implementing basic i960 register dump functionality.

Adding a tip about loading the vmlinux binary, even though there is no ECOFF loader yet.

Implementing basic disassembly of some i960 instructions (only the CTRL group so far).