Commit | Date | |
---|---|---|
2013-09-07 12:27:51 | Tree | |
2013-09-07 12:12:58 | Tree | |
[r5805]
by
debug
Fixing an ARM instruction encoding bug: for shifter_operand immediates, the carry bit should be set to bit 31 of the shifter_operand if and only if rotate_imm != 0. I have added detection for the case when this would bug out (although I have never seen it happen yet), and fixed a bug which did happen: for short register formats (i.e. no shift or other complex things), the code should not be run, but it was run anyway, leading to wrong Carry flag results for e.g. the TST instruction. This was triggered when running int64_t modulo. |
2012-09-22 20:11:57 | Tree |
[r5804]
by
debug
Fixing RSC->RSB spelling mistake, and also do not clear too many bits when setting VCZN bits for s instructions. |
2012-09-22 19:00:23 | Tree |
2012-09-06 05:54:59 | Tree | |
[r5802]
by
debug
Adding a patch from David Brownlee: a more reasonable TOC is returned in dev_dreamcast_gdrom.cc (for NetBSD/dreamcast). |
2012-07-31 09:34:04 | Tree |
[r5801]
by
debug
Adding a patch from David Brownlee (mkstemp on NetBSD), and trying to make things build without warnings with GCC 4.6.x. |
2012-07-24 12:22:58 | Tree |
2012-06-17 18:50:45 | Tree | |
2012-05-07 21:04:24 | Tree | |
2012-01-22 10:56:15 | Tree |