| Commit | Date | |
|---|---|---|
| 2011-07-02 14:43:11 | Tree | |
| 2011-06-26 22:14:42 | Tree | |
| 2011-06-26 22:14:23 | Tree | |
|
[r5768]
by
debug
Fixing a bug in the SH4 fipr instruction (inner product): the rm and rn registers were reversed! |
2011-06-26 21:55:15 | Tree |
|
[r5767]
by
debug
Moving Dreamcast BIOS emulation entry points to 0x8c000100+ofs, so they are not "in the way" of the real BIOS data area at 0x8c000000-0x8c0000ff. Some other minor Dreamcast fixes. |
2011-06-26 12:24:17 | Tree |
| 2011-06-24 09:54:35 | Tree | |
| 2011-06-24 07:43:05 | Tree | |
| 2011-06-24 07:04:27 | Tree | |
|
[r5763]
by
debug
Found a bug in the SH4 fsca instruction: the angle argument for sin and cos was incorrectly calculated. "dcfighting.bin" and "gltest.bin" (two "homebrew" Dreamcast programs) now look much more like on the real Dreamcast. |
2011-06-24 07:01:16 | Tree |
|
[r5762]
by
debug
Continuing on Dreamcast and SuperH emulation: the SH4 DMA channel numbers were off-by-one (but did not really have any negative effect). Experimenting with end-of-DMA mechanism in dev_pvr. Adding a second device thing at 0x005f7c00, which seems to be a PVR DMA register range, but not much used? |
2011-06-23 18:15:44 | Tree |