GXemul Code2

Two MIPS16 instructions can be disassembled; disassembly address is now not necessarily the same as m_pc (e.g. on MIPS16, the lowest bit is cleared).

Longer help message (with example) for the "add" command.

Two MIPS16 instructions can be disassembled; disassembly address is now not necessarily the same as m_pc (e.g. on MIPS16, the lowest bit is cleared).

Removing unnecessary X11 includes during the build, and making sure that all tests pass even in 'stable' builds.

Adding a 'raw' file loader, and a dummy SGI IP32 template.

Arguments can now be passed during component creation, e.g. nr CPUs, CPU model, or ram amount for a template machine. (But CPU model is ignored by the CPUs, because there are no write handlers for variables yet...)

[Re]implementing some simple MIPS and M88K instructions. Also adding a summy SGI IP30 machine.

Fixing a bug which prevented an IRIX ELF32 kernel from being loaded (read too much at the end of the last Shdr).

20090729 Slowly beginning to reimplement dyntrans in C++: Beginning on
the CPUComponent::DyntransExecute core loop, and some
basic structures. MIPS and M88K cpus call DyntransExecute.
20090731 Continuing on the new dyntrans core. The first instruction (a
M88K subu) can be executed on a dummy IC page.

Some minor help updates (help for the "root" word, etc).