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Code2 Commit Log


Commit Date  
[r5543] by debug

Implementing pre-run-checks for M88K and MIPS cpus, for checking the r0 and zr registers, respectively.

 2009-07-26 12:16:12 Tree
[r5542] by debug

Adding an "accuracy" variable to the RootComponent, which must be set to either "cycle" or "sloppy". Also adding some better error reporting during component deserialization.

 2009-07-26 12:02:06 Tree
[r5541] by debug

Removing the "global time" concept. Adding a helper for debug message indentation.

 2009-07-26 10:51:27 Tree
[r5540] by debug

The step command now takes an argument (default is 1).

 2009-07-25 10:52:58 Tree
[r5539] by debug

Updating the TODO.

 2009-07-24 15:24:03 Tree
[r5538] by debug

Interleaved execution of multiple components, running at different speeds, should now work.

 2009-07-24 15:22:49 Tree
[r5537] by debug

Single-step of multiple components works, if all are the same speed.

 2009-07-24 13:27:42 Tree
[r5536] by debug

Beginning to work on cycle execution! Single-step of single component works (quick hack).

 2009-07-24 13:17:19 Tree
[r5535] by debug

MIPS 32-bit sign extension.

 2009-07-24 10:14:36 Tree
[r5534] by debug

CPU endianness is now serialized (as a bool, not enum).

 2009-07-24 10:12:10 Tree
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