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Code2 Commit Log


Commit Date  
[r5264] by debug

Implementing the SH4 fipr instruction (vector dot-product).

 2008-11-27 23:44:48 Tree
[r5263] by debug

Implementing the SH4 fsrra instruction, 1/sqrt(x).

 2008-11-27 22:49:55 Tree
[r5262] by debug

Continuing on i80321 registers (mostly dummy).

 2008-11-27 20:55:02 Tree
[r5261] by debug

Importing iopi2creg.h from NetBSD (ARM Xscale I2C registers).

 2008-11-27 18:57:33 Tree
[r5260] by debug

Perhaps ARM i80321 MCU_SDBR is 0 (not 0xa0000000) on Iyonix? TODO: Figure out.

 2008-11-26 05:07:29 Tree
[r5259] by debug

i80321 registers at 0xff...... must be mapped during boot.

 2008-11-26 04:56:26 Tree
[r5258] by debug

Continuing on the Iyonix mode: connecting initial i80321
interrupts, and importing NetBSD/iyonix' bootconfig.h.

 2008-11-26 04:23:07 Tree
[r5257] by debug

Removing obsolete CVS Id tag.

 2008-11-25 19:02:45 Tree
[r5256] by debug

Fixing a bug in ARM pc-relative loads, when loading within the same page as the pc. (Bug triggered when playing around with a RiscOS ROM image.)

 2008-11-25 18:02:29 Tree
[r5255] by debug

Updating the HISTORY and TODO files.

 2008-11-25 07:23:52 Tree
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