GXemul Code2

Implementing an instruction combination for the NetBSD/cats idle loop (making the host not use any cpu if NetBSD/cats inside the emulator is not using any cpu).

Increasing the nr of ARM VPH entries from 128 to 384.

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Implementing the MIPS32 rev 2 ins instruction.

Changing back the default CPU for the Malta machine to a 5Kc (MIPS64 rev 1), because NetBSD/evbmips does not yet run on the rev 2 cpu.

Implementing some more MIPS32/64 revision 2 instructions: di, ei, ext, dext, dextm, and dextu.

Changing the default CPU for the Malta machine from a 5Kc (MIPS64 rev 1) to a 5KE (MIPS64 rev 2).

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20070612 FINALLY figured out why Debian/DECstation stopped working when
translation read-ahead was enabled: in src/memory_rw.c, the
call to invalidate_code_translation was made also if the
memory access was an instruction load (if the page was mapped
as writable); it shouldn't be called in that case.