GXemul Code2
Status: Alpha
Brought to you by:
gavare
| Commit | Date | |
|---|---|---|
|
[r4749]
by
debug
Minor SH update (turning unnecessary sts_mach_rn, sts_macl_rn, and sts_pr_rn instruction handlers into mov_rm_rn). |
2007-04-18 16:05:17 | Tree |
| 2007-04-18 14:08:36 | Tree | |
| 2007-04-16 15:13:59 | Tree | |
|
[r4746]
by
debug
In memory_rw.c, if mapping a page as writable, make sure to invalidate code translations even if the data access was a read. |
2007-04-16 15:13:44 | Tree |
| 2007-04-16 15:12:06 | Tree | |
| 2007-04-16 15:11:31 | Tree | |
| 2007-04-16 15:11:14 | Tree | |
| 2007-04-16 15:11:01 | Tree | |
|
[r4741]
by
debug
The 'LDC Rm,SR' instruction now immediately breaks out of the dyntrans loop if an interrupt is to be triggered. |
2007-04-15 15:45:49 | Tree |
| 2007-04-15 15:43:28 | Tree |