| Commit | Date | |
|---|---|---|
| 2007-04-15 15:43:28 | Tree | |
|
[r4739]
by
debug
Adding similar special case handling for 'LDC.L @Rm+,SR' (calling sh_update_sr() instead of just loading). Also implementing the 'FCNVDS DRm,FPUL' instruction. |
2007-04-15 13:21:51 | Tree |
| 2007-04-15 13:20:47 | Tree | |
|
[r4737]
by
debug
Landisk PCLOCK should be 33.33 MHz, not 50 MHz. (This makes FINALLY found and fixed the bug which caused OpenBSD/landisk Implementing the 'FCNVSD FPUL,DRn' SuperH instruction. |
2007-04-15 06:52:47 | Tree |
| 2007-04-14 12:54:27 | Tree | |
| 2007-04-14 05:39:47 | Tree | |
| 2007-04-14 05:38:00 | Tree | |
| 2007-04-13 19:11:43 | Tree | |
| 2007-04-13 16:12:39 | Tree | |
|
[r4731]
by
debug
SH SCI (serial bit interface) should now work together with a (new) RS5C313 clock device (for Landisk emulation). |
2007-04-13 16:07:26 | Tree |