GXemul Code2

Minor cleanup/removal of some more legacy MIPS interrupt code.

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Removing most of the native code generation experimental code, it does not make sense to include any quick hacks like this.

Making PCI interrupts work for Footbridge again.

Native code generation updates.

20070131 Adding a -k command line option to set the size of the dyntrans
cache, and a -B command line option to disable native code
generation, even if GXemul was compiled with support for
native code generation for the specific host CPU architecture.
Adding detection of amd64/x86_64 hosts in the configure script,
for doing initial experiments (again :-) with native code
generation.

Moving out the MIPS multi_lw and _sw instruction combinations so that they are auto-generated at compile time instead.

CPC700 should return pci_data, so that cards can be added.

Fixing MACE ISA interrupts (SGI IP32 emulation). Both NetBSD/sgimips' and OpenBSD/sgi's ramdisk kernels can now be interacted with again.

Converting the CPC700 controller (PCI and interrupt controller for PM/PPC) to the new interrupt system.