GXemul Code2
Status: Alpha
Brought to you by:
gavare
Menu
▾
▴
Older >
Code2 Commit Log
| Commit | Date | |
|---|---|---|
| 2006-10-02 08:03:16 | Tree | |
|
[r4458]
by
debug
Changing the NetBSD/sgimips install instructions to extract files from an iso image, instead of downloading them via ftp. |
2006-10-01 00:26:35 | Tree |
| 2006-09-30 10:09:19 | Tree | |
| 2006-09-30 08:17:15 | Tree | |
| 2006-09-30 05:57:08 | Tree | |
|
[r4454]
by
debug
Adding disassembly support for more MIPS64 revision 2 opcodes (seb, seh, wsbh, jalr.hb, jr.hb, synci, ins, dins, dinsu, dinsm, dsbh, dshd, ror, dror, rorv, drorv, dror32). Also implementing seb, seh, dsbh, dshd, and wsbh. |
2006-09-30 05:39:44 | Tree |
|
[r4453]
by
debug
The ENTRYHI_R_MASK was missing in (at least) memory_mips_v2p.c, causing TLB lookups to sometimes succeed when they should have failed. (A big thank you to Juli Mallett for noticing the problem.) |
2006-09-30 03:19:18 | Tree |
| 2006-09-29 10:29:12 | Tree | |
|
[r4451]
by
debug
Re-implementing checks for coprocessor availability for MIPS cop0 instructions. (Thanks to Carl van Schaik for noticing the lack of cop0 availability checks.) Implementing an instruction combination hack which treats NetBSD/pmax idle loop as a wait-like instruction. |
2006-09-29 10:17:50 | Tree |
| 2006-09-29 10:16:26 | Tree |
